From patchwork Thu Dec 9 12:36:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 12695468 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7C52C433EF for ; Thu, 9 Dec 2021 12:38:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=mAIfuXYRzfc+pKuMpbX8eCQD6mDHNZw7946GTZ+mnds=; b=eiCizkuNdLbkck xIUFuODyg//USbo2p3wUy7Tp3f0yNUma7C8FTjnkB5x/UBadgbzGUki6u6h1IVj+KJZ87j+cXpF/6 gfquswhY6V52ekT00sZxNnbQj3QM9M0JnGueO628ZjTmjFICdvvE6kc1C+ad7DoJoDdTceeKmR+Un 0aReXWRtRZ3YMyb3F3Yveq8PkR7q5xB9b6zZh7ypqYaEm7jJ2kmZwOlP165roRPc9kZf16ZkBakZb flT8GcoqSgQR+TryrZcCUAs+3UvnySQPYk8pyTuGC2fjg25e5kqOMFQ+qeylGhd6x94sBQqFg2z5C bJ7xCwBr/DVIB5UUrkQA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvIfe-00FxHP-AX; Thu, 09 Dec 2021 12:37:10 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvIfH-00FxBf-Ok for linux-arm-kernel@lists.infradead.org; Thu, 09 Dec 2021 12:36:51 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1639053407; x=1670589407; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=LT7PgHIrK21v+VPZ+8bTrxj1+AbSS6gS6s49jHR4k9s=; b=jCZEnlrB25rrsj8+GDWM4c94LQxvDDSzgfVJkKUw9Jml4x5MHb9DfymA 0hncaecPrQvUsQxJ75VFVy+YU8utB1/r6U2LIXkNJLw1moOf/29OOK/H9 aPSp7ZlxuRvOn/jlWAYP+xw5a/y5sXyPTiOQZvuA35H/+k7YGLP9nsMMT VXlO9n9c749eYnDgw+zxNrF9oJ5g6+JfrjrnWEvK5mIiA5XwhxHA7s+bm oSiPnV9udv8+w8OS2YdP5Vb/VO8ShReAtpmJ4SpPsB5+6BQpFU1q7e1G9 dzTuajt79brMCwRQNMU5YjNVKxmTzudDwOUttFSns2TYYLFTq477p3MzR g==; IronPort-SDR: pxu94DQpWG2uT4PlpG2rDiTLisduxfKbRV/5dXHpACKvOr3Hy6yGrHT04c/Ialf4FyQ8aClyF1 8+S8AecPwF6ze5MNYUwjFETEW/R3NaQACXWyHJVMDkxV1jXaUI8a5FG0iViVvxn0Of8hsFoT0n o9khmLoM2psbtao9FZxNm3xoBr8+eBXgb3QHnCP7ZAv922MO4o3ULBeTYb+RFHNmXon9JfEVOy X0bdia+yyds7nbm6L5N5kXjBjSXo136njyRDQl2ywF6EvftJGOdl7HsIkucNX2je7wNG1HWOVo KYvXJosq9dETuxB72RFm7Stl X-IronPort-AV: E=Sophos;i="5.88,192,1635231600"; d="scan'208";a="154857917" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2021 05:36:47 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 9 Dec 2021 05:36:46 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 9 Dec 2021 05:36:44 -0700 From: Tudor Ambarus To: , CC: , , , , , Tudor Ambarus Subject: [PATCH 1/2] ARM: dts: at91: sama7g5: Add QSPI nodes Date: Thu, 9 Dec 2021 14:36:42 +0200 Message-ID: <20211209123643.341892-1-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211209_043647_850923_E9375BF6 X-CRM114-Status: UNSURE ( 7.17 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org sama7g5 embedds 2 instances of QSPI controller: 1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash and OctaFlash Protocols Supported. 2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR. Signed-off-by: Tudor Ambarus Acked-by: Nicolas Ferre --- arch/arm/boot/dts/sama7g5.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index 7039311bf678..eddcfbf4d223 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -181,6 +181,36 @@ tcb1: timer@e0800000 { clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; + qspi0: spi@e080c000 { + compatible = "microchip,sama7g5-ospi"; + reg = <0xe080c000 0x400>, <0x20000000 0x10000000>; + reg-names = "qspi_base", "qspi_mmap"; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(41)>, + <&dma0 AT91_XDMAC_DT_PERID(40)>; + dma-names = "tx", "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 78>, <&pmc PMC_TYPE_GCK 78>; + clock-names = "pclk", "gclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + qspi1: spi@e0810000 { + compatible = "microchip,sama7g5-qspi"; + reg = <0xe0810000 0x400>, <0x30000000 0x10000000>; + reg-names = "qspi_base", "qspi_mmap"; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(43)>, + <&dma0 AT91_XDMAC_DT_PERID(42)>; + dma-names = "tx", "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>; + clock-names = "pclk", "gclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + adc: adc@e1000000 { compatible = "microchip,sama7g5-adc"; reg = <0xe1000000 0x200>; From patchwork Thu Dec 9 12:36:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 12695467 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C6BBC433F5 for ; Thu, 9 Dec 2021 12:38:28 +0000 (UTC) DKIM-Signature: v=1; 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d="scan'208";a="154857927" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2021 05:36:49 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 9 Dec 2021 05:36:49 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 9 Dec 2021 05:36:47 -0700 From: Tudor Ambarus To: , CC: , , , , , Tudor Ambarus Subject: [PATCH 2/2] ARM: dts: at91: sama7g5ek: Add QSPI0 node Date: Thu, 9 Dec 2021 14:36:43 +0200 Message-ID: <20211209123643.341892-2-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211209123643.341892-1-tudor.ambarus@microchip.com> References: <20211209123643.341892-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211209_043650_074283_1DDD0F4E X-CRM114-Status: UNSURE ( 9.35 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org QSPI0 comunicates with a MX66LM1G45G SPI NOR flash. Enable the controller and describe the flash. Signed-off-by: Tudor Ambarus --- arch/arm/boot/dts/at91-sama7g5ek.dts | 73 ++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index 0e1975c6812e..ccf9e224da78 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -13,6 +13,7 @@ #include "sama7g5.dtsi" #include #include +#include / { model = "Microchip SAMA7G5-EK"; @@ -134,6 +135,59 @@ &cpu0 { cpu-supply = <&vddcpu>; }; +&qspi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi>; + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <133000000>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + m25p,fast-read; + + at91bootstrap@0 { + label = "ospi: at91bootstrap"; + reg = <0x0 0x40000>; + }; + + bootloader@40000 { + label = "ospi: bootloader"; + reg = <0x40000 0xc0000>; + }; + + bootloaderenvred@100000 { + label = "ospi: bootloader env redundant"; + reg = <0x100000 0x40000>; + }; + + bootloaderenv@140000 { + label = "ospi: bootloader env"; + reg = <0x140000 0x40000>; + }; + + dtb@180000 { + label = "ospi: device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "ospi: kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "ospi: rootfs"; + reg = <0x800000 0x7800000>; + }; + + }; +}; + &dma0 { status = "okay"; }; @@ -555,6 +609,25 @@ pinctrl_mikrobus1_spi: mikrobus1_spi { bias-disable; }; + pinctrl_qspi: qspi { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + slew-rate = <0>; + atmel,drive-strength = ; + }; + pinctrl_sdmmc0_default: sdmmc0_default { cmd_data { pinmux = ,