From patchwork Sun Dec 12 19:15:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 12695811 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50E46C433EF for ; Sun, 12 Dec 2021 19:18:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=k6hOgOCPHVOUuklxNc1UnnHLjr+pVo8mE/c/iZLHddM=; b=nT/6pZluFzBuM5 OT06bt6A6aUkHutaRXAMbtXfrcmCRBu6+UiCqKxpWqnIbPFz1Hz4mlxNIG/aSaP6xzO0fA4Vkx3sE J2BYveUIZXdDzy6ENLgve6uoglisC18R2o9b1fdgtZgxKErOn7NgV0xGFgHLQnSIJjcQmNBikrH3n r0LSLkdqv4fTp0rkloTfs43LZ5yc5AK5APaA4R7X7RJyKYjLMEcmPpL+zBdhwHmcmiyhYrw8Tmg0f 0kR9LTFxakY4dZZZ3kIR5zbtpns1zF7jDFGCEmY+3hjhTZwxOELEdohqntpZ454YdMlJnAaVLhBSA +YEPgo2kMi++JRTF9ZOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mwUKb-0071vZ-GX; Sun, 12 Dec 2021 19:16:21 +0000 Received: from ns.lynxeye.de ([87.118.118.114] helo=lynxeye.de) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mwUKX-0071v0-KG for linux-arm-kernel@lists.infradead.org; Sun, 12 Dec 2021 19:16:19 +0000 Received: by lynxeye.de (Postfix, from userid 501) id 2C85BE74217; Sun, 12 Dec 2021 20:15:45 +0100 (CET) Received: from astat.fritz.box (a89-183-66-37.net-htp.de [89.183.66.37]) by lynxeye.de (Postfix) with ESMTPA id 08540E7420D; Sun, 12 Dec 2021 20:15:44 +0100 (CET) From: Lucas Stach To: Shawn Guo Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , =?utf-8?q?Guido_G=C3=BCnther?= , Martin Kepplinger , linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm64: dts: imx8mq: disable DDRC node by default Date: Sun, 12 Dec 2021 20:15:41 +0100 Message-Id: <20211212191541.2148178-1-dev@lynxeye.de> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211212_111617_860937_C9CEAA95 X-CRM114-Status: GOOD ( 12.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Without a OPP table or a downstream TF-A running on the system the DDRC will fail to probe, as it has no means to scale the DRAM frequency in that case. This however will block the bus scaling driver to come up and this in turn prevents other devices that hook into the interconnect from probing. If the DDRC is disabled, the interconnect driver will simply ignore it. As most systems don't want to scale the DRAM frequency, disable the node by default and only enable it on the systems that actually uses this capability and provides a valid OPP table in the DT. Signed-off-by: Lucas Stach Reviewed-by: Fabio Estevam Acked-by: Martin Kepplinger Reviewed-by: Guido Günther --- arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 + arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 1 + arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 + 3 files changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index b83df77195ec..e989a9e450ed 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -122,6 +122,7 @@ &A53_3 { }; &ddrc { + status = "okay"; operating-points-v2 = <&ddrc_opp_table>; ddrc_opp_table: opp-table { diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi index 60d47c71499b..5c0e98c36f94 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi @@ -238,6 +238,7 @@ &A53_3 { }; &ddrc { + status = "okay"; operating-points-v2 = <&ddrc_opp_table>; ddrc_opp_table: opp-table { diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 972766b67a15..f5af9765e239 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1554,6 +1554,7 @@ ddrc: memory-controller@3d400000 { <&clk IMX8MQ_DRAM_PLL_OUT>, <&clk IMX8MQ_CLK_DRAM_ALT>, <&clk IMX8MQ_CLK_DRAM_APB>; + status = "disabled"; }; ddr-pmu@3d800000 {