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To work around this breakage, the OF bindings for IRQs have introduced a table of "OF IRQ interrupt-map abusers". This can be seen in commit de4adddcbcc2 ("of/irq: Add a quirk for controllers with their own definition of interrupt-map"). To stop being abusers, let's go back to the original form of these bindings, before Rob's review. Compatibility will be kept with the current abusive bindings for a few more kernel cycles, to give people some time to update. But to also give them an incentive, print a warning that the support for "interrupt-map" will be removed. This will be seen when running a new kernel with an old device tree. While the breakage was introduced relatively recently, the device tree changes are intended to backport stable kernels for quicker conversion to an acceptable set of bindings, and this driver will need to support the updated stable bindings. Fixes: 0dcd9f872769 ("irqchip: Add support for Layerscape external interrupt lines") Signed-off-by: Vladimir Oltean --- drivers/irqchip/irq-ls-extirq.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-ls-extirq.c b/drivers/irqchip/irq-ls-extirq.c index 853b3972dbe7..b6ecc5e3472f 100644 --- a/drivers/irqchip/irq-ls-extirq.c +++ b/drivers/irqchip/irq-ls-extirq.c @@ -101,9 +101,15 @@ ls_extirq_parse_map(struct ls_extirq_data *priv, struct device_node *node) u32 mapsize; int ret; - map = of_get_property(node, "interrupt-map", &mapsize); - if (!map) - return -ENOENT; + map = of_get_property(node, "fsl,extirq-map", &mapsize); + if (!map) { + map = of_get_property(node, "interrupt-map", &mapsize); + if (!map) + return -ENOENT; + + pr_warn("\"interrupt-map\" is a reserved OF property, and support for it will be removed. Please use \"fsl,extirq-map\" instead.\n"); + } + if (mapsize % sizeof(*map)) return -EINVAL; mapsize /= sizeof(*map); From patchwork Tue Dec 14 01:37:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12696002 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1694C433F5 for ; Tue, 14 Dec 2021 01:41:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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b=MYHqnUtjyXQRDuI46NbsMOrcOyGt5ieYcZimXLQ0+QxxtPkM6xvD5rbTUmUiGyWUBd9RuG1u/0I+M820/mvLwmo46rWrZ8y8LcTFLJe823GRx6KfXdam795HHYlZmxbpoMdKRmdUby+W2BBodg6j/AkVa+vdZOqDaaHTy2V+ibU= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) by VI1PR04MB6944.eurprd04.prod.outlook.com (2603:10a6:803:133::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4778.16; Tue, 14 Dec 2021 01:38:37 +0000 Received: from VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::c84:1f0b:cc79:9226]) by VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::c84:1f0b:cc79:9226%3]) with mapi id 15.20.4755.028; Tue, 14 Dec 2021 01:38:36 +0000 From: Vladimir Oltean To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier , Rob Herring , Shawn Guo , Li Yang , Biwen Li , Zhiqiang Hou , Kurt Kanzenbach , Rasmus Villemoes Subject: [RFC PATCH devicetree 02/10] Revert "arm64: dts: freescale: Fix 'interrupt-map' parent address cells" Date: Tue, 14 Dec 2021 03:37:52 +0200 Message-Id: <20211214013800.2703568-3-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211214013800.2703568-1-vladimir.oltean@nxp.com> References: <20211214013800.2703568-1-vladimir.oltean@nxp.com> X-ClientProxiedBy: AS8PR04CA0168.eurprd04.prod.outlook.com (2603:10a6:20b:331::23) To VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) MIME-Version: 1.0 Received: from localhost.localdomain (188.25.173.50) by AS8PR04CA0168.eurprd04.prod.outlook.com (2603:10a6:20b:331::23) with Microsoft SMTP Server (version=TLS1_2, cipher=) via Frontend Transport; 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That updated the expected device tree binding format for the ls-extirq driver, without also updating the parsing code to the new format. While the fsl-extirq driver may have a non-standard format (one that doesn't take into consideration the #address-cells of the interrupt parent), it also has no business in making use of the "interrupt-map" property in the first place. So the argument for the blamed patch was kind of moot in the first place. This change restores LS1088A, LS2088A/LS2085A and LX2160A to their previous bindings. A follow-up change will also rename "interrupt-map" to "fsl,extirq-map" to prevent any further automatic conversions from causing breakage. Keeping the revert as a separate change allows those renaming changes to look the same on kernels that include the reverted patch as on kernels that don't. Fixes: 869f0ec048dc ("arm64: dts: freescale: Fix 'interrupt-map' parent address cells") Signed-off-by: Vladimir Oltean --- .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 24 +++++++++---------- .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 24 +++++++++---------- .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 24 +++++++++---------- 3 files changed, 36 insertions(+), 36 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index f891ef6a3754..605072317243 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -241,18 +241,18 @@ extirq: interrupt-controller@14 { interrupt-controller; reg = <0x14 4>; interrupt-map = - <0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, - <5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, - <6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, - <11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupt-map-mask = <0xffffffff 0x0>; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 3cb9c21d2775..1282b61da8a5 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -293,18 +293,18 @@ extirq: interrupt-controller@14 { interrupt-controller; reg = <0x14 4>; interrupt-map = - <0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, - <5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, - <6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, - <11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupt-map-mask = <0xffffffff 0x0>; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index dc8661ebd1f6..c4b1a59ba424 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -680,18 +680,18 @@ extirq: interrupt-controller@14 { interrupt-controller; reg = <0x14 4>; interrupt-map = - <0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, - <5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, - <6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, - <11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupt-map-mask = <0xffffffff 0x0>; }; }; From patchwork Tue Dec 14 01:37:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12696004 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E0C8C433F5 for ; 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Signed-off-by: Vladimir Oltean --- .../bindings/interrupt-controller/fsl,ls-extirq.txt | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt index 4d47df1a5c91..cddf1aa032be 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt @@ -18,9 +18,13 @@ Required properties: - reg: Specifies the Interrupt Polarity Control Register (INTPCR) in the SCFG or the External Interrupt Control Register (IRQCR) in the ISC. -- interrupt-map: Specifies the mapping from external interrupts to GIC - interrupts. -- interrupt-map-mask: Must be <0xffffffff 0>. +- fsl,extirq-map: An array of elements through which the mapping between + external interrupts and GIC interrupts is specified. The first member of each + array element is the index of the extirq line. The second member must be + zero. The third member must be a phandle to the interrupt parent (the GIC). + The remaining number of members in an array element depends on the + #interrupt-cells property of the interrupt parent, and are used to specify + the parent interrupt. Example: scfg: scfg@1570000 { @@ -37,14 +41,13 @@ Example: #address-cells = <0>; interrupt-controller; reg = <0x1ac 4>; - interrupt-map = + fsl,extirq-map = <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - interrupt-map-mask = <0xffffffff 0x0>; }; }; From patchwork Tue Dec 14 01:37:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12696003 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2FA3AC433EF for ; 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This change modifies the device trees for the LS1043A to use a driver-specific OF property for that purpose. The change is intended to target stable kernels, to accelerate the conversion and ultimate removal of the improperly used "interrupt-map" property. Note that "interrupt-map-mask" isn't needed now (nor was it needed before, it was just there to keep an apparent compatibility in form with the reserved "interrupt-map" property). So delete it. Fixes: 3f8c61a567eb ("arm64: dts: ls1043a: add DT node for external interrupt lines") Signed-off-by: Vladimir Oltean --- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 01b01e320411..62958b784171 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -322,7 +322,7 @@ extirq: interrupt-controller@1ac { #address-cells = <0>; interrupt-controller; reg = <0x1ac 4>; - interrupt-map = + fsl,extirq-map = <0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, @@ -335,7 +335,6 @@ extirq: interrupt-controller@1ac { <9 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, <10 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, <11 0 &gic GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; - interrupt-map-mask = <0xffffffff 0x0>; }; }; From patchwork Tue Dec 14 01:37:55 2021 Content-Type: text/plain; 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This change modifies the device trees for the LS1046A to use a driver-specific OF property for that purpose. The change is intended to target stable kernels, to accelerate the conversion and ultimate removal of the improperly used "interrupt-map" property. Note that "interrupt-map-mask" isn't needed now (nor was it needed before, it was just there to keep an apparent compatibility in form with the reserved "interrupt-map" property). So delete it. Fixes: 7968344126e5 ("arm64: dts: ls1046a: add DT node for external interrupt lines") Signed-off-by: Vladimir Oltean --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 687fea6d8afa..c735469010b7 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -328,7 +328,7 @@ extirq: interrupt-controller@1ac { #address-cells = <0>; interrupt-controller; reg = <0x1ac 4>; - interrupt-map = + fsl,extirq-map = <0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, @@ -341,7 +341,6 @@ extirq: interrupt-controller@1ac { <9 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, <10 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, <11 0 &gic GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; - interrupt-map-mask = <0xffffffff 0x0>; }; }; From patchwork Tue Dec 14 01:37:56 2021 Content-Type: text/plain; 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This change modifies the device trees for the LS1088A to use a driver-specific OF property for that purpose. The change is intended to target stable kernels, to accelerate the conversion and ultimate removal of the improperly used "interrupt-map" property. Note that "interrupt-map-mask" isn't needed now (nor was it needed before, it was just there to keep an apparent compatibility in form with the reserved "interrupt-map" property). So delete it. Fixes: 0e88b5fd565d ("arm64: dts: ls1088a: add DT node for external interrupt lines") Signed-off-by: Vladimir Oltean --- arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index 605072317243..53ecc25a24a2 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -240,7 +240,7 @@ extirq: interrupt-controller@14 { #address-cells = <0>; interrupt-controller; reg = <0x14 4>; - interrupt-map = + fsl,extirq-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, @@ -253,7 +253,6 @@ extirq: interrupt-controller@14 { <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - interrupt-map-mask = <0xffffffff 0x0>; }; }; From patchwork Tue Dec 14 01:37:57 2021 Content-Type: text/plain; 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This change modifies the device trees for the LS2 family of devices to use a driver-specific OF property for that purpose. The change is intended to target stable kernels, to accelerate the conversion and ultimate removal of the improperly used "interrupt-map" property. Note that "interrupt-map-mask" isn't needed now (nor was it needed before, it was just there to keep an apparent compatibility in form with the reserved "interrupt-map" property). So delete it. Fixes: ebb0713736ac ("arm64: dts: ls208xa: add DT node for external interrupt lines") Signed-off-by: Vladimir Oltean --- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 1282b61da8a5..50d530d66750 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -292,7 +292,7 @@ extirq: interrupt-controller@14 { #address-cells = <0>; interrupt-controller; reg = <0x14 4>; - interrupt-map = + fsl,extirq-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, @@ -305,7 +305,6 @@ extirq: interrupt-controller@14 { <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - interrupt-map-mask = <0xffffffff 0x0>; }; }; From patchwork Tue Dec 14 01:37:58 2021 Content-Type: text/plain; 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This change modifies the device trees for LX2160A and LX2162A to use a driver-specific OF property for that purpose. The change is intended to target stable kernels, to accelerate the conversion and ultimate removal of the improperly used "interrupt-map" property. Note that "interrupt-map-mask" isn't needed now (nor was it needed before, it was just there to keep an apparent compatibility in form with the reserved "interrupt-map" property). So delete it. Fixes: 332b6a79b415 ("arm64: dts: lx2160a: add DT node for external interrupt lines") Signed-off-by: Vladimir Oltean --- arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index c4b1a59ba424..c12cc402b566 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -679,7 +679,7 @@ extirq: interrupt-controller@14 { #address-cells = <0>; interrupt-controller; reg = <0x14 4>; - interrupt-map = + fsl,extirq-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, @@ -692,7 +692,6 @@ extirq: interrupt-controller@14 { <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - interrupt-map-mask = <0xffffffff 0x0>; }; }; From patchwork Tue Dec 14 01:37:59 2021 Content-Type: text/plain; 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This change modifies the device trees for the LS1021A to use a driver-specific OF property for that purpose. The change is intended to target stable kernels, to accelerate the conversion and ultimate removal of the improperly used "interrupt-map" property. Note that "interrupt-map-mask" isn't needed now (nor was it needed before, it was just there to keep an apparent compatibility in form with the reserved "interrupt-map" property). So delete it. Fixes: d27f9d634c9b ("ARM: dts: ls1021a: add node describing external interrupt lines") Signed-off-by: Vladimir Oltean --- arch/arm/boot/dts/ls1021a.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 2e69d6eab4d1..1efdfeb9c110 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -185,14 +185,13 @@ extirq: interrupt-controller@1ac { #address-cells = <0>; interrupt-controller; reg = <0x1ac 4>; - interrupt-map = + fsl,extirq-map = <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - interrupt-map-mask = <0xffffffff 0x0>; }; }; From patchwork Tue Dec 14 01:38:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12696011 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA4F2C433EF for ; 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Received: from VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) by VI1PR04MB6944.eurprd04.prod.outlook.com (2603:10a6:803:133::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4778.16; Tue, 14 Dec 2021 01:38:46 +0000 Received: from VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::c84:1f0b:cc79:9226]) by VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::c84:1f0b:cc79:9226%3]) with mapi id 15.20.4755.028; Tue, 14 Dec 2021 01:38:46 +0000 From: Vladimir Oltean To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier , Rob Herring , Shawn Guo , Li Yang , Biwen Li , Zhiqiang Hou , Kurt Kanzenbach , Rasmus Villemoes Subject: [RFC PATCH devicetree 10/10] dt-bindings: ls-extirq: add a YAML schema for the validator Date: Tue, 14 Dec 2021 03:38:00 +0200 Message-Id: <20211214013800.2703568-11-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211214013800.2703568-1-vladimir.oltean@nxp.com> References: <20211214013800.2703568-1-vladimir.oltean@nxp.com> X-ClientProxiedBy: AS8PR04CA0168.eurprd04.prod.outlook.com (2603:10a6:20b:331::23) To VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) MIME-Version: 1.0 Received: from localhost.localdomain (188.25.173.50) by AS8PR04CA0168.eurprd04.prod.outlook.com (2603:10a6:20b:331::23) with Microsoft SMTP Server (version=TLS1_2, cipher=) via Frontend Transport; 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The description of fsl,extirq-map is best effort: it looks like the devicetree schema doesn't really like vendor properties getting too complicated, and puts a bunch of descriptions on what they can and can't describe. An array of uint32s is the best I could come up with. It doesn't help, either, that the schemas/interrupt-controller.yaml definition for interrupt-map, which I was planning to use as an inspiration, is "true # FIXME", all things which aren't valid in vendor properties. Signed-off-by: Vladimir Oltean --- .../interrupt-controller/fsl,ls-extirq.txt | 56 --------- .../interrupt-controller/fsl,ls-extirq.yaml | 110 ++++++++++++++++++ 2 files changed, 110 insertions(+), 56 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt deleted file mode 100644 index cddf1aa032be..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt +++ /dev/null @@ -1,56 +0,0 @@ -* Freescale Layerscape external IRQs - -Some Layerscape SOCs (LS1021A, LS1043A, LS1046A -LS1088A, LS208xA, LX216xA) support inverting -the polarity of certain external interrupt lines. - -The device node must be a child of the node representing the -Supplemental Configuration Unit (SCFG). - -Required properties: -- compatible: should be "fsl,-extirq", e.g. "fsl,ls1021a-extirq". - "fsl,ls1043a-extirq": for LS1043A, LS1046A. - "fsl,ls1088a-extirq": for LS1088A, LS208xA, LX216xA. -- #interrupt-cells: Must be 2. The first element is the index of the - external interrupt line. The second element is the trigger type. -- #address-cells: Must be 0. -- interrupt-controller: Identifies the node as an interrupt controller -- reg: Specifies the Interrupt Polarity Control Register (INTPCR) in - the SCFG or the External Interrupt Control Register (IRQCR) in - the ISC. -- fsl,extirq-map: An array of elements through which the mapping between - external interrupts and GIC interrupts is specified. The first member of each - array element is the index of the extirq line. The second member must be - zero. The third member must be a phandle to the interrupt parent (the GIC). - The remaining number of members in an array element depends on the - #interrupt-cells property of the interrupt parent, and are used to specify - the parent interrupt. - -Example: - scfg: scfg@1570000 { - compatible = "fsl,ls1021a-scfg", "syscon"; - reg = <0x0 0x1570000 0x0 0x10000>; - big-endian; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x1570000 0x10000>; - - extirq: interrupt-controller@1ac { - compatible = "fsl,ls1021a-extirq"; - #interrupt-cells = <2>; - #address-cells = <0>; - interrupt-controller; - reg = <0x1ac 4>; - fsl,extirq-map = - <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, - <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, - <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, - <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, - <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, - <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - - interrupts-extended = <&gic GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, - <&extirq 1 IRQ_TYPE_LEVEL_LOW>; diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml new file mode 100644 index 000000000000..ead5f58949b8 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-extirq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Layerscape external interrupt driver + +maintainers: + - Rasmus Villemoes + +description: | + Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA, LX216xA) + support inverting the polarity of certain external interrupt lines. + The device node must be a child of the node representing the + Supplemental Configuration Unit (SCFG). + +properties: + compatible: + oneOf: + - const: fsl,ls1021a-extirq + - const: fsl,ls1043a-extirq + - const: fsl,ls1088a-extirq + - items: + - const: fsl,ls1046a-extirq + - const: fsl,ls1043a-extirq + - items: + - const: fsl,lx2160a-extirq + - const: fsl,ls1088a-extirq + - items: + - const: fsl,ls2080a-extirq + - const: fsl,ls1088a-extirq + + reg: + description: | + Specifies the offset to the Interrupt Polarity Control Register (INTPCR) + in the SCFG or the External Interrupt Control Register (IRQCR) in the + ISC. + maxItems: 1 + + "#interrupt-cells": + description: | + Specifies the number of cells needed to encode an interrupt source. Must + be equal to 2. The first element is the index of the external interrupt + line. The second element is the trigger type. + const: 2 + + "#address-cells": + const: 0 + + interrupt-controller: true + + fsl,extirq-map: + description: | + An array of elements through which the mapping between external + interrupts and GIC interrupts is specified. This isn't really a phandle + array, it just contains some phandles. It should really be an array where + the items are extirq-map-spec elements, but it seems like the + vendor-props.yaml don't allow us to reference such things. + type: object + $ref: "/schemas/types.yaml#/definitions/phandle-array" + +required: + - compatible + - reg + - "#interrupt-cells" + - interrupt-controller + - fsl,extirq-map + +additionalProperties: false + +$defs: + extirq-map-spec: + description: | + The first member of each array element is the index of the extirq line. + The second member must be zero. The third member must be a phandle to the + interrupt parent. The remaining number of members in an array element + depends on the "#interrupt-cells" property of the interrupt parent, and + are used to specify the parent interrupt. + type: array + items: + $ref: "/schemas/types.yaml#/definitions/cell" + minItems: 4 + maxItems: 4095 + +examples: + - | + scfg: scfg@1570000 { + compatible = "fsl,ls1021a-scfg", "syscon"; + reg = <0x0 0x1570000 0x0 0x10000>; + big-endian; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x1570000 0x10000>; + + extirq: interrupt-controller@1ac { + compatible = "fsl,ls1021a-extirq"; + #interrupt-cells = <2>; + #address-cells = <0>; + interrupt-controller; + reg = <0x1ac 4>; + fsl,extirq-map = + <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + }; + };