From patchwork Fri Dec 17 10:22:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 12696607 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BF8BDC433EF for ; Fri, 17 Dec 2021 10:23:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=sDn2eJBFgKrZuAYfj5n7snlk/guhYoTI3qCkAQwYDmI=; b=fe7ly8TISY22/7 /VOvH+lUCM+kS2dUY48VYXJKp5/62Q+zXVHLJrsDKP3AamMXqVAVF49TAMCsSdpsAlVjU2bNX5dOG lUxlwBJej2Ee6vGTDs5eqPP9fjLG2XIWn7PTt+Tx5qhm6qBiGQN3nwOWCa0zixFFXcBfeGyIDspWU K+YTcy5InoiDlEQtOW+aWZ1yRKnAlb7HxtVUsdSmv0B283Sk1YWLI8ekYTRuPTeFn4XtNrezCz3YL EllW1j2pi86eWPIzbswV3aiAbn44X+1Q2i+frsXZ/kNlvHSX7LfjnWiahiN4v/xQBjdPxzJG2fdk7 J7/j47+CKiwCX5YgBz4w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1myANa-009TKm-0I; Fri, 17 Dec 2021 10:22:22 +0000 Received: from mx1.tq-group.com ([93.104.207.81]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1myANV-009TJh-Ho for linux-arm-kernel@lists.infradead.org; Fri, 17 Dec 2021 10:22:19 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1639736537; x=1671272537; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=5I0ihnvMfqLIh9RRN7QgcnQvk3v4jjiIATukGz9d5P4=; b=F7BclIkIBEzQjtrQMkmwPXODXanCgNPikShXy2NUjUw2UhicZ1VOX1rZ cCduoAMD6MmHyPXYWsVQHkc3iahPL5L8WtHdCoe/OePFejXyHPtiVdVxX fG5rcOuXpxeAfbUd2VVBe89I6B5TE8xLXUHGg6K33KeOAreGB/OTLAM2s g0f58+Iiho0I2Cxe3H2O/IBbBDoi0oqrKn+ONUS/C88wKtQEWgO4D/31T D6moiyXRWoQ+92lW5CNF+SQ1fPXHm8mLf5p+cGazZbX2zl0/5O+qBbNjq 4Ar4ZPLNu9lym7k/LignuGIacOtdDwbwvLhHueXaYEEKKVeJHtiAo1G+Q A==; X-IronPort-AV: E=Sophos;i="5.88,213,1635199200"; d="scan'208";a="21118820" Received: from unknown (HELO tq-pgp-pr1.tq-net.de) ([192.168.6.15]) by mx1-pgp.tq-group.com with ESMTP; 17 Dec 2021 11:22:15 +0100 Received: from mx1.tq-group.com ([192.168.6.7]) by tq-pgp-pr1.tq-net.de (PGP Universal service); Fri, 17 Dec 2021 11:22:15 +0100 X-PGP-Universal: processed; by tq-pgp-pr1.tq-net.de on Fri, 17 Dec 2021 11:22:15 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1639736535; x=1671272535; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=5I0ihnvMfqLIh9RRN7QgcnQvk3v4jjiIATukGz9d5P4=; b=UdCMEYAA3WaoEnVmKXwuTX1290UPNb29L4JEoJoZ4zVD3YGtnVNdcwNU ga1/S1IWPipNyEk1Rp3y2uYINh5Ccph14Kmbh3pE4uD76VDRpfOTzLVkQ C+Yqv9Ajz+SybF+Wybt0rxPTdFi42xUoh0rVfdF0jHaZ8djTw7L+ZFM+S 4av4TL1pIl+wwiISso+Qq6kRWgbWYs1f1QoQa/MserJJTCy1cSrgmMdLs pKLXXxHFal0K0K4FFhh2SeXEPr4mrQ4utMopkdGobZ58fs7//6CutsHZJ pncS3i2zTl7NqyC0kVPZBRQAxckJF9wQzBgoZhyYz/AUtbrvCywsSWJ1f g==; X-IronPort-AV: E=Sophos;i="5.88,213,1635199200"; d="scan'208";a="21118819" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 17 Dec 2021 11:22:15 +0100 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 989C1280065; Fri, 17 Dec 2021 11:22:15 +0100 (CET) From: Alexander Stein To: Rob Herring , Shawn Guo , Sascha Hauer Cc: Alexander Stein , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/1] arm64: dts: tqma8mqml: add PCIe support Date: Fri, 17 Dec 2021 11:22:07 +0100 Message-Id: <20211217102207.722897-1-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211217_022217_965605_FF881843 X-CRM114-Status: GOOD ( 12.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add PCIe support to TQMa8MxML series. Signed-off-by: Alexander Stein --- This goes on top of the series recently applied to pci/dwc [1]: [PATCH v7 0/8] Add the imx8m pcie phy driver and imx8mm pcie support [1] https://patchwork.kernel.org/project/linux-pci/list/?series=589031&state=* .../dts/freescale/imx8mm-tqma8mqml-mba8mx.dts | 19 +++++++++++++++++++ .../boot/dts/freescale/imx8mm-tqma8mqml.dtsi | 5 +++++ arch/arm64/boot/dts/freescale/mba8mx.dtsi | 6 ++++++ 3 files changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts index 7844878788f4..286d2df01cfa 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include #include "imx8mm-tqma8mqml.dtsi" #include "mba8mx.dtsi" @@ -58,6 +59,24 @@ expander2: gpio@27 { }; }; +&pcie_phy { + clocks = <&pcie0_refclk>; + status = "okay"; +}; + +&pcie0 { + reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>; + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, + <&pcie0_refclk>; + clock-names = "pcie", "pcie_aux", "pcie_bus"; + assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, + <&clk IMX8MM_CLK_PCIE1_CTRL>; + assigned-clock-rates = <10000000>, <250000000>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, + <&clk IMX8MM_SYS_PLL2_250M>; + status = "okay"; +}; + &sai3 { assigned-clocks = <&clk IMX8MM_CLK_SAI3>; assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi index 284e62acc0b4..16ee9b5179e6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi @@ -227,6 +227,11 @@ eeprom0: eeprom@57 { }; }; +&pcie_phy { + fsl,refclk-pad-mode = ; + fsl,clkreq-unsupported; +}; + &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi index e694dacb16af..42e12c190e9e 100644 --- a/arch/arm64/boot/dts/freescale/mba8mx.dtsi +++ b/arch/arm64/boot/dts/freescale/mba8mx.dtsi @@ -87,6 +87,12 @@ panel_in_lvds0: endpoint { }; }; + pcie0_refclk: pcie0-refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + reg_12v: regulator-12v { compatible = "regulator-fixed"; regulator-name = "MBA8MX_12V";