From patchwork Mon Dec 27 08:36:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?QXhlIFlhbmcgKOadqOejiik=?= X-Patchwork-Id: 12699621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DB68C433EF for ; Mon, 27 Dec 2021 08:39:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=oWKur61WzuqTIqP+YIygUsZOSsrw2boWs3ZpFG1Q/OY=; b=NxuCOpgni8c7F9 R4QBbu7F1QOP7sCN7Mxb33lPrcA+sv5M2hRuEu/rWDepjNYk/lRnHzBrTZUlIs4LkIkRZBSXbVm+g xDNVqqsxKtVeZMNqR8IbBtZxBk7V/kFABJEVqNJ6Umj6nFbUe2sqNDmIW/ZjBYnKg/PjMzJfxKozN CBg6+UizwLzqie3y5l3oRcK06XRsfO5YofhJCsXQJbvaAvDI4KrFEpLXY4CY30i/MVO67TUcg/Pdz Evga/DdsUIY8FinuZproGPPYeyiRrSj1w+EDvBboY8aqD53vRzpsIbw2yzlHcZ+m4z7C96r2gBXdK Pm+HBP2NixzKtRoLhSuA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n1lVw-00GNJL-Tb; Mon, 27 Dec 2021 08:37:53 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n1lVt-00GNIO-5w; Mon, 27 Dec 2021 08:37:50 +0000 X-UUID: 73f5a3dfe85246639cbf023c48a6f743-20211227 X-UUID: 73f5a3dfe85246639cbf023c48a6f743-20211227 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1589692963; Mon, 27 Dec 2021 01:37:20 -0700 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 27 Dec 2021 00:36:47 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 27 Dec 2021 16:36:46 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 27 Dec 2021 16:36:44 +0800 From: Axe Yang To: Ulf Hansson , Rob Herring , Chaotian Jing , Matthias Brugger , Adrian Hunter CC: Yoshihiro Shimoda , Satya Tangirala , Andy Shevchenko , Wolfram Sang , Axe Yang , Lucas Stach , Eric Biggers , Andrew Jeffery , Stephen Boyd , Kiwoong Kim , Yue Hu , Tian Tao , , , , , Subject: [PATCH v1 1/3] dt-bindings: mmc: add cap-sdio-async-int flag Date: Mon, 27 Dec 2021 16:36:39 +0800 Message-ID: <20211227083641.12538-2-axe.yang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211227083641.12538-1-axe.yang@mediatek.com> References: <20211227083641.12538-1-axe.yang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211227_003749_256507_F4A7DFFB X-CRM114-Status: UNSURE ( 9.84 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Asynchronous interrupt is a mechanism that allow SDIO devices alarm interrupt when host stop providing clock to card. Add a DT flag to enable this feature if it is supported by SDIO card. Signed-off-by: Axe Yang --- Documentation/devicetree/bindings/mmc/mmc-controller.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml index 25ac8e200970..7230421583c6 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -165,6 +165,11 @@ properties: description: eMMC hardware reset is supported + cap-sdio-async-int: + $ref: /schemas/types.yaml#/definitions/flag + description: + SDIO async interrupt is supported. + cap-sdio-irq: $ref: /schemas/types.yaml#/definitions/flag description: From patchwork Mon Dec 27 08:36:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?QXhlIFlhbmcgKOadqOejiik=?= X-Patchwork-Id: 12699623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 255DCC433F5 for ; Mon, 27 Dec 2021 08:39:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vSm6OPytzD0se5pCyNKw8Xb0YeohpCCn+kQkfrjvaPc=; b=ht2UtsDGlv5Yv9 vBU6pqNqzLtVlqJT11jC0ClQGnD0qV8a+3pKTXxGPQHCMK+J88W4Irx4dz152E8E33+24hAhBWAlz CEoXiGxDGfbQPKAXC8Rq70TCDU/BnpHUlTAROpZAVfxoORgs/WVt5rv5cPPDufB6+1GggUvXIGQWh 8SZAc1uzTfPb+e+hvXofSUlgV0DC2g6IziyenIPAv76kiZ353rxpEskO2sXBqE5ekWwUIpMXNhQdb n2NzAHqad5H5rpPsiVpgOkUf3BCd527a0VSaQ+0izHDQsa41+oRhOfqf+eMqkT0pNYiTQCT4wNpcN hWbCSyXzGfNG7PCCOh5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n1lWI-00GNNI-Jf; Mon, 27 Dec 2021 08:38:14 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n1lVu-00GNIN-Sy; Mon, 27 Dec 2021 08:37:52 +0000 X-UUID: f564a8f9fcf048528474dc95ac14b318-20211227 X-UUID: f564a8f9fcf048528474dc95ac14b318-20211227 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 874174784; Mon, 27 Dec 2021 01:37:20 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 27 Dec 2021 00:36:49 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 27 Dec 2021 16:36:47 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 27 Dec 2021 16:36:46 +0800 From: Axe Yang To: Ulf Hansson , Rob Herring , Chaotian Jing , Matthias Brugger , Adrian Hunter CC: Yoshihiro Shimoda , Satya Tangirala , Andy Shevchenko , Wolfram Sang , Axe Yang , Lucas Stach , Eric Biggers , Andrew Jeffery , Stephen Boyd , Kiwoong Kim , Yue Hu , Tian Tao , , , , , Subject: [PATCH v1 2/3] mmc: core: Add support for SDIO async interrupt Date: Mon, 27 Dec 2021 16:36:40 +0800 Message-ID: <20211227083641.12538-3-axe.yang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211227083641.12538-1-axe.yang@mediatek.com> References: <20211227083641.12538-1-axe.yang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211227_003750_969291_F6F14EE9 X-CRM114-Status: GOOD ( 16.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org If cap-sdio-async-int flag is set in host dts node, parse EAI information from SDIO CCCR interrupt externsion segment. If async interrupt is supported by SDIO card then send command to card to enable it and set enable_async_int flag in sdio_cccr structure to 1. The parse flow is implemented in sdio_read_cccr(). Signed-off-by: Axe Yang Acked-by: AngeloGioacchino Del Regno --- drivers/mmc/core/host.c | 2 ++ drivers/mmc/core/sdio.c | 17 +++++++++++++++++ include/linux/mmc/card.h | 3 ++- include/linux/mmc/host.h | 1 + include/linux/mmc/sdio.h | 5 +++++ 5 files changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index d4683b1d263f..7ad60fab099a 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c @@ -401,6 +401,8 @@ int mmc_of_parse(struct mmc_host *host) if (device_property_read_bool(dev, "no-mmc-hs400")) host->caps2 &= ~(MMC_CAP2_HS400_1_8V | MMC_CAP2_HS400_1_2V | MMC_CAP2_HS400_ES); + if (device_property_read_bool(dev, "cap-sdio-async-int")) + host->caps2 |= MMC_CAP2_SDIO_ASYNC_INT; /* Must be after "non-removable" check */ if (device_property_read_u32(dev, "fixed-emmc-driver-type", &drv_type) == 0) { diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index 68edf7a615be..335e4ada733a 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c @@ -225,6 +225,23 @@ static int sdio_read_cccr(struct mmc_card *card, u32 ocr) card->sw_caps.sd3_drv_type |= SD_DRIVER_TYPE_C; if (data & SDIO_DRIVE_SDTD) card->sw_caps.sd3_drv_type |= SD_DRIVER_TYPE_D; + + if (card->host->caps2 & MMC_CAP2_SDIO_ASYNC_INT) { + ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_INTERRUPT_EXT, 0, + &data); + if (ret) + goto out; + + if (data & SDIO_INTERRUPT_EXT_SAI) { + data |= SDIO_INTERRUPT_EXT_EAI; + ret = mmc_io_rw_direct(card, 1, 0, SDIO_CCCR_INTERRUPT_EXT, + data, NULL); + if (ret) + goto out; + + card->cccr.enable_async_int = 1; + } + } } /* if no uhs mode ensure we check for high speed */ diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index 37f975875102..b0deb8ca8eeb 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -219,7 +219,8 @@ struct sdio_cccr { wide_bus:1, high_power:1, high_speed:1, - disable_cd:1; + disable_cd:1, + enable_async_int:1; }; struct sdio_cis { diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 0c0c9a0fdf57..60c8ebe1a5e8 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -399,6 +399,7 @@ struct mmc_host { #define MMC_CAP2_CRYPTO 0 #endif #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */ +#define MMC_CAP2_SDIO_ASYNC_INT (1 << 29) /* SDIO host supports asynchronous interrupt */ int fixed_drv_type; /* fixed driver type for non-removable media */ diff --git a/include/linux/mmc/sdio.h b/include/linux/mmc/sdio.h index 2a05d1ac4f0e..1ef400f28642 100644 --- a/include/linux/mmc/sdio.h +++ b/include/linux/mmc/sdio.h @@ -159,6 +159,11 @@ #define SDIO_DTSx_SET_TYPE_A (1 << SDIO_DRIVE_DTSx_SHIFT) #define SDIO_DTSx_SET_TYPE_C (2 << SDIO_DRIVE_DTSx_SHIFT) #define SDIO_DTSx_SET_TYPE_D (3 << SDIO_DRIVE_DTSx_SHIFT) + +#define SDIO_CCCR_INTERRUPT_EXT 0x16 +#define SDIO_INTERRUPT_EXT_SAI (1 << 0) +#define SDIO_INTERRUPT_EXT_EAI (1 << 1) + /* * Function Basic Registers (FBR) */ From patchwork Mon Dec 27 08:36:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?QXhlIFlhbmcgKOadqOejiik=?= X-Patchwork-Id: 12699624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2D96C433EF for ; Mon, 27 Dec 2021 08:40:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8kfOOnG7Ce7s4CDI+4EAeblEmxOWNHTr8gMQqoRWdLY=; b=TNF2WZBEsz1YtE xJ/VzHJZwMMYHQVvnYe6P5kOZJatI2stTyZg/EHub/P8hftgoCiCm1ZAF1d0yfbG9G6vnajs2lxvo 2hYCyRy0TQitW9S5kgFtSFOi48BHhZZyGcMd8as9DdPJ+jis3NBjBWFuAIc4RSDFE8wGcXk09JH4O C+JJb2NAZomjZTvHRbmSAzKM63n8QHM01krHBVvubNGrhFD3HoIpbkRTbPtNjo9VTk+68ZAel9iCp qekoYGJT92+SbQsSt1/Y/xAJYt3VddiD2eaF1BC/vTK/9SR8qCGPgicz6O0KJ8xXWMAzA2bcp3WNW k6mObOMk4QfB9aklGb9A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n1lWV-00GNSd-6Z; Mon, 27 Dec 2021 08:38:27 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n1lW7-00GNK2-Su; Mon, 27 Dec 2021 08:38:05 +0000 X-UUID: 5c088ff2641a4c6ea4df09640fb071f2-20211227 X-UUID: 5c088ff2641a4c6ea4df09640fb071f2-20211227 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 206507554; Mon, 27 Dec 2021 01:37:37 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 27 Dec 2021 00:36:51 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 27 Dec 2021 16:36:49 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 27 Dec 2021 16:36:47 +0800 From: Axe Yang To: Ulf Hansson , Rob Herring , Chaotian Jing , Matthias Brugger , Adrian Hunter CC: Yoshihiro Shimoda , Satya Tangirala , Andy Shevchenko , Wolfram Sang , Axe Yang , Lucas Stach , Eric Biggers , Andrew Jeffery , Stephen Boyd , Kiwoong Kim , Yue Hu , Tian Tao , , , , , Subject: [PATCH v1 3/3] mmc: mediatek: add support for SDIO eint irq Date: Mon, 27 Dec 2021 16:36:41 +0800 Message-ID: <20211227083641.12538-4-axe.yang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211227083641.12538-1-axe.yang@mediatek.com> References: <20211227083641.12538-1-axe.yang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211227_003803_974140_4A417B24 X-CRM114-Status: GOOD ( 24.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for eint irq when MSDC is used as an SDIO host. This feature requires SDIO device support async irq function. With this feature,SDIO host can be awakened by SDIO card in suspend state, without additional pin. MSDC driver will time-share the SDIO DAT1 pin. During suspend, MSDC turn off clock and switch SDIO DAT1 pin to GPIO mode. And during resume, switch GPIO function back to DAT1 mode then turn on clock. Some device tree property should be added or modified in msdc node to support SDIO eint irq. Pinctrls named state_dat1 and state_eint are mandatory. And cap-sdio-async-int flag is necessary since this feature depends on asynchronous interrupt: &mmcX { ... pinctrl-names = "default", "state_uhs", "state_eint", "state_dat1"; ... pinctrl-2 = <&mmc2_pins_eint>; pinctrl-3 = <&mmc2_pins_dat1>; ... cap-sdio-async-int; ... }; Signed-off-by: Axe Yang --- drivers/mmc/host/mtk-sd.c | 113 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 107 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 4dfc246c5f95..8f23349f2963 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2014-2015 MediaTek Inc. + * Copyright (c) 2014-2021 MediaTek Inc. * Author: Chaotian.Jing */ @@ -432,9 +432,13 @@ struct msdc_host { struct pinctrl *pinctrl; struct pinctrl_state *pins_default; struct pinctrl_state *pins_uhs; + struct pinctrl_state *pins_eint; + struct pinctrl_state *pins_dat1; struct delayed_work req_timeout; int irq; /* host interrupt */ struct reset_control *reset; + int eint_irq; /* device interrupt */ + int sdio_irq_cnt; /* irq enable cnt */ struct clk *src_clk; /* msdc source clock */ struct clk *h_clk; /* msdc h_clk */ @@ -1519,10 +1523,12 @@ static void msdc_enable_sdio_irq(struct mmc_host *mmc, int enb) __msdc_enable_sdio_irq(host, enb); spin_unlock_irqrestore(&host->lock, flags); - if (enb) - pm_runtime_get_noresume(host->dev); - else - pm_runtime_put_noidle(host->dev); + if (mmc->card && !mmc->card->cccr.enable_async_int) { + if (enb) + pm_runtime_get_noresume(host->dev); + else + pm_runtime_put_noidle(host->dev); + } } static irqreturn_t msdc_cmdq_irq(struct msdc_host *host, u32 intsts) @@ -2380,6 +2386,49 @@ static const struct mmc_host_ops mt_msdc_ops = { .hw_reset = msdc_hw_reset, }; +static irqreturn_t msdc_sdio_eint_irq(int irq, void *dev_id) +{ + unsigned long flags; + struct msdc_host *host = (struct msdc_host *)dev_id; + struct mmc_host *mmc = mmc_from_priv(host); + + spin_lock_irqsave(&host->lock, flags); + if (likely(host->sdio_irq_cnt > 0)) { + disable_irq_nosync(host->eint_irq); + disable_irq_wake(host->eint_irq); + host->sdio_irq_cnt--; + } + spin_unlock_irqrestore(&host->lock, flags); + + sdio_signal_irq(mmc); + + return IRQ_HANDLED; +} + +static int msdc_request_dat1_eint_irq(struct msdc_host *host) +{ + struct gpio_desc *desc; + int ret = 0; + int irq; + + desc = devm_gpiod_get_index(host->dev, "eint", 0, GPIOD_IN); + if (IS_ERR(desc)) + return PTR_ERR(desc); + + irq = gpiod_to_irq(desc); + if (irq >= 0) { + irq_set_status_flags(irq, IRQ_NOAUTOEN); + ret = devm_request_threaded_irq(host->dev, irq, NULL, msdc_sdio_eint_irq, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + "sdio-eint", host); + } else { + ret = irq; + } + + host->eint_irq = irq; + return ret; +} + static const struct cqhci_host_ops msdc_cmdq_ops = { .enable = msdc_cqe_enable, .disable = msdc_cqe_disable, @@ -2534,6 +2583,19 @@ static int msdc_drv_probe(struct platform_device *pdev) goto host_free; } + /* Support for SDIO eint irq */ + host->pins_eint = pinctrl_lookup_state(host->pinctrl, "state_eint"); + if (IS_ERR(host->pins_eint)) { + dev_dbg(&pdev->dev, "Cannot find pinctrl eint!\n"); + } else { + host->pins_dat1 = pinctrl_lookup_state(host->pinctrl, "state_dat1"); + if (IS_ERR(host->pins_dat1)) { + ret = PTR_ERR(host->pins_dat1); + dev_err(&pdev->dev, "Cannot find pinctrl dat1!\n"); + goto host_free; + } + } + msdc_of_property_parse(pdev, host); host->dev = &pdev->dev; @@ -2621,6 +2683,16 @@ static int msdc_drv_probe(struct platform_device *pdev) if (ret) goto release; + if (!IS_ERR(host->pins_eint) && !IS_ERR(host->pins_dat1)) { + ret = msdc_request_dat1_eint_irq(host); + if (ret) { + dev_err(host->dev, "Failed to register data1 eint irq!\n"); + goto release; + } + + pinctrl_select_state(host->pinctrl, host->pins_dat1); + } + pm_runtime_set_active(host->dev); pm_runtime_set_autosuspend_delay(host->dev, MTK_MMC_AUTOSUSPEND_DELAY); pm_runtime_use_autosuspend(host->dev); @@ -2740,21 +2812,50 @@ static void msdc_restore_reg(struct msdc_host *host) static int __maybe_unused msdc_runtime_suspend(struct device *dev) { + unsigned long flags; struct mmc_host *mmc = dev_get_drvdata(dev); struct msdc_host *host = mmc_priv(mmc); msdc_save_reg(host); + + if (!IS_ERR(host->pins_eint)) { + disable_irq(host->irq); + pinctrl_select_state(host->pinctrl, host->pins_eint); + spin_lock_irqsave(&host->lock, flags); + if (host->sdio_irq_cnt == 0) { + enable_irq(host->eint_irq); + enable_irq_wake(host->eint_irq); + host->sdio_irq_cnt++; + } + sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); + spin_unlock_irqrestore(&host->lock, flags); + } msdc_gate_clock(host); return 0; } static int __maybe_unused msdc_runtime_resume(struct device *dev) { + unsigned long flags; struct mmc_host *mmc = dev_get_drvdata(dev); struct msdc_host *host = mmc_priv(mmc); msdc_ungate_clock(host); msdc_restore_reg(host); + if (!IS_ERR(host->pins_eint)) { + spin_lock_irqsave(&host->lock, flags); + if (host->sdio_irq_cnt > 0) { + disable_irq_nosync(host->eint_irq); + disable_irq_wake(host->eint_irq); + host->sdio_irq_cnt--; + sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); + } else { + sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); + } + spin_unlock_irqrestore(&host->lock, flags); + pinctrl_select_state(host->pinctrl, host->pins_uhs); + enable_irq(host->irq); + } return 0; } @@ -2778,7 +2879,7 @@ static int __maybe_unused msdc_resume(struct device *dev) } static const struct dev_pm_ops msdc_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(msdc_suspend, msdc_resume) + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(msdc_suspend, msdc_resume) SET_RUNTIME_PM_OPS(msdc_runtime_suspend, msdc_runtime_resume, NULL) };