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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id i21sm2126536qti.31.2022.01.06.09.31.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jan 2022 09:31:40 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, daniel.lezcano@linaro.org, rafael@kernel.org, rui.zhang@intel.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [Patch v3 1/3] thermal: qcom: lmh: Add support for sm8150 Date: Thu, 6 Jan 2022 12:31:36 -0500 Message-Id: <20220106173138.411097-2-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220106173138.411097-1-thara.gopinath@linaro.org> References: <20220106173138.411097-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add compatible to support LMh for sm8150 SoC. sm8150 does not require explicit enabling for various LMh subsystems. Add a variable indicating the same as match data which is set for sdm845. Execute the piece of code enabling various LMh subsystems only if enable algorithm match data is present. Signed-off-by: Thara Gopinath Reviewed-by: Bjorn Andersson --- v2->v3: - use of_device_get_match_data to get the data from match table rather than using of_match_device and subsequent ->data, as per Bjorn's review comments. - Minor fixes as per Bjorn's review comments. v1->v2: - Added LMH_ENABLE_ALGOS of_device_id match data to indicate whether LMh subsytems need explicit enabling or not. drivers/thermal/qcom/lmh.c | 62 +++++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 27 deletions(-) diff --git a/drivers/thermal/qcom/lmh.c b/drivers/thermal/qcom/lmh.c index eafa7526eb8b..c7f91cbdccc7 100644 --- a/drivers/thermal/qcom/lmh.c +++ b/drivers/thermal/qcom/lmh.c @@ -28,6 +28,8 @@ #define LMH_REG_DCVS_INTR_CLR 0x8 +#define LMH_ENABLE_ALGOS 1 + struct lmh_hw_data { void __iomem *base; struct irq_domain *domain; @@ -90,6 +92,7 @@ static int lmh_probe(struct platform_device *pdev) struct device_node *cpu_node; struct lmh_hw_data *lmh_data; int temp_low, temp_high, temp_arm, cpu_id, ret; + unsigned int enable_alg; u32 node_id; lmh_data = devm_kzalloc(dev, sizeof(*lmh_data), GFP_KERNEL); @@ -141,32 +144,36 @@ static int lmh_probe(struct platform_device *pdev) if (!qcom_scm_lmh_dcvsh_available()) return -EINVAL; - ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) - dev_err(dev, "Error %d enabling current subfunction\n", ret); - - ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) - dev_err(dev, "Error %d enabling reliability subfunction\n", ret); - - ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) - dev_err(dev, "Error %d enabling BCL subfunction\n", ret); - - ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) { - dev_err(dev, "Error %d enabling thermal subfunction\n", ret); - return ret; - } - - ret = qcom_scm_lmh_profile_change(0x1); - if (ret) { - dev_err(dev, "Error %d changing profile\n", ret); - return ret; + enable_alg = (uintptr_t)of_device_get_match_data(dev); + + if (enable_alg) { + ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) + dev_err(dev, "Error %d enabling current subfunction\n", ret); + + ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) + dev_err(dev, "Error %d enabling reliability subfunction\n", ret); + + ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) + dev_err(dev, "Error %d enabling BCL subfunction\n", ret); + + ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) { + dev_err(dev, "Error %d enabling thermal subfunction\n", ret); + return ret; + } + + ret = qcom_scm_lmh_profile_change(0x1); + if (ret) { + dev_err(dev, "Error %d changing profile\n", ret); + return ret; + } } /* Set default thermal trips */ @@ -213,7 +220,8 @@ static int lmh_probe(struct platform_device *pdev) } static const struct of_device_id lmh_table[] = { - { .compatible = "qcom,sdm845-lmh", }, + { .compatible = "qcom,sdm845-lmh", .data = (void *)LMH_ENABLE_ALGOS}, + { .compatible = "qcom,sm8150-lmh", }, {} }; MODULE_DEVICE_TABLE(of, lmh_table); From patchwork Thu Jan 6 17:31:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 12705589 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2BEFC433FE for ; Thu, 6 Jan 2022 17:31:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241907AbiAFRbu (ORCPT ); Thu, 6 Jan 2022 12:31:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241849AbiAFRbn (ORCPT ); Thu, 6 Jan 2022 12:31:43 -0500 Received: from mail-qt1-x835.google.com (mail-qt1-x835.google.com [IPv6:2607:f8b0:4864:20::835]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9EEFC061212 for ; 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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id i21sm2126536qti.31.2022.01.06.09.31.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jan 2022 09:31:41 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, daniel.lezcano@linaro.org, rafael@kernel.org, rui.zhang@intel.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [Patch v3 2/3] arm64: dts: qcom: sm8150: Add support for LMh node Date: Thu, 6 Jan 2022 12:31:37 -0500 Message-Id: <20220106173138.411097-3-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220106173138.411097-1-thara.gopinath@linaro.org> References: <20220106173138.411097-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add LMh nodes for cpu cluster0 and cpu cluster1 for sm8150 SoC. Signed-off-by: Thara Gopinath Reviewed-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 81b4ff2cc4cd..e755d7ab78dd 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3650,6 +3650,30 @@ cpufreq_hw: cpufreq@18323000 { #freq-domain-cells = <1>; }; + lmh_cluster1: lmh@18350800 { + compatible = "qcom,sm8150-lmh"; + reg = <0 0x18350800 0 0x400>; + interrupts = ; + cpus = <&CPU4>; + qcom,lmh-temp-arm-millicelsius = <60000>; + qcom,lmh-temp-low-millicelsius = <84500>; + qcom,lmh-temp-high-millicelsius = <85000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + lmh_cluster0: lmh@18358800 { + compatible = "qcom,sm8150-lmh"; + reg = <0 0x18358800 0 0x400>; + interrupts = ; + cpus = <&CPU0>; + qcom,lmh-temp-arm-millicelsius = <60000>; + qcom,lmh-temp-low-millicelsius = <84500>; + qcom,lmh-temp-high-millicelsius = <85000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + wifi: wifi@18800000 { compatible = "qcom,wcn3990-wifi"; reg = <0 0x18800000 0 0x800000>; From patchwork Thu Jan 6 17:31:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 12705588 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A1C6C433F5 for ; Thu, 6 Jan 2022 17:31:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241879AbiAFRbo (ORCPT ); Thu, 6 Jan 2022 12:31:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41692 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241811AbiAFRbo (ORCPT ); Thu, 6 Jan 2022 12:31:44 -0500 Received: from mail-qt1-x82d.google.com (mail-qt1-x82d.google.com [IPv6:2607:f8b0:4864:20::82d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86664C06118A for ; Thu, 6 Jan 2022 09:31:43 -0800 (PST) Received: by mail-qt1-x82d.google.com with SMTP id c10so1263170qte.2 for ; Thu, 06 Jan 2022 09:31:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GgGIgMajEhcXcb+pSiiU8hULLmnW3Ix8+OrCDOiX3Lw=; b=Jo6aOpRcqwgI1DHuAffeVnOLWMf0maPodl1wC1IQJq7vARxmfu+Ue9aSJc4yugEI4p g/2Bq7w0n9AuMlWZlOOslHlaI8qBSCc0vtrE+g05Dkk7NZnFchZR3i7B6hJoegjpSE18 wfKSaXEugDx9AQIqP32HpdpeMj8P2f6r0queG+dCI2fjF7K5daJkAZI12QzVKyBE5gFt aMr0w98EAqRDp+2CBvDXAUK4CXzdJmkpfve6qvuhPXOV64Vjq27yLAXibZ/3QQQEbQAs iVhuJr3wFhiQzI0rpwndBz8ZESpWrmR3Xnmhx6ELhkbgeRY7c1PQ9KsfWeIGGq6suDHO XrLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GgGIgMajEhcXcb+pSiiU8hULLmnW3Ix8+OrCDOiX3Lw=; b=Qa+ZyoUmXc1r6JI9VpI+3MfmacmbMchAEzhIs/CLtQzjdZx0aDdcA+0Bvcgsl4FC+V MX0cX1TRr4Hy2dgzCb3OhWxod3hHr1fjJr9QjNiBvWnZEQYdb4p8/gej97BrEE61zf35 S8OziPjX4D8NtSYsVi8hVrBHgDUcjPN3Tt4Pur8SAfMmI3BTAwJOVFhJxFqI7dWLLy7w 1hdsmk5ROjhufufqKwRT9d5lbFICliQ5+PwevATDZgaI0oXzHVkdmBfq1esduBaxYO12 MT4/W7ly1J2ICFDESGOJzG/0dto58CYgqQUetTes7oK5VdOKdr6DRQVwm3f4+GEI30A4 7eFg== X-Gm-Message-State: AOAM532WKVyhp6BCx3VrzJBRNoPGO5SaHK3zSia4mCX49tfPQ/3RMYvL 2DAUwtne+ytl5wGRJ7nk45NwoA== X-Google-Smtp-Source: ABdhPJxV1YhSckhNaETNVUzcFICOYgIeIzL0P7GqkFpNo8sOKp0GrBfISIqDVzY7He5aFMmfCGamtg== X-Received: by 2002:a05:622a:28b:: with SMTP id z11mr53231851qtw.242.1641490302620; Thu, 06 Jan 2022 09:31:42 -0800 (PST) Received: from pop-os.fios-router.home (pool-71-163-245-5.washdc.fios.verizon.net. [71.163.245.5]) by smtp.googlemail.com with ESMTPSA id i21sm2126536qti.31.2022.01.06.09.31.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jan 2022 09:31:42 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, daniel.lezcano@linaro.org, rafael@kernel.org, rui.zhang@intel.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [Patch v3 3/3] dt-bindings: thermal: Add sm8150 compatible string for LMh Date: Thu, 6 Jan 2022 12:31:38 -0500 Message-Id: <20220106173138.411097-4-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220106173138.411097-1-thara.gopinath@linaro.org> References: <20220106173138.411097-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Extend the LMh dt binding document to include compatible string supporting sm8150 SoC. Signed-off-by: Thara Gopinath Acked-by: Rob Herring Reviewed-by: Bjorn Andersson --- Documentation/devicetree/bindings/thermal/qcom-lmh.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml index 289e9a845600..a9b7388ca9ac 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml @@ -19,6 +19,7 @@ properties: compatible: enum: - qcom,sdm845-lmh + - qcom,sm8150-lmh reg: items: