From patchwork Wed Jan 12 19:40:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711890 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 584FBC433FE for ; Wed, 12 Jan 2022 19:50:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345768AbiALTuo (ORCPT ); Wed, 12 Jan 2022 14:50:44 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33168 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346033AbiALTuo (ORCPT ); Wed, 12 Jan 2022 14:50:44 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id A6E6DCDFA0; Wed, 12 Jan 2022 19:42:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016545; bh=Y+bq+Z/7Ct3c1PZacukAmpH702Bds8OI7cjpFYiHTT8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=OI2mizPLeOdxk6oFlMOXosewgen+k/a4dwhBxL6pdqJ1YIsRhxUhRBne/yvuCGN26 vD5CzX36hNvVWMWF1q2FgD31fV29b1/wysuHlTKXp8kbDo5LpHVD/xc9bem3nSRfBh dl9Be4ZQdhfV3dNoHIQUelPra073qiHcDzHSl7AM= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Konrad Dybcio , Andy Gross , Bjorn Andersson , Kishon Vijay Abraham I , Vinod Koul , Rob Herring , Manu Gautam , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 01/15] dt-bindings: phy: qcom,qusb2: Document msm8953 compatible Date: Wed, 12 Jan 2022 20:40:50 +0100 Message-Id: <20220112194118.178026-2-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the compatible string used for the qusb2 phy in msm8953. Signed-off-by: Luca Weiss Acked-by: Konrad Dybcio --- Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml index aa2e409a1a09..f28eb4902038 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml @@ -19,6 +19,7 @@ properties: - items: - enum: - qcom,ipq8074-qusb2-phy + - qcom,msm8953-qusb2-phy - qcom,msm8996-qusb2-phy - qcom,msm8998-qusb2-phy - qcom,qcm2290-qusb2-phy From patchwork Wed Jan 12 19:40:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711897 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7557DC433EF for ; Wed, 12 Jan 2022 19:51:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346281AbiALTvy (ORCPT ); Wed, 12 Jan 2022 14:51:54 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33214 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356567AbiALTvV (ORCPT ); Wed, 12 Jan 2022 14:51:21 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 93EFCCDFB7; Wed, 12 Jan 2022 19:42:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016545; bh=MNjITzwZLGiO65HqfkpFso4zWkx/alLclG/PQK0PQm8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=hpi5fWHim/KbZeecfjBrNP/fnt4BJVqEgy/2Amju4H3JrWNoWQHMOEWUe0uVK0DpK HwgbMVI9dSkUeoX4C9GQphaSrrla6DNvDYWEqvboULxqhfIFr3wR3F263Fs3bNcTgL v+Ub74yLKPyHq+PYZVVsw8IFwjyDCtLA7yaR2DhE= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Konrad Dybcio , Andy Gross , Bjorn Andersson , Kishon Vijay Abraham I , Vinod Koul , linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/15] phy: qcom-qusb2: Add compatible for MSM8953 Date: Wed, 12 Jan 2022 20:40:51 +0100 Message-Id: <20220112194118.178026-3-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add compatible for MSM8953 QUSB2 device which reuses MSM8996 configuration. Signed-off-by: Luca Weiss Acked-by: Konrad Dybcio --- drivers/phy/qualcomm/phy-qcom-qusb2.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c index 032d02bf50c5..7529a7e6e5df 100644 --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c @@ -911,6 +911,9 @@ static const struct of_device_id qusb2_phy_of_match_table[] = { }, { .compatible = "qcom,ipq8074-qusb2-phy", .data = &msm8996_phy_cfg, + }, { + .compatible = "qcom,msm8953-qusb2-phy", + .data = &msm8996_phy_cfg, }, { .compatible = "qcom,msm8996-qusb2-phy", .data = &msm8996_phy_cfg, From patchwork Wed Jan 12 19:40:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711896 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D3DCC433FE for ; Wed, 12 Jan 2022 19:51:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357340AbiALTvw (ORCPT ); Wed, 12 Jan 2022 14:51:52 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33202 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346449AbiALTvV (ORCPT ); Wed, 12 Jan 2022 14:51:21 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 4DDE1CDFC9; Wed, 12 Jan 2022 19:42:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016546; bh=ohieyEzXNmPDcc0FGZkXrfv8PmkK+p86gnZQ/VhgRlQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=eukxzcKOhqFstQXxtp7goRrxhZv0KKcM5tDZ/mO9pAEpgdlRAZTE6keTbq2vG98wW qmZJTo2xLZkq4SjOjZbVcCaD62PHkJlWEIr6AFOScqM746pdK/GNcBFuGEj2/rELVJ lSxcN8VIpzJCfUZHD1mVjJKB1PZcV6qBgq1yLEC8= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Konrad Dybcio , Andy Gross , Bjorn Andersson , Lee Jones , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 03/15] dt-bindings: mfd: qcom,tcsr: Document msm8953 compatible Date: Wed, 12 Jan 2022 20:40:52 +0100 Message-Id: <20220112194118.178026-4-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the compatible for tcsr found in msm8953. Signed-off-by: Luca Weiss Acked-by: Konrad Dybcio Acked-by: Rob Herring --- Documentation/devicetree/bindings/mfd/qcom,tcsr.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.txt b/Documentation/devicetree/bindings/mfd/qcom,tcsr.txt index c5f4f0ddfcc3..add61bcc3c74 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.txt +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.txt @@ -10,6 +10,7 @@ Required properties: "qcom,tcsr-ipq8064", "syscon" for IPQ8064 "qcom,tcsr-apq8064", "syscon" for APQ8064 "qcom,tcsr-msm8660", "syscon" for MSM8660 + "qcom,tcsr-msm8953", "syscon" for MSM8953 "qcom,tcsr-msm8960", "syscon" for MSM8960 "qcom,tcsr-msm8974", "syscon" for MSM8974 "qcom,tcsr-apq8084", "syscon" for APQ8084 From patchwork Wed Jan 12 19:40:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711895 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96379C433FE for ; Wed, 12 Jan 2022 19:51:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357046AbiALTvo (ORCPT ); Wed, 12 Jan 2022 14:51:44 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33198 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346281AbiALTvN (ORCPT ); Wed, 12 Jan 2022 14:51:13 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id EE4FBCDFCB; Wed, 12 Jan 2022 19:42:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016547; bh=CzTuWXLWKC94/YOkWJAWG8rJcc5rVjNqI/L0NWRssZ0=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=XkR7gmZN1CbfA0c7J/NZ6XymzC+7mrKWDyWfAP1KGQubOVA9OanpIA0Ru8QWB6mgL IrH+5dnDp/WOZLaBdYTlspKscNoA3hHTdrgyR4Ojb4b/Y/YlCXERePgIuvZA+w+mML Yb8jZplqJ0nsMYjFMLgwCro7vghIc6mPhjnxjCZE= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Konrad Dybcio , Andy Gross , Bjorn Andersson , Lee Jones , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/15] mfd: qcom-spmi-pmic: Add pm8953 compatible Date: Wed, 12 Jan 2022 20:40:53 +0100 Message-Id: <20220112194118.178026-5-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the compatible for pm8953 as found in msm8953. Signed-off-by: Luca Weiss Acked-by: Konrad Dybcio Acked-by: Rob Herring --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt index 7a27c500ff63..a461ec2f758f 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt @@ -35,6 +35,7 @@ Required properties: "qcom,pm8916", "qcom,pm8941", "qcom,pm8950", + "qcom,pm8953", "qcom,pm8994", "qcom,pm8998", "qcom,pma8084", From patchwork Wed Jan 12 19:40:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711892 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DBFDC4167D for ; Wed, 12 Jan 2022 19:50:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356954AbiALTut (ORCPT ); Wed, 12 Jan 2022 14:50:49 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33164 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345918AbiALTuo (ORCPT ); Wed, 12 Jan 2022 14:50:44 -0500 X-Greylist: delayed 485 seconds by postgrey-1.27 at vger.kernel.org; Wed, 12 Jan 2022 14:50:32 EST Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id D645BCDFCF; Wed, 12 Jan 2022 19:42:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016548; bh=1vhW3d4UaDKe38F2VYc2x61F+EvihlShdrbGh4J8qco=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=OcBhJKlgB78UsLLnO/2lmGKBKkCUwwryUIpndu5DizUzvhd/As3Y2RLAob8gC7k25 gsBu4E6PrPyOoP8pYUu/oWE4GAwNo6cAMFn6jLEzeR8fFYh6W5d3/ru7ITAhAGWrYn UgxnJDu/E1HAazGJNkFk+dqQt8JZHYoeg411gCS4= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Konrad Dybcio , Ulf Hansson , Rob Herring , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/15] dt-bindings: mmc: sdhci-msm: Add msm8953 compatible Date: Wed, 12 Jan 2022 20:40:54 +0100 Message-Id: <20220112194118.178026-6-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add msm8953 SoC specific compatible strings for qcom-sdhci controller. Signed-off-by: Luca Weiss Acked-by: Konrad Dybcio --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index 50841e2843fc..a62eaade5d97 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -14,6 +14,7 @@ Required properties: full compatible strings with SoC and version: "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4" "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4" + "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4" "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4" "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4" "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4" From patchwork Wed Jan 12 19:40:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711904 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E566C433FE for ; Wed, 12 Jan 2022 19:52:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350462AbiALTwh (ORCPT ); Wed, 12 Jan 2022 14:52:37 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33196 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346237AbiALTva (ORCPT ); Wed, 12 Jan 2022 14:51:30 -0500 X-Greylist: delayed 494 seconds by postgrey-1.27 at vger.kernel.org; Wed, 12 Jan 2022 14:51:13 EST Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id AC868CDFD0; Wed, 12 Jan 2022 19:42:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016549; bh=oBvuU3VqQkYcw9uSjVDb8s2wp/xMUDGkpFNKnx+nga4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=R9HxoNvY08f/GO6p7vNCMVx8AOdse/Md4FA8Yb2F0f+b/RRk0hXYul+Np8QNo9Ry8 n4dkx0rp2mJ6cS+NHlB6N1HMJlSyVDXhzLNIQwXRsFRD0OAVzZ791scjWFRHjc/TKx U4ULIpp2PM5tRYwfmQJ2kymSZkiMKdxikI5POzX8= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Konrad Dybcio , Amit Kucheria , Thara Gopinath , Andy Gross , Bjorn Andersson , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Rob Herring , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/15] dt-bindings: thermal: tsens: Add msm8953 compatible Date: Wed, 12 Jan 2022 20:40:55 +0100 Message-Id: <20220112194118.178026-7-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the compatible string for tsens found in msm8953. Signed-off-by: Luca Weiss Acked-by: Konrad Dybcio Acked-by: Amit Kucheria Acked-by: Rob Herring --- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index d3b9e9b600a2..b6406bcc683f 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -43,6 +43,7 @@ properties: - description: v2 of TSENS items: - enum: + - qcom,msm8953-tsens - qcom,msm8996-tsens - qcom,msm8998-tsens - qcom,sc7180-tsens From patchwork Wed Jan 12 19:40:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711901 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A9ACC43217 for ; Wed, 12 Jan 2022 19:52:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233343AbiALTwO (ORCPT ); Wed, 12 Jan 2022 14:52:14 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33206 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350090AbiALTvh (ORCPT ); Wed, 12 Jan 2022 14:51:37 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id BC877CDFE1; Wed, 12 Jan 2022 19:42:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016550; bh=DeLCdue2jr0aGDKdHCFhzqKn14pLJxKzej3Le9UUF+0=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=nAbOBBdDzGQfTOCScoe/7NrwiSihF6jH4P/jtIbCbjEI6WEMpYhJxN9BUJYMX0pBC vbVntNjKPaRGlUaYAzNybbOPWoOXkaau3EdTcD3Xg6kqSV/m1A6ziNFAs8ydqW4OfJ Ne8eu+ZRTA5aYKbY9V2tRcLBNlURjUwN33+yeAhI= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Konrad Dybcio , Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Rob Herring , Manu Gautam , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/15] dt-bindings: usb: qcom,dwc3: Add msm8953 compatible Date: Wed, 12 Jan 2022 20:40:56 +0100 Message-Id: <20220112194118.178026-8-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the compatible string for the DWC3 controller in msm8953. Signed-off-by: Luca Weiss Acked-by: Konrad Dybcio Acked-by: Rob Herring --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 2bdaba023c01..d6a71711a182 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -14,6 +14,7 @@ properties: items: - enum: - qcom,ipq6018-dwc3 + - qcom,msm8953-dwc3 - qcom,msm8996-dwc3 - qcom,msm8998-dwc3 - qcom,sc7180-dwc3 From patchwork Wed Jan 12 19:40:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E5B2C433FE for ; Wed, 12 Jan 2022 19:52:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357193AbiALTwP (ORCPT ); Wed, 12 Jan 2022 14:52:15 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33208 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350127AbiALTvj (ORCPT ); Wed, 12 Jan 2022 14:51:39 -0500 X-Greylist: delayed 516 seconds by postgrey-1.27 at vger.kernel.org; Wed, 12 Jan 2022 14:51:16 EST Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id BCFC2CDFE2; Wed, 12 Jan 2022 19:42:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016551; bh=uHZ8FRuZVwHxIA1x9cXwgwRQGE+bY7VbBrE0ut+WwBA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=gYSLf3FDfifqrL08W6o3GhwP6rzZSTWaGWmogO3iofldiRr2Zkshti029glhRFhnb B249aiGmPVASN1HLYNkDWNxv9QsaCwLJMgILDapO7RXS1yIJgyIK8CYlDwBTlHLWKp 3jIWI4H5gdezmLM7ZDa8hstB9XawHS706+owrM+s= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Konrad Dybcio , Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/15] dt-bindings: pinctrl: qcom: msm8953: allow gpio-reserved-ranges Date: Wed, 12 Jan 2022 20:40:57 +0100 Message-Id: <20220112194118.178026-9-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Allow the gpio-reserved-ranges property to be used in dts. Signed-off-by: Luca Weiss Acked-by: Konrad Dybcio Acked-by: Rob Herring --- .../devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml index abe9f4c9b1e3..11a215bba64b 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml @@ -34,6 +34,8 @@ properties: gpio-controller: true + gpio-reserved-ranges: true + '#gpio-cells': description: Specifying the pin number and flags, as defined in include/dt-bindings/gpio/gpio.h From patchwork Wed Jan 12 19:40:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711902 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1D6BC4332F for ; Wed, 12 Jan 2022 19:52:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357428AbiALTwY (ORCPT ); Wed, 12 Jan 2022 14:52:24 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33212 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350131AbiALTvf (ORCPT ); Wed, 12 Jan 2022 14:51:35 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 9047ECDFE3; Wed, 12 Jan 2022 19:42:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016551; bh=KHKsuBYKTLwjzwl37Vjo6Spn4g3BjgzCI/1uv5wCKtE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=vqgbmIfBjzTmS9j88MhxcVUg7KrL+THBwT+K7MQNpqWWVeu9ZD3B1g1jwRxYo7as9 ADJlAp0E+jlRS+7L5SeJPweO2x8ZfYgvkhzu2x/WnWs5wfdvRCb4s99yKWCvFJfPKc 4InPeBvkwUoSdreY6cmLxudCng+G4JqGi1Q0cTcA= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Vladimir Lypak , Luca Weiss , Konrad Dybcio , Andy Gross , Bjorn Andersson , Ohad Ben-Cohen , Mathieu Poirier , linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/15] rpmsg: smd: Drop unnecessary condition for channel creation Date: Wed, 12 Jan 2022 20:40:58 +0100 Message-Id: <20220112194118.178026-10-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vladimir Lypak RPM Firmware on variety of newer SoCs such as MSM8917 (also likely MSM8937, MSM8940, MSM8952), MSM8953 and on some MSM8916 devices) doesn't initiate opening of the SMD channel if it was previously opened by bootloader. This doesn't allow probing of smd-rpm driver on such devices because there is a check that requires RPM this behaviour. Signed-off-by: Vladimir Lypak Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- drivers/rpmsg/qcom_smd.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/rpmsg/qcom_smd.c b/drivers/rpmsg/qcom_smd.c index 8da1b5cb31b3..6a01ef932b01 100644 --- a/drivers/rpmsg/qcom_smd.c +++ b/drivers/rpmsg/qcom_smd.c @@ -1280,19 +1280,13 @@ static void qcom_channel_state_worker(struct work_struct *work) unsigned long flags; /* - * Register a device for any closed channel where the remote processor - * is showing interest in opening the channel. + * Register a device for any closed channel. */ spin_lock_irqsave(&edge->channels_lock, flags); list_for_each_entry(channel, &edge->channels, list) { if (channel->state != SMD_CHANNEL_CLOSED) continue; - remote_state = GET_RX_CHANNEL_INFO(channel, state); - if (remote_state != SMD_CHANNEL_OPENING && - remote_state != SMD_CHANNEL_OPENED) - continue; - if (channel->registered) continue; From patchwork Wed Jan 12 19:40:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711894 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE609C433FE for ; Wed, 12 Jan 2022 19:50:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356992AbiALTuu (ORCPT ); Wed, 12 Jan 2022 14:50:50 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33172 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346255AbiALTuo (ORCPT ); Wed, 12 Jan 2022 14:50:44 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id A2D42CDFE7; Wed, 12 Jan 2022 19:42:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016554; bh=RltE20ID/6pkCtnooumc5WJU+rrBKAHaL7NWuWL2tlA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=wPN0WN6vbGD125CkX/3wRThh8w9Eaa5bTFX20Tq4No/lDcWiwn2JxFKJVi96/8VBJ vN6PJsXLGcGBX/AFvp0kBZZ4/3r5Ozzo6ggNu6xODpqbeV37CtrQYS6AfeW0UISf4x rR/AY/9/61+Mu5aqGXM0nFm7eJYpf7nmqy80Q3h8= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Vladimir Lypak , Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/15] arm64: dts: qcom: Add MSM8953 device tree Date: Wed, 12 Jan 2022 20:40:59 +0100 Message-Id: <20220112194118.178026-11-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vladimir Lypak Add a base DT for MSM8953 SoC. Co-developed-by: Luca Weiss Signed-off-by: Vladimir Lypak Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 1337 +++++++++++++++++++++++++ 1 file changed, 1337 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/msm8953.dtsi diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi new file mode 100644 index 000000000000..59918b527750 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -0,0 +1,1337 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2022, The Linux Foundation. All rights reserved. */ + +#include +#include +#include +#include +#include + +/ { + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + + aliases { + i2c1 = &i2c_1; + i2c2 = &i2c_2; + i2c3 = &i2c_3; + i2c4 = &i2c_4; + i2c5 = &i2c_5; + i2c6 = &i2c_6; + i2c7 = &i2c_7; + i2c8 = &i2c_8; + }; + + chosen { }; + + clocks { + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + + xo_board: xo-board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + clock-output-names = "xo"; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_0>; + #cooling-cells = <2>; + + l1-icache { + compatible = "cache"; + }; + l1-dcache { + compatible = "cache"; + }; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_0>; + #cooling-cells = <2>; + + l1-icache { + compatible = "cache"; + }; + l1-dcache { + compatible = "cache"; + }; + }; + + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x2>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_0>; + #cooling-cells = <2>; + + l1-icache { + compatible = "cache"; + }; + l1-dcache { + compatible = "cache"; + }; + }; + + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x3>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_0>; + #cooling-cells = <2>; + + l1-icache { + compatible = "cache"; + }; + l1-dcache { + compatible = "cache"; + }; + }; + + CPU4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x100>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_1>; + #cooling-cells = <2>; + + l1-icache { + compatible = "cache"; + }; + l1-dcache { + compatible = "cache"; + }; + }; + + CPU5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x101>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_1>; + #cooling-cells = <2>; + + l1-icache { + compatible = "cache"; + }; + l1-dcache { + compatible = "cache"; + }; + }; + + CPU6: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x102>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_1>; + #cooling-cells = <2>; + + l1-icache { + compatible = "cache"; + }; + l1-dcache { + compatible = "cache"; + }; + }; + + CPU7: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x103>; + enable-method = "psci"; + capacity-dmips-mhz = <1024>; + next-level-cache = <&L2_1>; + #cooling-cells = <2>; + + l1-icache { + compatible = "cache"; + }; + l1-dcache { + compatible = "cache"; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + core1 { + cpu = <&CPU1>; + }; + core2 { + cpu = <&CPU2>; + }; + core3 { + cpu = <&CPU3>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU4>; + }; + core1 { + cpu = <&CPU5>; + }; + core2 { + cpu = <&CPU6>; + }; + core3 { + cpu = <&CPU7>; + }; + }; + }; + + L2_0: l2-cache_0 { + compatible = "cache"; + cache-level = <2>; + }; + + L2_1: l2-cache_1 { + compatible = "cache"; + cache-level = <2>; + }; + }; + + firmware { + scm: scm { + compatible = "qcom,scm-msm8953"; + clocks = <&gcc GCC_CRYPTO_CLK>, + <&gcc GCC_CRYPTO_AXI_CLK>, + <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + #reset-cells = <1>; + }; + }; + + memory { + device_type = "memory"; + /* We expect the bootloader to fill in the reg */ + reg = <0 0 0 0>; + }; + + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + zap_shader_region: memory@81800000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x81800000 0x0 0x2000>; + no-map; + }; + + memory@85b00000 { + reg = <0x0 0x85b00000 0x0 0x800000>; + no-map; + }; + + smem_mem: memory@86300000 { + compatible = "qcom,smem"; + reg = <0x0 0x86300000 0x0 0x100000>; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + hwlocks = <&tcsr_mutex 3>; + no-map; + }; + + memory@86400000 { + reg = <0x0 0x86400000 0x0 0x400000>; + no-map; + }; + + mpss_mem: memory@86c00000 { + reg = <0x0 0x86c00000 0x0 0x6a00000>; + no-map; + }; + + adsp_fw_mem: memory@8d600000 { + reg = <0x0 0x8d600000 0x0 0x1100000>; + no-map; + }; + + wcnss_fw_mem: memory@8e700000 { + reg = <0x0 0x8e700000 0x0 0x700000>; + no-map; + }; + + memory@90000000 { + reg = <0 0x90000000 0 0x1000>; + no-map; + }; + + memory@90001000 { + reg = <0x0 0x90001000 0x0 0x13ff000>; + no-map; + }; + + venus_mem: memory@90400000 { + reg = <0x0 0x91400000 0x0 0x700000>; + no-map; + }; + + mba_mem: memory@92000000 { + reg = <0x0 0x92000000 0x0 0x100000>; + no-map; + }; + + memory@f2d00000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0 0xf2d00000 0x0 0x180000>; + no-map; + + qcom,client-id = <1>; + }; + }; + + smd { + compatible = "qcom,smd"; + + rpm { + interrupts = ; + qcom,ipc = <&apcs 8 0>; + qcom,smd-edge = <15>; + + rpm_requests: rpm_requests { + compatible = "qcom,rpm-msm8953"; + qcom,smd-channels = "rpm_requests"; + + rpmcc: rpmcc { + compatible = "qcom,rpmcc-msm8953"; + clocks = <&xo_board>; + clock-names = "xo"; + #clock-cells = <1>; + }; + + rpmpd: power-controller { + compatible = "qcom,msm8953-rpmpd"; + #power-domain-cells = <1>; + operating-points-v2 = <&rpmpd_opp_table>; + + clocks = <&xo_board>; + clock-names = "ref"; + + rpmpd_opp_table: opp-table { + compatible = "operating-points-v2"; + + rpmpd_opp_ret: opp1 { + opp-level = ; + }; + + rpmpd_opp_ret_plus: opp2 { + opp-level = ; + }; + + rpmpd_opp_min_svs: opp3 { + opp-level = ; + }; + + rpmpd_opp_low_svs: opp4 { + opp-level = ; + }; + + rpmpd_opp_svs: opp5 { + opp-level = ; + }; + + rpmpd_opp_svs_plus: opp6 { + opp-level = ; + }; + + rpmpd_opp_nom: opp7 { + opp-level = ; + }; + + rpmpd_opp_nom_plus: opp8 { + opp-level = ; + }; + + rpmpd_opp_turbo: opp9 { + opp-level = ; + }; + }; + }; + }; + }; + }; + + smsm { + compatible = "qcom,smsm"; + + #address-cells = <1>; + #size-cells = <0>; + + qcom,ipc-1 = <&apcs 8 13>; + qcom,ipc-3 = <&apcs 8 19>; + + apps_smsm: apps@0 { + reg = <0>; + + #qcom,smem-state-cells = <1>; + }; + }; + + soc: soc@0 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + + rpm_msg_ram: sram@60000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x60000 0x8000>; + }; + + hsusb_phy: phy@79000 { + compatible = "qcom,msm8953-qusb2-phy"; + reg = <0x79000 0x180>; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB_PHY_CFG_AHB_CLK>, + <&gcc GCC_QUSB_REF_CLK>; + clock-names = "cfg_ahb", "ref"; + + qcom,tcsr-syscon = <&tcsr_phy_clk_scheme_sel>; + + resets = <&gcc GCC_QUSB2_PHY_BCR>; + + status = "disabled"; + }; + + rng@e3000 { + compatible = "qcom,prng"; + reg = <0x000e3000 0x1000>; + clocks = <&gcc GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; + + tsens0: thermal-sensor@4a9000 { + compatible = "qcom,msm8953-tsens", "qcom,tsens-v2"; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ + #qcom,sensors = <16>; + interrupts = , + ; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + + restart@4ab000 { + compatible = "qcom,pshold"; + reg = <0x4ab000 0x4>; + }; + + tlmm: pinctrl@1000000 { + compatible = "qcom,msm8953-pinctrl"; + reg = <0x1000000 0x300000>; + interrupts = ; + gpio-controller; + gpio-ranges = <&tlmm 0 0 155>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + uart_console_active: uart-console-active-pins { + pins = "gpio4", "gpio5"; + function = "blsp_uart2"; + drive-strength = <2>; + bias-disable; + }; + + uart_console_sleep: uart-console-sleep-pins { + pins = "gpio4", "gpio5"; + function = "blsp_uart2"; + drive-strength = <2>; + bias-pull-down; + }; + + sdc1_clk_on: sdc1-clk-on-pins { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <16>; + }; + + sdc1_clk_off: sdc1-clk-off-pins { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <2>; + }; + + sdc1_cmd_on: sdc1-cmd-on-pins { + pins = "sdc1_cmd"; + bias-disable; + drive-strength = <10>; + }; + + sdc1_cmd_off: sdc1-cmd-off-pins { + pins = "sdc1_cmd"; + bias-disable; + drive-strength = <2>; + }; + + sdc1_data_on: sdc1-data-on-pins { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <10>; + }; + + sdc1_data_off: sdc1-data-off-pins { + pins = "sdc1_data"; + bias-pull-up; + drive-strength = <2>; + }; + + sdc1_rclk_on: sdc1-rclk-on-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + + sdc1_rclk_off: sdc1-rclk-off-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + + sdc2_clk_on: sdc2-clk-on-pins { + pins = "sdc2_clk"; + drive-strength = <16>; + bias-disable; + }; + + sdc2_clk_off: sdc2-clk-off-pins { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <2>; + }; + + sdc2_cmd_on: sdc2-cmd-on-pins { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + sdc2_cmd_off: sdc2-cmd-off-pins { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + sdc2_data_on: sdc2-data-on-pins { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <10>; + }; + + sdc2_data_off: sdc2-data-off-pins { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <2>; + }; + + sdc2_cd_on: cd-on-pins { + pins = "gpio133"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + sdc2_cd_off: cd-off-pins { + pins = "gpio133"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + gpio_key_default: gpio-key-default-pins { + pins = "gpio85"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + i2c_1_default: i2c-1-default-pins { + pins = "gpio2", "gpio3"; + function = "blsp_i2c1"; + drive-strength = <2>; + bias-disable; + }; + + i2c_1_sleep: i2c-1-sleep-pins { + pins = "gpio2", "gpio3"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + i2c_2_default: i2c-2-default-pins { + pins = "gpio6", "gpio7"; + function = "blsp_i2c2"; + drive-strength = <2>; + bias-disable; + }; + + i2c_2_sleep: i2c-2-sleep-pins { + pins = "gpio6", "gpio7"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + i2c_3_default: i2c-3-default-pins { + pins = "gpio10", "gpio11"; + function = "blsp_i2c3"; + drive-strength = <2>; + bias-disable; + }; + + i2c_3_sleep: i2c-3-sleep-pins { + pins = "gpio10", "gpio11"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + i2c_4_default: i2c-4-default-pins { + pins = "gpio14", "gpio15"; + function = "blsp_i2c4"; + drive-strength = <2>; + bias-disable; + }; + + i2c_4_sleep: i2c-4-sleep-pins { + pins = "gpio14", "gpio15"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + i2c_5_default: i2c-5-default-pins { + pins = "gpio18", "gpio19"; + function = "blsp_i2c5"; + drive-strength = <2>; + bias-disable; + }; + + i2c_5_sleep: i2c-5-sleep-pins { + pins = "gpio18", "gpio19"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + i2c_6_default: i2c-6-default-pins { + pins = "gpio22", "gpio23"; + function = "blsp_i2c6"; + drive-strength = <2>; + bias-disable; + }; + + i2c_6_sleep: i2c-6-sleep-pins { + pins = "gpio22", "gpio23"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + i2c_7_default: i2c-7-default-pins { + pins = "gpio135", "gpio136"; + function = "blsp_i2c7"; + drive-strength = <2>; + bias-disable; + }; + + i2c_7_sleep: i2c-7-sleep-pins { + pins = "gpio135", "gpio136"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + i2c_8_default: i2c-8-default-pins { + pins = "gpio98", "gpio99"; + function = "blsp_i2c8"; + drive-strength = <2>; + bias-disable; + }; + + i2c_8_sleep: i2c-8-sleep-pins { + pins = "gpio98", "gpio99"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + }; + + gcc: clock-controller@1800000 { + compatible = "qcom,gcc-msm8953"; + reg = <0x1800000 0x80000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&xo_board>, + <&sleep_clk>, + <0>, + <0>, + <0>, + <0>; + clock-names = "xo", + "sleep", + "dsi0pll", + "dsi0pllbyte", + "dsi1pll", + "dsi1pllbyte"; + }; + + tcsr_mutex: hwlock@1905000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x1905000 0x20000>; + #hwlock-cells = <1>; + }; + + tcsr: syscon@1937000 { + compatible = "qcom,tcsr-msm8953", "syscon"; + reg = <0x1937000 0x30000>; + }; + + tcsr_phy_clk_scheme_sel: syscon@193f044 { + compatible = "syscon"; + reg = <0x193f044 0x4>; + }; + + spmi_bus: spmi@200f000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x200f000 0x1000>, + <0x2400000 0x800000>, + <0x2c00000 0x800000>, + <0x3800000 0x200000>, + <0x200a000 0x2100>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts = ; + qcom,ee = <0>; + qcom,channel = <0>; + interrupt-controller; + + #interrupt-cells = <4>; + #address-cells = <2>; + #size-cells = <0>; + }; + + usb3: usb@70f8800 { + compatible = "qcom,msm8953-dwc3", "qcom,dwc3"; + reg = <0x70f8800 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + interrupts = , + ; + interrupt-names = "hs_phy_irq", "ss_phy_irq"; + + clocks = <&gcc GCC_USB_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB30_MASTER_CLK>, + <&gcc GCC_PCNOC_USB3_AXI_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>; + clock-names = "cfg_noc", "core", "iface", + "mock_utmi", "sleep"; + + assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_MASTER_CLK>; + assigned-clock-rates = <19200000>, <133330000>; + + power-domains = <&gcc USB30_GDSC>; + + qcom,select-utmi-as-pipe-clk; + + status = "disabled"; + + usb3_dwc3: usb@7000000 { + compatible = "snps,dwc3"; + reg = <0x07000000 0xcc00>; + interrupts = ; + phys = <&hsusb_phy>; + phy-names = "usb2-phy"; + + snps,usb2-gadget-lpm-disable; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x00>; + + maximum-speed = "high-speed"; + phy_mode = "utmi"; + }; + }; + + sdhc_1: sdhci@7824900 { + compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"; + + reg = <0x7824900 0x500>, <0x7824000 0x800>; + reg-names = "hc_mem", "core_mem"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>, + <&xo_board>; + clock-names = "iface", "core", "xo"; + + power-domains = <&rpmpd MSM8953_VDDCX>; + operating-points-v2 = <&sdhc1_opp_table>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; + pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; + + mmc-hs400-1_8v; + mmc-hs200-1_8v; + mmc-ddr-1_8v; + bus-width = <8>; + non-removable; + + status = "disabled"; + + sdhc1_opp_table: opp-table-sdhc1 { + compatible = "operating-points-v2"; + + opp-25000000 { + opp-hz = /bits/ 64 <25000000>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-192000000 { + opp-hz = /bits/ 64 <192000000>; + required-opps = <&rpmpd_opp_nom>; + }; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmpd_opp_nom>; + }; + }; + }; + + sdhc_2: sdhci@7864900 { + compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"; + + reg = <0x7864900 0x500>, <0x7864000 0x800>; + reg-names = "hc_mem", "core_mem"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>, + <&xo_board>; + clock-names = "iface", "core", "xo"; + + power-domains = <&rpmpd MSM8953_VDDCX>; + operating-points-v2 = <&sdhc2_opp_table>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; + pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; + + bus-width = <4>; + + status = "disabled"; + + sdhc2_opp_table: opp-table-sdhc2 { + compatible = "operating-points-v2"; + + opp-25000000 { + opp-hz = /bits/ 64 <25000000>; + required-opps = <&rpmpd_opp_low_svs>; + }; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmpd_opp_svs>; + }; + + opp-177770000 { + opp-hz = /bits/ 64 <177770000>; + required-opps = <&rpmpd_opp_nom>; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmpd_opp_nom>; + }; + }; + }; + + uart_0: serial@78af000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x78af000 0x200>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + + status = "disabled"; + }; + + i2c_1: i2c@78b5000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x78b5000 0x600>; + interrupts = ; + clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c_1_default>; + pinctrl-1 = <&i2c_1_sleep>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + i2c_2: i2c@78b6000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x78b6000 0x600>; + interrupts = ; + clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c_2_default>; + pinctrl-1 = <&i2c_2_sleep>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + i2c_3: i2c@78b7000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x78b7000 0x600>; + interrupts = ; + clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c_3_default>; + pinctrl-1 = <&i2c_3_sleep>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + i2c_4: i2c@78b8000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x78b8000 0x600>; + interrupts = ; + clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c_4_default>; + pinctrl-1 = <&i2c_4_sleep>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + i2c_5: i2c@7af5000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x7af5000 0x600>; + interrupts = ; + clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP2_AHB_CLK>, + <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c_5_default>; + pinctrl-1 = <&i2c_5_sleep>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + i2c_6: i2c@7af6000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x7af6000 0x600>; + interrupts = ; + clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP2_AHB_CLK>, + <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c_6_default>; + pinctrl-1 = <&i2c_6_sleep>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + i2c_7: i2c@7af7000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x7af7000 0x600>; + interrupts = ; + clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP2_AHB_CLK>, + <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c_7_default>; + pinctrl-1 = <&i2c_7_sleep>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + i2c_8: i2c@7af8000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x7af8000 0x600>; + interrupts = ; + clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP2_AHB_CLK>, + <&gcc GCC_BLSP2_QUP4_I2C_APPS_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c_8_default>; + pinctrl-1 = <&i2c_8_sleep>; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + + intc: interrupt-controller@b000000 { + compatible = "qcom,msm-qgic2"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>; + }; + + apcs: mailbox@b011000 { + compatible = "qcom,msm8953-apcs-kpss-global", "syscon"; + reg = <0xb011000 0x1000>; + #mbox-cells = <1>; + }; + + timer@b120000 { + compatible = "arm,armv7-timer-mem"; + reg = <0xb120000 0x1000>; + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges; + + frame@b121000 { + frame-number = <0>; + interrupts = , + ; + reg = <0xb121000 0x1000>, + <0xb122000 0x1000>; + }; + + frame@b123000 { + frame-number = <1>; + interrupts = ; + reg = <0xb123000 0x1000>; + status = "disabled"; + }; + + frame@b124000 { + frame-number = <2>; + interrupts = ; + reg = <0xb124000 0x1000>; + status = "disabled"; + }; + + frame@b125000 { + frame-number = <3>; + interrupts = ; + reg = <0xb125000 0x1000>; + status = "disabled"; + }; + + frame@b126000 { + frame-number = <4>; + interrupts = ; + reg = <0xb126000 0x1000>; + status = "disabled"; + }; + + frame@b127000 { + frame-number = <5>; + interrupts = ; + reg = <0xb127000 0x1000>; + status = "disabled"; + }; + + frame@b128000 { + frame-number = <6>; + interrupts = ; + reg = <0xb128000 0x1000>; + status = "disabled"; + }; + }; + }; + + thermal-zones { + cpu0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 9>; + trips { + cpu0_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu0_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu0_alert>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu1-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 10>; + trips { + cpu1_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu1_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu1_alert>; + cooling-device = <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu2-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 11>; + trips { + cpu2_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu2_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu2_alert>; + cooling-device = <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu3-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 12>; + trips { + cpu3_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu3_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu3_alert>; + cooling-device = <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu4-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 4>; + trips { + cpu4_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu4_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu4_alert>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu5-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 5>; + trips { + cpu5_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu5_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu5_alert>; + cooling-device = <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu6-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 6>; + trips { + cpu6_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu6_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu6_alert>; + cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu7-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 7>; + trips { + cpu7_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu7_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu7_alert>; + cooling-device = <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; +}; From patchwork Wed Jan 12 19:41:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19DA6C43217 for ; Wed, 12 Jan 2022 19:50:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346431AbiALTup (ORCPT ); Wed, 12 Jan 2022 14:50:45 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33166 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346178AbiALTuo (ORCPT ); Wed, 12 Jan 2022 14:50:44 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 11706CDFE9; Wed, 12 Jan 2022 19:42:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016557; bh=1nSXiLybrrmpnXAV/+hzjEcFhWyu10cN0+bBDqDoHdE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=pLNTnZsBGxFJP53sd7sLOGS8HWAn5KUgOhlG/DRns0gZqBO5+GpAGwhs9rhqaZaFy Im5B/5NGQT7Z7Sr4n7ZNuBwbaRKp6JUl5G013HGSPbhDVZcIDtszKXCO1AbY1Umd3q 6UlkmTTbcwpYa7I7PzEtpXe07okn55+YnRizArE0= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Vladimir Lypak , Luca Weiss , Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 11/15] arm64: dts: qcom: Add PM8953 PMIC Date: Wed, 12 Jan 2022 20:41:00 +0100 Message-Id: <20220112194118.178026-12-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vladimir Lypak Add a base DT for PM8953 PMIC, commonly used with MSM8953. Signed-off-by: Vladimir Lypak Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Reviewed-by: Rayyan Ansari --- arch/arm64/boot/dts/qcom/pm8953.dtsi | 90 ++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm8953.dtsi diff --git a/arch/arm64/boot/dts/qcom/pm8953.dtsi b/arch/arm64/boot/dts/qcom/pm8953.dtsi new file mode 100644 index 000000000000..102555b3f313 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm8953.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2022, The Linux Foundation. All rights reserved. */ + +#include +#include +#include +#include + +&spmi_bus { + pmic@0 { + compatible = "qcom,pm8953", "qcom,spmi-pmic"; + reg = <0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; + }; + + pm8953_pon: pon@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x800>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x00 0x08 0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + }; + + pm8953_resin: resin { + compatible = "qcom,pm8941-resin"; + interrupts = <0x00 0x08 1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + status = "disabled"; + }; + }; + + temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm8953_vadc 0x08>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0x00>; + }; + + pm8953_vadc: vadc@3100 { + compatible = "qcom,spmi-vadc"; + reg = <0x3100>; + interrupts = <0x00 0x31 0x00 0x01>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + die_temp@8 { + reg = ; + }; + ref_625mv@9 { + reg = ; + }; + ref_1250v@a { + reg = ; + }; + ref_buf_625mv@c { + reg = ; + }; + ref_gnd@e { + reg = ; + }; + ref_vdd@f { + reg = ; + }; + }; + }; + + pmic@1 { + compatible = "qcom,pm8953", "qcom,spmi-pmic"; + reg = <1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Wed Jan 12 19:41:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4AF53C433FE for ; Wed, 12 Jan 2022 19:50:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356742AbiALTuq (ORCPT ); Wed, 12 Jan 2022 14:50:46 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33170 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346225AbiALTuo (ORCPT ); Wed, 12 Jan 2022 14:50:44 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id A0736CDFEB; Wed, 12 Jan 2022 19:42:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016559; bh=plUllEBFH+UzM4kO/iTn2e3iL36IRQmST7f4iMeVofw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=gDtHX/DmBt2V/0bqAvMGHjpJUcd7w2D6tr6o1g78WKZYIvKp6uFWS6CJwG5Zbm1be pRLxvisYL8Xz9lnKXYEG9CurC0lFCoyej8puMhQk99x9dTzAJ18Oa+Vrfy0dujjM7M 4i4J6601O9lSCLAi5HwKfLk+/24kDREy9vtBeAMc= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Vladimir Lypak , Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 12/15] arm64: dts: qcom: Add SDM632 device tree Date: Wed, 12 Jan 2022 20:41:01 +0100 Message-Id: <20220112194118.178026-13-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vladimir Lypak Snapdragon 632 is based on msm8953, add the devicee tree for that. Signed-off-by: Vladimir Lypak Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/sdm632.dtsi | 125 +++++++++++++++++++++++++++ 1 file changed, 125 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sdm632.dtsi diff --git a/arch/arm64/boot/dts/qcom/sdm632.dtsi b/arch/arm64/boot/dts/qcom/sdm632.dtsi new file mode 100644 index 000000000000..b80ba8a5ef3f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm632.dtsi @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2022, The Linux Foundation. All rights reserved. */ + +#include "msm8953.dtsi" + +/ { + thermal-zones { + /delete-node/cpu0-thermal; + /delete-node/cpu1-thermal; + /delete-node/cpu2-thermal; + /delete-node/cpu3-thermal; + /delete-node/cpu4-thermal; + /delete-node/cpu5-thermal; + /delete-node/cpu6-thermal; + /delete-node/cpu7-thermal; + cpu4-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 5>; + trips { + cpu4_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu4_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu4_alert>; + cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu5-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 6>; + trips { + cpu5_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu5_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu5_alert>; + cooling-device = <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu6-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 7>; + trips { + cpu6_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu6_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu6_alert>; + cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + cpu7-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsens0 8>; + trips { + cpu7_alert: trip-point0 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu7_crit: crit { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu7_alert>; + cooling-device = <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; +}; + +&CPU4 { + capacity-dmips-mhz = <1980>; +}; + +&CPU5 { + capacity-dmips-mhz = <1980>; +}; + +&CPU6 { + capacity-dmips-mhz = <1980>; +}; + +&CPU7 { + capacity-dmips-mhz = <1980>; +}; From patchwork Wed Jan 12 19:41:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711903 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3DFFC4321E for ; Wed, 12 Jan 2022 19:52:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357208AbiALTwS (ORCPT ); Wed, 12 Jan 2022 14:52:18 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33210 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350153AbiALTve (ORCPT ); Wed, 12 Jan 2022 14:51:34 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 07046CDFEC; Wed, 12 Jan 2022 19:42:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016562; bh=mAkIgCtH123WwHB7ZatGCTMq2iy3omdjIieW2Vv57OI=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=hYjutwhgm60lgTLkmrmA/iOpgBPezyaqnJ82jcjoHRFKH2oivjy4t5SJdsLteBn55 MZ6wNt8fHJAeziS8jwbf5CqlcByAgQRnHge/IGLku+S4NT6dAg0DZ0o4LL1mmDUKXb A9k/WL2bihSs4bivrRblRss/9cvtUlObXWWVjJXE= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Vladimir Lypak , Luca Weiss , Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/15] arm64: dts: qcom: Add MSM8953+PM8953 device tree Date: Wed, 12 Jan 2022 20:41:02 +0100 Message-Id: <20220112194118.178026-14-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vladimir Lypak The combination MSM8953 + PM8953 is commonly used, so add a device tree where common power supplies etc. can be configured. Signed-off-by: Vladimir Lypak Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8953-pm8953.dtsi | 50 ++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/msm8953-pm8953.dtsi diff --git a/arch/arm64/boot/dts/qcom/msm8953-pm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953-pm8953.dtsi new file mode 100644 index 000000000000..b5f20fc9488e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8953-pm8953.dtsi @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* Copyright (c) 2022, The Linux Foundation. All rights reserved. */ + +#include "msm8953.dtsi" +#include "pm8953.dtsi" + +&hsusb_phy { + vdd-supply = <&pm8953_l3>; + vdda-pll-supply = <&pm8953_l7>; + vdda-phy-dpdm-supply = <&pm8953_l13>; +}; + +&sdhc_1 { + vmmc-supply = <&pm8953_l8>; + vqmmc-supply = <&pm8953_l5>; +}; + +&sdhc_2 { + vmmc-supply = <&pm8953_l11>; + vqmmc-supply = <&pm8953_l12>; +}; + +&rpm_requests { + smd_rpm_regulators: pm8953-regulators { + compatible = "qcom,rpm-pm8953-regulators"; + + pm8953_s1: s1 {}; + pm8953_s3: s3 {}; + pm8953_s4: s4 {}; + + pm8953_l1: l1 {}; + pm8953_l2: l2 {}; + pm8953_l3: l3 {}; + pm8953_l5: l5 {}; + pm8953_l6: l6 {}; + pm8953_l7: l7 {}; + pm8953_l8: l8 {}; + pm8953_l9: l9 {}; + pm8953_l10: l10 {}; + pm8953_l11: l11 {}; + pm8953_l12: l12 {}; + pm8953_l13: l13 {}; + pm8953_l15: l15 {}; + pm8953_l16: l16 {}; + pm8953_l17: l17 {}; + pm8953_l19: l19 {}; + pm8953_l22: l22 {}; + pm8953_l23: l23 {}; + }; +}; From patchwork Wed Jan 12 19:41:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711898 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19DD4C43217 for ; Wed, 12 Jan 2022 19:52:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357085AbiALTwF (ORCPT ); Wed, 12 Jan 2022 14:52:05 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33204 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350092AbiALTvZ (ORCPT ); Wed, 12 Jan 2022 14:51:25 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id CD62CCDFED; Wed, 12 Jan 2022 19:42:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016563; bh=6F81iIhw6L3fR9xstLRfDEkQg3uu6FeMQbZUHrqGro0=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=D42ky5nDMCA7/HQq7c01+S7T+TPsZiVXAvbs+965NqsrkbA+N2MPUcx8G/SdC2zDX Br8H26e6pFB0/epmgScNs+CfovalPN7UkURJGi0RzQiYc9Lqx5fm/mqJlZTzAV6KHN uQ9RQM9ZzSEyBd2VGkjXVpFTA5ZgvGRuP/+BJlEA= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 14/15] dt-bindings: arm: qcom: Document sdm632 and fairphone,fp3 board Date: Wed, 12 Jan 2022 20:41:03 +0100 Message-Id: <20220112194118.178026-15-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add binding documentation for Fairphone 3 smartphone which is based on Snapdragon 632 (sm632). Signed-off-by: Luca Weiss Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index c8808e0f9e64..d3755bc8c28f 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -42,6 +42,7 @@ description: | sc7180 sc7280 sdm630 + sdm632 sdm660 sdm845 sdx55 @@ -207,6 +208,11 @@ properties: - google,senor - const: qcom,sc7280 + - items: + - enum: + - fairphone,fp3 + - const: qcom,sdm632 + - items: - enum: - xiaomi,lavender From patchwork Wed Jan 12 19:41:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12711899 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69260C4332F for ; Wed, 12 Jan 2022 19:52:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357063AbiALTwF (ORCPT ); Wed, 12 Jan 2022 14:52:05 -0500 Received: from mail.z3ntu.xyz ([128.199.32.197]:33200 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350031AbiALTvZ (ORCPT ); Wed, 12 Jan 2022 14:51:25 -0500 Received: from localhost.localdomain (ip-213-127-106-2.ip.prioritytelecom.net [213.127.106.2]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 5EBB1CDFEF; Wed, 12 Jan 2022 19:42:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1642016565; bh=HWZRYlhhXb1tfEKq8CbOX4I3HGLIIpgzV2lU7Uld+qs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Ji9HW2DNqHEhuoU5FjUa1ZOVpo5H7TRb8a377zBRnm4SDrO9oWMI5Kj1Wxc/QsgQ5 udOCSeOBOu/3di9wTqlOYll0FoYTt9AHiOeDR87PGPGL4Sn9JYmdsDVS04M+XJCr5H jsswuuBSwReIfxve5IcOt252mT545KbqU+QMOKl0= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 15/15] arm64: dts: qcom: sdm632: Add device tree for Fairphone 3 Date: Wed, 12 Jan 2022 20:41:04 +0100 Message-Id: <20220112194118.178026-16-luca@z3ntu.xyz> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220112194118.178026-1-luca@z3ntu.xyz> References: <20220112194118.178026-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add device tree for the Fairphone 3 smartphone which is based on Snapdragon 632 (sdm632). Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sdm632-fairphone-fp3.dts | 189 ++++++++++++++++++ 2 files changed, 190 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 6b816eb33309..f67973aacd82 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -82,6 +82,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-voyager.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm632-fairphone-fp3.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm636-sony-xperia-ganges-mermaid.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb diff --git a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts new file mode 100644 index 000000000000..34f4900c8b28 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts @@ -0,0 +1,189 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Luca Weiss + */ +/dts-v1/; + +#include "msm8953-pm8953.dtsi" +#include "sdm632.dtsi" + +/ { + model = "Fairphone 3"; + compatible = "fairphone,fp3", "qcom,sdm632"; + chassis-type = "handset"; + qcom,msm-id = <349 0>; + qcom,board-id = <8 0x10000>; + + aliases { + mmc0 = &sdhc_1; + mmc1 = &sdhc_2; + serial0 = &uart_0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + volume-up { + label = "volume_up"; + linux,code = ; + gpios = <&tlmm 85 GPIO_ACTIVE_LOW>; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-always-on; + regulator-boot-on; + }; +}; + +&hsusb_phy { + status = "okay"; +}; + +&pm8953_resin { + status = "okay"; + linux,code = ; +}; + +&sdhc_1 { + status = "okay"; +}; + +&sdhc_2 { + status = "okay"; + cd-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; +}; + +&smd_rpm_regulators { + vdd_l1-supply = <&pm8953_s3>; + vdd_l2_l3-supply = <&pm8953_s3>; + vdd_l4_l5_l6_l7_l16_l19-supply = <&pm8953_s4>; + vdd_l8_l11_l12_l13_l14_l15-supply = <&vph_pwr>; + vdd_l9_l10_l17_l18_l22-supply = <&vph_pwr>; + + s3 { + regulator-min-microvolt = <984000>; + regulator-max-microvolt = <1240000>; + }; + + s4 { + regulator-min-microvolt = <1036000>; + regulator-max-microvolt = <2040000>; + }; + + s5 { + regulator-min-microvolt = <1036000>; + regulator-max-microvolt = <2040000>; + }; + + l1 { + regulator-min-microvolt = <975000>; + regulator-max-microvolt = <1050000>; + }; + + l2 { + regulator-min-microvolt = <975000>; + regulator-max-microvolt = <1175000>; + }; + + l3 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <925000>; + }; + + l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1900000>; + }; + + l8 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + }; + + l9 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; + }; + + l10 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3000000>; + }; + + l11 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + l13 { + regulator-min-microvolt = <3125000>; + regulator-max-microvolt = <3125000>; + }; + + l16 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l17 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + l19 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1350000>; + }; + + l22 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + l23 { + regulator-min-microvolt = <975000>; + regulator-max-microvolt = <1225000>; + }; +}; + +&tlmm { + /* + * 0-3: unused but protected by TZ + * 135-138: fingerprint reader (SPI) + */ + gpio-reserved-ranges = <0 4>, <135 4>; +}; + +&uart_0 { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb3_dwc3 { + dr_mode = "peripheral"; +};