From patchwork Tue Jan 18 04:19:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12715876 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CFBEC433F5 for ; Tue, 18 Jan 2022 04:19:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232103AbiARETb (ORCPT ); Mon, 17 Jan 2022 23:19:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231955AbiARET1 (ORCPT ); Mon, 17 Jan 2022 23:19:27 -0500 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 93661C061574 for ; Mon, 17 Jan 2022 20:19:27 -0800 (PST) Received: by mail-pf1-x449.google.com with SMTP id c23-20020aa78817000000b004be3f452a95so7384495pfo.19 for ; Mon, 17 Jan 2022 20:19:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:message-id:mime-version:subject:from:to:cc; bh=7d5dkNRV7Z5Lh/DgQH2Z8gK+62sCSwMNrg4mm/R+sRI=; b=W1/HEpLCqYopamCv1C+D78KwLF5KNh2crJJGrRkGxCrTcGz0NTvf8n8PfP6KmWbeIw xevSPj9TqjVmFLCPNU7Xmf0w5Qdi7TayKTGg7WuWBOdXfB1vf3YxnjWwUOJ1Zbw76Cgo EvS4ZQc6D/Kqu+u+zXLn3DFwkRc4zbRbqNDELZC/JHjKxAuMPM+gNgYo7Qt0IDZ0lBo6 D4jbkSv56EbEa7JIIOGYrvWpbA80T4IL4GBQ6Q1C67q9RjxnbjvTPKMpUvlekDIC6rf1 JzCHo/VXW+7q4L0GbkwMQaafvfDAWLtUwPa6mXjGHxj2zU4eYhosEwhCxbxnejWUgRgj LUXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; bh=7d5dkNRV7Z5Lh/DgQH2Z8gK+62sCSwMNrg4mm/R+sRI=; b=mjygrpEQD2P9aWPWIBDAcmj+aBHiwYBhtBFP2l9/7218SXqJLQcpIi7houn5y2wHuR aD6TTTz/mi+SV1qcr/kuRA5waYg3VPnXk49NgH5G2cwXmcKhpu6r0IwS3h4XqcAh2J28 23sd/3C89hj+KMJN0ubQIk9vu1AIVwGWYZ6eOwFNqIEN1J9fc1Zj3OhPz6UJV6W6P0iM gHCCH9SjfXSiPeMEbm9YXtFBtPH3kNt2tbce9XdAsBOOdm0jdexdR/W4ruTgcvy/hYnD eIUm0GvsHHeEK88gKv3S/8b7qynTfxS6SEF2Ev7ZH8EKPOv32rwHlL+hn8cGKETnsaz1 dOdA== X-Gm-Message-State: AOAM531pgabc64J9yGtDPH5fKY9h9ddtMotbRgJ9un9v62U5nwAKyFNg rPy/m3FzvnaunQQ2AJmmU5vPH6hRsfk= X-Google-Smtp-Source: ABdhPJw+dN/IuGWKz42PJMb+uayJ5wbs1m9yUVXC8noYxTBA1i0OR4szRr1ztrcGAl8wT7fu6cJMdnFiLFE= X-Received: from reiji-vws-sp.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:3d59]) (user=reijiw job=sendgmr) by 2002:a05:6a00:21c2:b0:4bc:fb2d:4b6f with SMTP id t2-20020a056a0021c200b004bcfb2d4b6fmr23853502pfj.62.1642479566921; Mon, 17 Jan 2022 20:19:26 -0800 (PST) Date: Mon, 17 Jan 2022 20:19:22 -0800 Message-Id: <20220118041923.3384602-1-reijiw@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.34.1.703.g22d0c6ccf7-goog Subject: [PATCH v2 1/2] KVM: arm64: mixed-width check should be skipped for uninitialized vCPUs From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Will Deacon , Peter Shier , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org KVM allows userspace to configure either all 32bit or 64bit vCPUs for a guest. At vCPU reset, vcpu_allowed_register_width() checks if the vcpu's register width is consistent with all other vCPUs'. Since the checking is done even against vCPUs that are not initialized (KVM_ARM_VCPU_INIT has not been done) yet, the uninitialized vCPUs are erroneously treated as 64bit vCPU, which causes the function to incorrectly detect a mixed-width VM. Introduce a new flag (el1_reg_width) in kvm_arch to indicates that the guest needs to be configured with all 32bit or 64bit vCPUs, and initialize it at the first KVM_ARM_VCPU_INIT for the guest. Check vcpu's register width against the flag at the vcpu's KVM_ARM_VCPU_INIT (instead of against other vCPUs' register width). Fixes: 66e94d5cafd4 ("KVM: arm64: Prevent mixed-width VM creation") Signed-off-by: Reiji Watanabe --- arch/arm64/include/asm/kvm_host.h | 13 +++++++++++++ arch/arm64/kvm/arm.c | 30 ++++++++++++++++++++++++++++++ arch/arm64/kvm/reset.c | 8 -------- 3 files changed, 43 insertions(+), 8 deletions(-) base-commit: 37144b2c855f9311c72f292125061d4a52d02856 diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 2a5f7f38006f..c02b7caf2c82 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -102,6 +102,12 @@ struct kvm_s2_mmu { struct kvm_arch_memory_slot { }; +enum kvm_el1_reg_width { + EL1_WIDTH_UNINITIALIZED = 0, + EL1_32BIT, + EL1_64BIT, +}; + struct kvm_arch { struct kvm_s2_mmu mmu; @@ -137,6 +143,13 @@ struct kvm_arch { /* Memory Tagging Extension enabled for the guest */ bool mte_enabled; + + /* + * EL1 register width for the guest. + * This is set at the first KVM_ARM_VCPU_INIT for the guest based + * on whether the vcpu has KVM_ARM_VCPU_EL1_32BIT or not. + */ + enum kvm_el1_reg_width el1_reg_width; }; struct kvm_vcpu_fault_info { diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index e4727dc771bf..54ae8bf9d187 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -1058,6 +1058,32 @@ int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_level, return -EINVAL; } +/* + * A guest can have either all 32bit or 64bit vcpus only. + * Either one the guest has is indicated in kvm->arch.el1_reg_width. + * Check if the vcpu's register width is consistent with + * kvm->arch.el1_reg_width. If kvm->arch.el1_reg_width is not set yet, + * set it based on the vcpu's KVM_ARM_VCPU_EL1_32BIT configuration. + */ +static int kvm_register_width_check_or_init(struct kvm_vcpu *vcpu) +{ + bool is32bit; + bool allowed = true; + struct kvm *kvm = vcpu->kvm; + + is32bit = vcpu_has_feature(vcpu, KVM_ARM_VCPU_EL1_32BIT); + + mutex_lock(&kvm->lock); + + if (kvm->arch.el1_reg_width == EL1_WIDTH_UNINITIALIZED) + kvm->arch.el1_reg_width = is32bit ? EL1_32BIT : EL1_64BIT; + else + allowed = (is32bit == (kvm->arch.el1_reg_width == EL1_32BIT)); + + mutex_unlock(&kvm->lock); + return allowed ? 0 : -EINVAL; +} + static int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, const struct kvm_vcpu_init *init) { @@ -1097,6 +1123,10 @@ static int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, /* Now we know what it is, we can reset it. */ ret = kvm_reset_vcpu(vcpu); + + if (!ret) + ret = kvm_register_width_check_or_init(vcpu); + if (ret) { vcpu->arch.target = -1; bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES); diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c index 426bd7fbc3fd..dbf2939a6a96 100644 --- a/arch/arm64/kvm/reset.c +++ b/arch/arm64/kvm/reset.c @@ -168,9 +168,7 @@ static int kvm_vcpu_enable_ptrauth(struct kvm_vcpu *vcpu) static bool vcpu_allowed_register_width(struct kvm_vcpu *vcpu) { - struct kvm_vcpu *tmp; bool is32bit; - int i; is32bit = vcpu_has_feature(vcpu, KVM_ARM_VCPU_EL1_32BIT); if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1) && is32bit) @@ -180,12 +178,6 @@ static bool vcpu_allowed_register_width(struct kvm_vcpu *vcpu) if (kvm_has_mte(vcpu->kvm) && is32bit) return false; - /* Check that the vcpus are either all 32bit or all 64bit */ - kvm_for_each_vcpu(i, tmp, vcpu->kvm) { - if (vcpu_has_feature(tmp, KVM_ARM_VCPU_EL1_32BIT) != is32bit) - return false; - } - return true; } From patchwork Tue Jan 18 04:19:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12715877 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2130FC433EF for ; Tue, 18 Jan 2022 04:19:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232018AbiARETc (ORCPT ); Mon, 17 Jan 2022 23:19:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231974AbiARETa (ORCPT ); Mon, 17 Jan 2022 23:19:30 -0500 Received: from mail-pf1-x44a.google.com (mail-pf1-x44a.google.com [IPv6:2607:f8b0:4864:20::44a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90E0DC061574 for ; Mon, 17 Jan 2022 20:19:29 -0800 (PST) Received: by mail-pf1-x44a.google.com with SMTP id v3-20020a622f03000000b004c412d02ca3so3573356pfv.20 for ; Mon, 17 Jan 2022 20:19:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=L1k1/wMdSLA1HQ6psrDxvQbyKpHKN2/Qvj8pz+EKrQk=; b=mqm7sKEK6p2tmipMTSON5bnbVyZM2GV73524u+sg7JT7XRQiu0Q4dkn8kKt/pdcovk Aj4Wx2DaGOhLskfwzg2Bs4Ba63QdMd+E3Xhpti4Sq7woXRPfbtf1ck2niX+NZyMpc5TZ S+OO2WAt9Tk3ycIlnUlBrgfsIwkl0xIyfOO55JcVh0R7qlu+vvROw94Dtz8EB1S7zIwn iTEZsbAqirN3oskaca1U+0i4GvLyl6CQXRCb+Q1HcWftZqtBEkS99JRo4NBFa+3e4PzL prikAb9JVOAcyYOu8kNtru3tgmbQ1F/8FujxDEPTdZY9Bqg9xs1pTPZmaNoH5V1Qrvd2 dv7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=L1k1/wMdSLA1HQ6psrDxvQbyKpHKN2/Qvj8pz+EKrQk=; b=4F55mXgN9NQL/WVpwl6pDRUkoMKupzFFqtWpz+OeoUdq0iB9TfYSPmxx2FW1gjQ0pQ PfVe2i6esg4UODDmdPawOcmmYfLHhKC75hlOgc2jWKiulMgvzG8MpCWVRD90CL5BTp35 mQsN4T1aLshYfAkO653nh9Vt0la/viZI+b/yfMQFbIMTPsvKldDJwiSOLfTJEehBspbc uLLKyJv5/gOoYJucFZibTke3yjc4Xi79YRQVKSqlbCIAmzrR/OP6DzJ5GYF6Fa7VCAqS CRC9rwv9FY+IEIx2BDke1/pvLC/IhlNPBCIXlwwVzmouI3ZVYqWPzlKxbnNF5PI5r7Zd enzQ== X-Gm-Message-State: AOAM533SYu9ThekHtBxMeRRirNkcqn79yowu1JiokTJR8LBa8kp/k8KS 5uiZk4YkSBXWcVY5KO+KtmANlQIxUjg= X-Google-Smtp-Source: ABdhPJxHzeXeQoB8GC5QOXZriaOcDu0onZouykWiaWAuVHLAgHQAzp8k0qW/4hBb8BhsOB8epXJLi8IQDT4= X-Received: from reiji-vws-sp.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:3d59]) (user=reijiw job=sendgmr) by 2002:a17:90b:4d84:: with SMTP id oj4mr1163100pjb.0.1642479568706; Mon, 17 Jan 2022 20:19:28 -0800 (PST) Date: Mon, 17 Jan 2022 20:19:23 -0800 In-Reply-To: <20220118041923.3384602-1-reijiw@google.com> Message-Id: <20220118041923.3384602-2-reijiw@google.com> Mime-Version: 1.0 References: <20220118041923.3384602-1-reijiw@google.com> X-Mailer: git-send-email 2.34.1.703.g22d0c6ccf7-goog Subject: [PATCH v2 2/2] KVM: arm64: selftests: Introduce vcpu_width_config From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Will Deacon , Peter Shier , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe , Andrew Jones Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Introduce a test for aarch64 that ensures non-mixed-width vCPUs (all 64bit vCPUs or all 32bit vcPUs) can be configured, and mixed-width vCPUs cannot be configured. Reviewed-by: Andrew Jones Signed-off-by: Reiji Watanabe --- tools/testing/selftests/kvm/.gitignore | 1 + tools/testing/selftests/kvm/Makefile | 1 + .../selftests/kvm/aarch64/vcpu_width_config.c | 125 ++++++++++++++++++ 3 files changed, 127 insertions(+) create mode 100644 tools/testing/selftests/kvm/aarch64/vcpu_width_config.c diff --git a/tools/testing/selftests/kvm/.gitignore b/tools/testing/selftests/kvm/.gitignore index 3cb5ac5da087..8795a83cc382 100644 --- a/tools/testing/selftests/kvm/.gitignore +++ b/tools/testing/selftests/kvm/.gitignore @@ -3,6 +3,7 @@ /aarch64/debug-exceptions /aarch64/get-reg-list /aarch64/psci_cpu_on_test +/aarch64/vcpu_width_config /aarch64/vgic_init /s390x/memop /s390x/resets diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index 17342b575e85..259e01d0735a 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -95,6 +95,7 @@ TEST_GEN_PROGS_aarch64 += aarch64/arch_timer TEST_GEN_PROGS_aarch64 += aarch64/debug-exceptions TEST_GEN_PROGS_aarch64 += aarch64/get-reg-list TEST_GEN_PROGS_aarch64 += aarch64/psci_cpu_on_test +TEST_GEN_PROGS_aarch64 += aarch64/vcpu_width_config TEST_GEN_PROGS_aarch64 += aarch64/vgic_init TEST_GEN_PROGS_aarch64 += demand_paging_test TEST_GEN_PROGS_aarch64 += dirty_log_test diff --git a/tools/testing/selftests/kvm/aarch64/vcpu_width_config.c b/tools/testing/selftests/kvm/aarch64/vcpu_width_config.c new file mode 100644 index 000000000000..cd238e068236 --- /dev/null +++ b/tools/testing/selftests/kvm/aarch64/vcpu_width_config.c @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * vcpu_width_config - Test KVM_ARM_VCPU_INIT() with KVM_ARM_VCPU_EL1_32BIT. + * + * Copyright (c) 2022 Google LLC. + * + * This is a test that ensures that non-mixed-width vCPUs (all 64bit vCPUs + * or all 32bit vcPUs) can be configured and mixed-width vCPUs cannot be + * configured. + */ + +#define _GNU_SOURCE + +#include "kvm_util.h" +#include "processor.h" +#include "test_util.h" + + +/* + * Add a vCPU, run KVM_ARM_VCPU_INIT with @init1, and then + * add another vCPU, and run KVM_ARM_VCPU_INIT with @init2. + */ +int add_init_2vcpus(struct kvm_vcpu_init *init1, + struct kvm_vcpu_init *init2) +{ + struct kvm_vm *vm; + int ret; + + vm = vm_create(VM_MODE_DEFAULT, DEFAULT_GUEST_PHY_PAGES, O_RDWR); + + vm_vcpu_add(vm, 0); + ret = _vcpu_ioctl(vm, 0, KVM_ARM_VCPU_INIT, init1); + if (ret) + goto free_exit; + + vm_vcpu_add(vm, 1); + ret = _vcpu_ioctl(vm, 1, KVM_ARM_VCPU_INIT, init2); + +free_exit: + kvm_vm_free(vm); + return ret; +} + +/* + * Add two vCPUs, then run KVM_ARM_VCPU_INIT for one vCPU with @init1, + * and run KVM_ARM_VCPU_INIT for another vCPU with @init2. + */ +int add_2vcpus_init_2vcpus(struct kvm_vcpu_init *init1, + struct kvm_vcpu_init *init2) +{ + struct kvm_vm *vm; + int ret; + + vm = vm_create(VM_MODE_DEFAULT, DEFAULT_GUEST_PHY_PAGES, O_RDWR); + + vm_vcpu_add(vm, 0); + vm_vcpu_add(vm, 1); + + ret = _vcpu_ioctl(vm, 0, KVM_ARM_VCPU_INIT, init1); + if (ret) + goto free_exit; + + ret = _vcpu_ioctl(vm, 1, KVM_ARM_VCPU_INIT, init2); + +free_exit: + kvm_vm_free(vm); + return ret; +} + +/* + * Tests that two 64bit vCPUs can be configured, two 32bit vCPUs can be + * configured, and two mixed-witgh vCPUs cannot be configured. + * Each of those three cases, configure vCPUs in two different orders. + * The one is running KVM_CREATE_VCPU for 2 vCPUs, and then running + * KVM_ARM_VCPU_INIT for them. + * The other is running KVM_CREATE_VCPU and KVM_ARM_VCPU_INIT for a vCPU, + * and then run those commands for another vCPU. + */ +int main(void) +{ + struct kvm_vcpu_init init1, init2; + struct kvm_vm *vm; + int ret; + + if (kvm_check_cap(KVM_CAP_ARM_EL1_32BIT) <= 0) { + print_skip("KVM_CAP_ARM_EL1_32BIT is not supported"); + exit(KSFT_SKIP); + } + + /* Get the preferred target type and copy that to init2 */ + vm = vm_create(VM_MODE_DEFAULT, DEFAULT_GUEST_PHY_PAGES, O_RDWR); + vm_ioctl(vm, KVM_ARM_PREFERRED_TARGET, &init1); + kvm_vm_free(vm); + memcpy(&init2, &init1, sizeof(init2)); + + /* Test with 64bit vCPUs */ + ret = add_init_2vcpus(&init1, &init2); + TEST_ASSERT(ret == 0, + "Configuring 64bit EL1 vCPUs failed unexpectedly"); + ret = add_2vcpus_init_2vcpus(&init1, &init2); + TEST_ASSERT(ret == 0, + "Configuring 64bit EL1 vCPUs failed unexpectedly"); + + /* Test with 32bit vCPUs */ + init1.features[0] = (1 << KVM_ARM_VCPU_EL1_32BIT); + init2.features[0] = (1 << KVM_ARM_VCPU_EL1_32BIT); + ret = add_init_2vcpus(&init1, &init2); + TEST_ASSERT(ret == 0, + "Configuring 32bit EL1 vCPUs failed unexpectedly"); + ret = add_2vcpus_init_2vcpus(&init1, &init2); + TEST_ASSERT(ret == 0, + "Configuring 32bit EL1 vCPUs failed unexpectedly"); + + /* Test with mixed-width vCPUs */ + init1.features[0] = 0; + init2.features[0] = (1 << KVM_ARM_VCPU_EL1_32BIT); + ret = add_init_2vcpus(&init1, &init2); + TEST_ASSERT(ret != 0, + "Configuring mixed-width vCPUs worked unexpectedly"); + ret = add_2vcpus_init_2vcpus(&init1, &init2); + TEST_ASSERT(ret != 0, + "Configuring mixed-width vCPUs worked unexpectedly"); + + return 0; +}