From patchwork Thu Jan 20 17:57:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12718929 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B1C3C433F5 for ; Thu, 20 Jan 2022 17:58:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233249AbiATR56 (ORCPT ); Thu, 20 Jan 2022 12:57:58 -0500 Received: from smtp-relay-internal-1.canonical.com ([185.125.188.123]:40636 "EHLO smtp-relay-internal-1.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233219AbiATR56 (ORCPT ); Thu, 20 Jan 2022 12:57:58 -0500 Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 0764840028 for ; Thu, 20 Jan 2022 17:57:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1642701476; bh=OI1v3v2do2JpaG4iEWGXiW3KIkLzyCyv5Mi1khRNczo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Oyx4UgYRQzTNMP5SHrkg0wukBO0bASWi5OCM++9gY6WSlHThleHd3ngg9EbmQV9VK k1Lr/Ccxnavh1yGQcxwYL+OUaPVwWoU7Ld/mxpmk5G8s7ip962Heil9I2fXyRqE2oZ 38tgcAriDwzf/kZSxAtbgvI8QBbDNrg7JImIefB1XvvbN/tlu4P4eH+hEYLixNILlI 7qpaEHmV6HnDwKrtuk95W+timkyW7YtKLtJzME2EJKEFIFul+cdT0k6QsWHeAofzrm 0goDkVJhkQNTyk2jSKzq6Ol1IPRqA7147byt8Bi/+I8/J1Ogi3oLK2VidQS98LTSnN 4ksTvqJ6ScGXA== Received: by mail-wm1-f70.google.com with SMTP id f7-20020a1cc907000000b0034b63f314ccso4566790wmb.6 for ; Thu, 20 Jan 2022 09:57:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OI1v3v2do2JpaG4iEWGXiW3KIkLzyCyv5Mi1khRNczo=; b=NPhkaZsQldbIa0OENkt3XRDrTUcAtUO6FAsnYQ05IgaRWeS57KiAdxmDsgASRkgtF5 /tsyZqMlcpyQqy5XV7hVQh9Gqb2iW1KjNmECS0IunmeSjvMByRCdsSACjyQ92rrPKP/N YQvWoAr00/2j4a/pdabs2UeF8BYeHyJeZLq7KUIhkevC69tVXyrP75ZgDLmjDI6ddJEp Ehgk9J1Skc5WOfJgtvH6C8I6q/iieTxkgr2LqCD84xo3g4CBfPXH3kF4xrsSODJ7WYOi SYrkgUivB5o9VDRpY45/ZvRq1L6oSMA1CY3HYezMSRuQ7tZRrlFMtshD3utDdWd2fNIr JXgw== X-Gm-Message-State: AOAM530MEXJTumdT+t3N9NuFDOhRIJ5yMlzWh5HgFG1+xdJrI4iiN70Q n9YUHwDBncgnexTzYWUFIuCvXsfR3WBcwOTjrQ4lkQJUf+NgZxq+4DSuX/yo+eI6VJsQe8ouHQ5 yUMPbauk/iBQR2SPQQ3gp+o+FQy4yqDQ5qlUMBQ== X-Received: by 2002:a1c:4d0e:: with SMTP id o14mr6734wmh.1.1642701473510; Thu, 20 Jan 2022 09:57:53 -0800 (PST) X-Google-Smtp-Source: ABdhPJzmTsqY8bb8HLxL6NNBjcVpHEecqLr4GeD0bg1kTvShl9on4V8QSt4DHHPqVOEBS9tMoc/Fcw== X-Received: by 2002:a1c:4d0e:: with SMTP id o14mr6723wmh.1.1642701473346; Thu, 20 Jan 2022 09:57:53 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id a15sm3345248wrp.41.2022.01.20.09.57.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jan 2022 09:57:52 -0800 (PST) From: Krzysztof Kozlowski To: Lee Jones , Rob Herring , Benson Leung , Guenter Roeck , Krzysztof Kozlowski , Andi Shyti , Mark Brown , Sam Protsenko , Pratyush Yadav , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-spi@vger.kernel.org Cc: Alim Akhtar Subject: [PATCH v5 1/4] ARM: dts: exynos: split dmas into array of phandles in Exynos5250 Date: Thu, 20 Jan 2022 18:57:44 +0100 Message-Id: <20220120175747.43403-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220120175747.43403-1-krzysztof.kozlowski@canonical.com> References: <20220120175747.43403-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org "dmas" property should be rather an array of phandles, as dtschema points. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Andi Shyti Reviewed-by: Alim Akhtar --- arch/arm/boot/dts/exynos5250.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 139778928b93..102bb57bf704 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -496,8 +496,7 @@ spi_0: spi@12d20000 { status = "disabled"; reg = <0x12d20000 0x100>; interrupts = ; - dmas = <&pdma0 5 - &pdma0 4>; + dmas = <&pdma0 5>, <&pdma0 4>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; @@ -512,8 +511,7 @@ spi_1: spi@12d30000 { status = "disabled"; reg = <0x12d30000 0x100>; interrupts = ; - dmas = <&pdma1 5 - &pdma1 4>; + dmas = <&pdma1 5>, <&pdma1 4>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; @@ -528,8 +526,7 @@ spi_2: spi@12d40000 { status = "disabled"; reg = <0x12d40000 0x100>; interrupts = ; - dmas = <&pdma0 7 - &pdma0 6>; + dmas = <&pdma0 7>, <&pdma0 6>; dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; From patchwork Thu Jan 20 17:57:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12718930 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52681C433EF for ; Thu, 20 Jan 2022 17:58:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233290AbiATR6C (ORCPT ); Thu, 20 Jan 2022 12:58:02 -0500 Received: from smtp-relay-internal-0.canonical.com ([185.125.188.122]:33574 "EHLO smtp-relay-internal-0.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233227AbiATR56 (ORCPT ); Thu, 20 Jan 2022 12:57:58 -0500 Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 1C4144004F for ; Thu, 20 Jan 2022 17:57:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1642701477; bh=E9qTf+jyrgE7Zki5gZgFWFANdAie2Ya6TkLorpLfyTU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WU+yYhIeGkBxT7WaTcd+slKfBwv/5Vsw4HUFlz9fnTHxu4Cc2M9xIeCYIDrxED7zE UiKLs+fAHgnHo7ekt/7wEQb+nA0Xhs/AIwyzc1G/juofePd/S+XX/kKN8duVX9202q opVNUQlwJXF3MiY7xYskdI4eJ/w6rvro0JGSlvQc2pV95YR7MbSAzknGyTdeEvhx19 5tpvmnS6NNvqPKdzqHTziiiJcZeJvIxvhDqKTxLGJzDJfZJKBxhV2W9xFiBlFSd4wO bX97erD6yRFSY/Y/Vg9GnIFXj4KGerSrNEq1r4seYhzIVMOUpfXZx2Sgh+WlhiRY++ dpk3DdZJAi59w== Received: by mail-wm1-f72.google.com with SMTP id f188-20020a1c1fc5000000b0034d79edde84so3255529wmf.0 for ; Thu, 20 Jan 2022 09:57:57 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E9qTf+jyrgE7Zki5gZgFWFANdAie2Ya6TkLorpLfyTU=; b=79DcCX/ZPyGfW1Xx5Bc29fbMpa4AjsW9qEj4ewWBQ9i5jdWGSUHhUTfVOSpPEs+1zS Bm3xzIeEKkdR6OGadD+Vpe/HBeA6Y/IQroTW4p9bMlM4HEOsbDskORsQeyLXqsN9VPk7 sK0e4fUZld9Zlqc/UOjOr1cb8NqJ+ebWHZ5xeXPntuPCeAI3Oy5BDmUc9e69bBaf8032 FHJ8v+5H4TRG6Klh8EyN5O57bI1zid5KLgaLdfzOaNqd7Md/jZrUEQ02rhFgV5Uwv7bK fu1LkQJ9WhLtP01CVrT9+t+26dvZMOA3zffa67xsnrilHIqaKDbl9xFkyvFZ1oRL4hKR bLHQ== X-Gm-Message-State: AOAM532J3mZsuOWs5VhjVZbqONS0qcJx4qeMElkPu5kcRTrBDyS8FaRD 1FtSgR0VWHxNOugGQbmGcq4VymM/+sYg3Gl9X+iUivv1B/x1RN5jI25d/R9tquqgBoCiBBY4Avm Zp2asIo0CKIFMlkgwanELD5b58QB531um9dI40A== X-Received: by 2002:a5d:5246:: with SMTP id k6mr179180wrc.594.1642701475201; Thu, 20 Jan 2022 09:57:55 -0800 (PST) X-Google-Smtp-Source: ABdhPJwRRN1iyHYaFep89Q/UTONb4iXJIjwvvos1tShOt1mBdq1sC8FaGplxY3OvZ2nMLI0gfDjP7Q== X-Received: by 2002:a5d:5246:: with SMTP id k6mr179155wrc.594.1642701474853; Thu, 20 Jan 2022 09:57:54 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id a15sm3345248wrp.41.2022.01.20.09.57.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jan 2022 09:57:54 -0800 (PST) From: Krzysztof Kozlowski To: Lee Jones , Rob Herring , Benson Leung , Guenter Roeck , Krzysztof Kozlowski , Andi Shyti , Mark Brown , Sam Protsenko , Pratyush Yadav , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-spi@vger.kernel.org Cc: Alim Akhtar Subject: [PATCH v5 2/4] spi: dt-bindings: samsung: convert to dtschema Date: Thu, 20 Jan 2022 18:57:45 +0100 Message-Id: <20220120175747.43403-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220120175747.43403-1-krzysztof.kozlowski@canonical.com> References: <20220120175747.43403-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Convert the Samsung SoC (S3C24xx, S3C64xx, S5Pv210, Exynos) SPI controller bindings to DT schema format. The conversion also drops requirement from providing controller-data and its data for each of SPI peripheral device nodes. The dtschema cannot express this and the requirement is being relaxed in the driver now. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sam Protsenko Acked-by: Pratyush Yadav --- .../bindings/soc/samsung/exynos-usi.yaml | 2 +- .../spi/samsung,spi-peripheral-props.yaml | 33 ++++ .../devicetree/bindings/spi/samsung,spi.yaml | 187 ++++++++++++++++++ .../bindings/spi/spi-peripheral-props.yaml | 1 + .../devicetree/bindings/spi/spi-samsung.txt | 122 ------------ MAINTAINERS | 2 +- 6 files changed, 223 insertions(+), 124 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml create mode 100644 Documentation/devicetree/bindings/spi/samsung,spi.yaml delete mode 100644 Documentation/devicetree/bindings/spi/spi-samsung.txt diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml index 273f2d95a043..e72b6a3fae99 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml @@ -22,7 +22,7 @@ description: | [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt - [3] Documentation/devicetree/bindings/spi/spi-samsung.txt + [3] Documentation/devicetree/bindings/spi/samsung,spi.yaml properties: $nodename: diff --git a/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml new file mode 100644 index 000000000000..f0db3fb3d688 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/samsung,spi-peripheral-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Peripheral-specific properties for Samsung S3C/S5P/Exynos SoC SPI controller + +maintainers: + - Krzysztof Kozlowski + +description: + See spi-peripheral-props.yaml for more info. + +properties: + controller-data: + type: object + additionalProperties: false + + properties: + samsung,spi-feedback-delay: + description: | + The sampling phase shift to be applied on the miso line (to account + for any lag in the miso line). Valid values: + - 0: No phase shift. + - 1: 90 degree phase shift sampling. + - 2: 180 degree phase shift sampling. + - 3: 270 degree phase shift sampling. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + default: 0 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/spi/samsung,spi.yaml b/Documentation/devicetree/bindings/spi/samsung,spi.yaml new file mode 100644 index 000000000000..61c77088e8ee --- /dev/null +++ b/Documentation/devicetree/bindings/spi/samsung,spi.yaml @@ -0,0 +1,187 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/samsung,spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S3C/S5P/Exynos SoC SPI controller + +maintainers: + - Krzysztof Kozlowski + +description: + All the SPI controller nodes should be represented in the aliases node using + the following format 'spi{n}' where n is a unique number for the alias. + +properties: + compatible: + oneOf: + - enum: + - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450 + - samsung,s3c6410-spi + - samsung,s5pv210-spi # for S5PV210 and S5PC110 + - samsung,exynos5433-spi + - const: samsung,exynos7-spi + deprecated: true + + clocks: + minItems: 2 + maxItems: 3 + + clock-names: + minItems: 2 + maxItems: 3 + + cs-gpios: true + + dmas: + minItems: 2 + maxItems: 2 + + dma-names: + items: + - const: tx + - const: rx + + interrupts: + maxItems: 1 + + no-cs-readback: + description: + The CS line is disconnected, therefore the device should not operate + based on CS signalling. + type: boolean + + num-cs: + minimum: 1 + maximum: 4 + default: 1 + + samsung,spi-src-clk: + description: + If the spi controller includes a internal clock mux to select the clock + source for the spi bus clock, this property can be used to indicate the + clock to be used for driving the spi bus clock. If not specified, the + clock number 0 is used as default. + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - clock-names + - dmas + - dma-names + - interrupts + - reg + +allOf: + - $ref: spi-controller.yaml# + - if: + properties: + compatible: + contains: + const: samsung,exynos5433-spi + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: spi + - enum: + - spi_busclk0 + - spi_busclk1 + - spi_busclk2 + - spi_busclk3 + - const: spi_ioclk + else: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: spi + - enum: + - spi_busclk0 + - spi_busclk1 + - spi_busclk2 + - spi_busclk3 + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + spi@14d30000 { + compatible = "samsung,exynos5433-spi"; + reg = <0x14d30000 0x100>; + interrupts = ; + dmas = <&pdma0 11>, <&pdma0 10>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_peric CLK_PCLK_SPI1>, + <&cmu_peric CLK_SCLK_SPI1>, + <&cmu_peric CLK_SCLK_IOCLK_SPI1>; + clock-names = "spi", + "spi_busclk0", + "spi_ioclk"; + samsung,spi-src-clk = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_bus>; + num-cs = <1>; + + cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; + + audio-codec@0 { + compatible = "wlf,wm5110"; + reg = <0x0>; + spi-max-frequency = <20000000>; + interrupt-parent = <&gpa0>; + interrupts = <4 IRQ_TYPE_NONE>; + clocks = <&pmu_system_controller 0>, + <&s2mps13_osc S2MPS11_CLK_BT>; + clock-names = "mclk1", "mclk2"; + + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + wlf,micd-detect-debounce = <300>; + wlf,micd-bias-start-time = <0x1>; + wlf,micd-rate = <0x7>; + wlf,micd-dbtime = <0x2>; + wlf,micd-force-micbias; + wlf,micd-configs = <0x0 1 0>; + wlf,hpdet-channel = <1>; + wlf,gpsw = <0x1>; + wlf,inmode = <2 0 2 0>; + + wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>; + wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>; + + /* core supplies */ + AVDD-supply = <&ldo18_reg>; + DBVDD1-supply = <&ldo18_reg>; + CPVDD-supply = <&ldo18_reg>; + DBVDD2-supply = <&ldo18_reg>; + DBVDD3-supply = <&ldo18_reg>; + SPKVDDL-supply = <&ldo18_reg>; + SPKVDDR-supply = <&ldo18_reg>; + + controller-data { + samsung,spi-feedback-delay = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 5dd209206e88..df885eeb144f 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -85,5 +85,6 @@ properties: # The controller specific properties go here. allOf: - $ref: cdns,qspi-nor-peripheral-props.yaml# + - $ref: samsung,spi-peripheral-props.yaml# additionalProperties: true diff --git a/Documentation/devicetree/bindings/spi/spi-samsung.txt b/Documentation/devicetree/bindings/spi/spi-samsung.txt deleted file mode 100644 index 49028a4f5df1..000000000000 --- a/Documentation/devicetree/bindings/spi/spi-samsung.txt +++ /dev/null @@ -1,122 +0,0 @@ -* Samsung SPI Controller - -The Samsung SPI controller is used to interface with various devices such as flash -and display controllers using the SPI communication interface. - -Required SoC Specific Properties: - -- compatible: should be one of the following. - - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms - - samsung,s3c6410-spi: for s3c6410 platforms - - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms - - samsung,exynos5433-spi: for exynos5433 compatible controllers - - samsung,exynos7-spi: for exynos7 platforms - -- reg: physical base address of the controller and length of memory mapped - region. - -- interrupts: The interrupt number to the cpu. The interrupt specifier format - depends on the interrupt controller. - -- dmas : Two or more DMA channel specifiers following the convention outlined - in bindings/dma/dma.txt - -- dma-names: Names for the dma channels. There must be at least one channel - named "tx" for transmit and named "rx" for receive. - -- clocks: specifies the clock IDs provided to the SPI controller; they are - required for interacting with the controller itself, for synchronizing the bus - and as I/O clock (the latter is required by exynos5433 and exynos7). - -- clock-names: string names of the clocks in the 'clocks' property; for all the - the devices the names must be "spi", "spi_busclkN" (where N is determined by - "samsung,spi-src-clk"), while Exynos5433 should specify a third clock - "spi_ioclk" for the I/O clock. - -Required Board Specific Properties: - -- #address-cells: should be 1. -- #size-cells: should be 0. - -Optional Board Specific Properties: - -- samsung,spi-src-clk: If the spi controller includes a internal clock mux to - select the clock source for the spi bus clock, this property can be used to - indicate the clock to be used for driving the spi bus clock. If not specified, - the clock number 0 is used as default. - -- num-cs: Specifies the number of chip select lines supported. If - not specified, the default number of chip select lines is set to 1. - -- cs-gpios: should specify GPIOs used for chipselects (see spi-bus.txt) - -- no-cs-readback: the CS line is disconnected, therefore the device should not - operate based on CS signalling. - -SPI Controller specific data in SPI slave nodes: - -- The spi slave nodes should provide the following information which is required - by the spi controller. - - - samsung,spi-feedback-delay: The sampling phase shift to be applied on the - miso line (to account for any lag in the miso line). The following are the - valid values. - - - 0: No phase shift. - - 1: 90 degree phase shift sampling. - - 2: 180 degree phase shift sampling. - - 3: 270 degree phase shift sampling. - -Aliases: - -- All the SPI controller nodes should be represented in the aliases node using - the following format 'spi{n}' where n is a unique number for the alias. - - -Example: - -- SoC Specific Portion: - - spi_0: spi@12d20000 { - compatible = "samsung,exynos4210-spi"; - reg = <0x12d20000 0x100>; - interrupts = <0 66 0>; - dmas = <&pdma0 5 - &pdma0 4>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - }; - -- Board Specific Portion: - - spi_0: spi@12d20000 { - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_bus>; - cs-gpios = <&gpa2 5 0>; - - w25q80bw@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "w25x80"; - reg = <0>; - spi-max-frequency = <10000>; - - controller-data { - samsung,spi-feedback-delay = <0>; - }; - - partition@0 { - label = "U-Boot"; - reg = <0x0 0x40000>; - read-only; - }; - - partition@40000 { - label = "Kernel"; - reg = <0x40000 0xc0000>; - }; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 5ea5655a29c3..1f951bc877f0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17054,7 +17054,7 @@ M: Andi Shyti L: linux-spi@vger.kernel.org L: linux-samsung-soc@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/spi/spi-samsung.txt +F: Documentation/devicetree/bindings/spi/samsung,spi*.yaml F: drivers/spi/spi-s3c* F: include/linux/platform_data/spi-s3c64xx.h F: include/linux/spi/s3c24xx-fiq.h From patchwork Thu Jan 20 17:57:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12718931 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19361C43217 for ; Thu, 20 Jan 2022 17:58:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233230AbiATR6E (ORCPT ); Thu, 20 Jan 2022 12:58:04 -0500 Received: from smtp-relay-internal-1.canonical.com ([185.125.188.123]:40704 "EHLO smtp-relay-internal-1.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233286AbiATR6C (ORCPT ); Thu, 20 Jan 2022 12:58:02 -0500 Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 68DF840029 for ; Thu, 20 Jan 2022 17:57:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1642701479; bh=/3v0ODpKqPKT6xfm5F2p0Vtuoh7k/TVt0vSupJe6roo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=aTZ+v5cHIfgUT/JDlwUxpsN/rc26RhsMvmfi1Uog5BH0KIirRstNngcUMyzy9mwbe NSadKCChmYzmDPPGOvPAu4VJliQk92O7d7YhWLIKul4wn44r+x+M0140/pI7V/I9HK hH6XJg/++z+ha0bexn1hSvelcffjUKdg7PadNkahRnRBp7v9GC1Jb3XE82BSLoBi+h NtJxD8qLYRWLz/f5XtMvbMGEK+muYWpLKzFYdO2X5wKbJ6MvJnMxeq6TnY2C2mCbkR 6en2lAbn0nxiVp9K85Xxa/Amb6Pdr+r2E7xD26zu7aKMXA7ZFvUIq6VcKTZDN9J8qF MwzfwyIL2sAvw== Received: by mail-wm1-f71.google.com with SMTP id f7-20020a1cc907000000b0034b63f314ccso4566907wmb.6 for ; Thu, 20 Jan 2022 09:57:59 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/3v0ODpKqPKT6xfm5F2p0Vtuoh7k/TVt0vSupJe6roo=; b=Eh5Dmghhh5DW1AkDOAy6yxGQw6RDTUGU4CDoS3JVqs01Ylx5JayCkmJVV+TM1a3ORH JDqL/7kXIgEt+imckeqc9V4acZ3uZK41QLkdQx2h2g7U3sKmkazvaFfPdxOoY/oiKI9e ZeP7+UxEiUW7cnSSosQ9KdHxsPfSKJhGg/KI4Fb1J5tFebwxPmcWWczgqz9EIu8jLuNO of+I7D2QZXw7JgYwpgr/GHeYxiTzczc2He5b6eIXgZWynoEy7peLY0/4Xfx94ioZS4pa 8uvUNcaaR4QsQJDd9oQhgK6P1Xdyd22vyvLeUDc87y4tlHw9rEroBgoPJ0kumkrj8UoZ 2i4g== X-Gm-Message-State: AOAM531SpbHXTqJeHXRemaGSq3EHxvisfl/Ifu8GUdVYHya2sGVmYCQL IlfEDWs0Ur7grNCJX3FWYJXptTWsolfp3f7vwDnoaxLgIGSXEVgZYMIpM/FvrvDqPFCve8DuXhh d+j/8NL0sF1Ny349jMGXv/0XxTCHZbHjYg+Oi7w== X-Received: by 2002:a05:6000:1c13:: with SMTP id ba19mr176101wrb.596.1642701478044; Thu, 20 Jan 2022 09:57:58 -0800 (PST) X-Google-Smtp-Source: ABdhPJxhwMyD9fO2VO2ZxMCEwkgCAOSt3IG/OVO26kt5oMd7p3iF3fXfWPpKhSkmmXV0Ml2hMlK55Q== X-Received: by 2002:a05:6000:1c13:: with SMTP id ba19mr176085wrb.596.1642701477906; Thu, 20 Jan 2022 09:57:57 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id a15sm3345248wrp.41.2022.01.20.09.57.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jan 2022 09:57:55 -0800 (PST) From: Krzysztof Kozlowski To: Lee Jones , Rob Herring , Benson Leung , Guenter Roeck , Krzysztof Kozlowski , Andi Shyti , Mark Brown , Sam Protsenko , Pratyush Yadav , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-spi@vger.kernel.org Cc: Alim Akhtar Subject: [PATCH v5 3/4] mfd: dt-bindings: google,cros-ec: reference Samsung SPI bindings Date: Thu, 20 Jan 2022 18:57:46 +0100 Message-Id: <20220120175747.43403-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220120175747.43403-1-krzysztof.kozlowski@canonical.com> References: <20220120175747.43403-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The ChromeOS Embedded Controller appears on boards with Samsung Exynos SoC, where Exynos SPI bindings expect controller-data node. Reference newly added dtschema for this property. Signed-off-by: Krzysztof Kozlowski --- .../bindings/mfd/google,cros-ec.yaml | 29 ++++++++++--------- 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml index 58a1a9405228..66a995bbbbe9 100644 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml @@ -31,7 +31,7 @@ properties: controller-data: description: - SPI controller data, see bindings/spi/spi-samsung.txt + SPI controller data, see bindings/spi/samsung,spi-peripheral-props.yaml type: object google,cros-ec-spi-pre-delay: @@ -148,18 +148,21 @@ patternProperties: required: - compatible -if: - properties: - compatible: - contains: - enum: - - google,cros-ec-i2c - - google,cros-ec-rpmsg -then: - properties: - google,cros-ec-spi-pre-delay: false - google,cros-ec-spi-msg-delay: false - spi-max-frequency: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - google,cros-ec-i2c + - google,cros-ec-rpmsg + then: + properties: + google,cros-ec-spi-pre-delay: false + google,cros-ec-spi-msg-delay: false + spi-max-frequency: false + + - $ref: /schemas/spi/samsung,spi-peripheral-props.yaml additionalProperties: false From patchwork Thu Jan 20 17:57:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12718932 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2502C433F5 for ; Thu, 20 Jan 2022 17:58:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233310AbiATR6H (ORCPT ); Thu, 20 Jan 2022 12:58:07 -0500 Received: from smtp-relay-internal-1.canonical.com ([185.125.188.123]:40728 "EHLO smtp-relay-internal-1.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233314AbiATR6D (ORCPT ); Thu, 20 Jan 2022 12:58:03 -0500 Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id B68394002A for ; Thu, 20 Jan 2022 17:58:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1642701481; bh=bto/xpfUsOVGNmCnHot8/BAzxWmx4lezX3yYM6aPOPk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=vhcDZZRFEmkY22c6I7rDHDL1V+VoQMk+AkUsg7tRkTtgS7i5bTgxltllAirbqj0aB onvYTPf7zzdO1IUmOX778SJ/I5c4fEoefhVdkt6DtjwMFin5NM/W75vACwUJT60JVF dfAZ+xddDrgcuKNn5MVP4rNGW58wrH14yi6SbRq5Lj6gFpI623GBdipUp1w+lLRzV9 LIu+oiFDhdo7ievbKBKwayvSDvEl4+1Gf2qkm0+yNs7JLkTFQa3mrO0IYLT0DyugJ5 P/B9eMHnZQtjnDH+XH4iklSCvP82IFUAVt7CGSj6N34KmiqKDoG4bOVhNqb7KDxIdh Kf2MBL/ycgarA== Received: by mail-wm1-f69.google.com with SMTP id c188-20020a1c35c5000000b00346a2160ea8so3248676wma.9 for ; Thu, 20 Jan 2022 09:58:01 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bto/xpfUsOVGNmCnHot8/BAzxWmx4lezX3yYM6aPOPk=; b=dZcw+9prmBBWADcnEeaVrT/CMqD/mjYLt1c9UpjR9Ueba1+M3kfmNOGaBf6EnAus4s kFMbwTNEal46fbqwrt6m3FOTc3v1T2+UgcVp2aWOWpVLi3T4Tj8NapYateBYpWw8gIny aenSTDu/oDH/bOO3yisUxgCbH2ealVqZo5SP+eyOf7kIts9PDThyh5Y6PknEYHaDU9RD RNCpSVVNff6GRJPfWIyzcwP8ZS7TE12RCUon5Mm97HbCh85SNIOhMUtz7Vf/y5kDbfkO Syu2KtE44uLMsU6bC9WEqaAybAXBOyqWN2uuPpoF3dwP/4Sfyozc0vJ80Bn2zsv5uef8 ARhQ== X-Gm-Message-State: AOAM533UzIPCR2FsDolwzxEMNlHZVSHG3nv3gQFY+aej24A7yTt5q8ti kCAe3gfpQyJSQGozfDXVfoswH73T5Y/pCaioAmHm+xgRNZKAHyzTOT1AvHA4VjpXG6R93+uEKf4 2rb+E9jo6CTBl5H/zIpD13o8OoapwuXdl8LG3TA== X-Received: by 2002:a1c:f012:: with SMTP id a18mr9989439wmb.73.1642701479319; Thu, 20 Jan 2022 09:57:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJyqTIBDSwhzIJAAvThOjafSh4STpzbcmwUKvBnw8h3aAFohpEEpbyymlmGUkzLSw2lwFS1cZQ== X-Received: by 2002:a1c:f012:: with SMTP id a18mr9989419wmb.73.1642701479169; Thu, 20 Jan 2022 09:57:59 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id a15sm3345248wrp.41.2022.01.20.09.57.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jan 2022 09:57:58 -0800 (PST) From: Krzysztof Kozlowski To: Lee Jones , Rob Herring , Benson Leung , Guenter Roeck , Krzysztof Kozlowski , Andi Shyti , Mark Brown , Sam Protsenko , Pratyush Yadav , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-spi@vger.kernel.org Cc: Alim Akhtar , Rob Herring Subject: [PATCH v5 4/4] spi: s3c64xx: allow controller-data to be optional Date: Thu, 20 Jan 2022 18:57:47 +0100 Message-Id: <20220120175747.43403-5-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220120175747.43403-1-krzysztof.kozlowski@canonical.com> References: <20220120175747.43403-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The Samsung SoC SPI driver requires to provide controller-data node for each of SPI peripheral device nodes. Make this controller-data node optional, so DTS could be simpler. Suggested-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sam Protsenko Reviewed-by: Andi Shyti --- drivers/spi/spi-s3c64xx.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 8755cd85e83c..386550fca81c 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -796,16 +796,14 @@ static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata( return ERR_PTR(-EINVAL); } - data_np = of_get_child_by_name(slave_np, "controller-data"); - if (!data_np) { - dev_err(&spi->dev, "child node 'controller-data' not found\n"); - return ERR_PTR(-EINVAL); - } - cs = kzalloc(sizeof(*cs), GFP_KERNEL); - if (!cs) { - of_node_put(data_np); + if (!cs) return ERR_PTR(-ENOMEM); + + data_np = of_get_child_by_name(slave_np, "controller-data"); + if (!data_np) { + dev_info(&spi->dev, "feedback delay set to default (0)\n"); + return cs; } of_property_read_u32(data_np, "samsung,spi-feedback-delay", &fb_delay);