From patchwork Fri Jan 21 07:19:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?QXhlIFlhbmcgKOadqOejiik=?= X-Patchwork-Id: 12719374 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE673C433EF for ; Fri, 21 Jan 2022 07:25:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=U35W9yCWygA0GnpNar6X+y/+1vqqM+N5xZwdJlF7R+g=; b=zxWDY/efrO0tPS AB2S4I2n/NPvz0UMNSX/QazGSf2u99gjp4OBF5fATM9Th9DEo02CzQHVwmwQ/1PjBlqKjMoQOduRT II+6I8GCcH298hQnH8sDZXWUKjTY04S0hRX5quHvDJ8jE3qx2KF5TkxxtSCtv7EyBMVL8hKR1OFrP YazXSGCgMeZlYEe20tpOul0118QdaS+7x1PMXnRBSz8Oh83KFxM7tk/9X1XX5edI+pcSy0UaYMIJM LuZRQyvsiawxag4I8hYOmxTPxvOh1HfZL9ozQvStH4R6u+m4acAwwQDGxOg0xbaE5xhrRnrC5NXIQ gk2FMDwCKCerWCSHdrhQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAoIY-00E32Q-84; Fri, 21 Jan 2022 07:25:26 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAoIN-00E30s-10; Fri, 21 Jan 2022 07:25:16 +0000 X-UUID: 4875033ce494464f846b883375d3a675-20220121 X-UUID: 4875033ce494464f846b883375d3a675-20220121 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 607781815; Fri, 21 Jan 2022 00:25:09 -0700 Received: from mtkmbs10n1.mediatek.inc (172.21.101.34) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 20 Jan 2022 23:19:47 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 21 Jan 2022 15:19:46 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 21 Jan 2022 15:19:45 +0800 From: Axe Yang To: Ulf Hansson , Rob Herring , Chaotian Jing , Matthias Brugger , Adrian Hunter CC: Yoshihiro Shimoda , Satya Tangirala , Andy Shevchenko , Wolfram Sang , Axe Yang , Lucas Stach , Eric Biggers , Andrew Jeffery , Stephen Boyd , Kiwoong Kim , Yue Hu , Tian Tao , , , , , , Subject: [PATCH v5 1/3] dt-bindings: mmc: add cap-sdio-async-irq flag Date: Fri, 21 Jan 2022 15:19:40 +0800 Message-ID: <20220121071942.11601-2-axe.yang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220121071942.11601-1-axe.yang@mediatek.com> References: <20220121071942.11601-1-axe.yang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220120_232515_108583_974A0308 X-CRM114-Status: GOOD ( 11.21 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Asynchronous interrupt is a mechanism that allow SDIO devices alarm interrupt when host stop providing clock to card. Add a DT flag to enable this feature if it is supported by SDIO card. Signed-off-by: Axe Yang Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/mmc/mmc-controller.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml index 513f3c8758aa..16fb06f88471 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -165,6 +165,11 @@ properties: description: eMMC hardware reset is supported + cap-sdio-async-irq: + $ref: /schemas/types.yaml#/definitions/flag + description: + SDIO async interrupt is supported. + cap-sdio-irq: $ref: /schemas/types.yaml#/definitions/flag description: From patchwork Fri Jan 21 07:19:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?QXhlIFlhbmcgKOadqOejiik=?= X-Patchwork-Id: 12719364 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA3ABC433F5 for ; Fri, 21 Jan 2022 07:20:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LgPFLMFtXgh4/A3VcBF7CM+qsTw6rSc7SCdQT+KT/mE=; b=hMt9F+wNudZBnA AsSQTV7yLB09hJWdBCrvw8miqbiGeuAAo5v+sV5RaJmzZhdACBD1DpQQzXfq+kjqxeoq0KoNyOdwW 9sdyRt/BOa3ad3XQUN+49IzBqOMcmiDc2Bikg6LjX4GEgx2l6l6l+3G0MpPsCb/5OVh1shDmjiI1M 1WtN9e2/pE++7KEN335wvCiSrpHNwhTO6Eoi0ePDc2/cjNFjXmANWpGUrAtS8gcZqWAN42gdkQoYL +Ekc9bUaTh6rdoKd2vVTqTd1VI0MD85cp2QbQDQwcMk6d/Fl7mZ9V7k18J8Y1FgDHALEvNblL169S h8pvD4CXyOubMGmZcqmQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAoDL-00E2YE-OM; Fri, 21 Jan 2022 07:20:03 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nAoDI-00E2VF-77; Fri, 21 Jan 2022 07:20:01 +0000 X-UUID: a58c552daf164f0b91006c7fbfaa0b73-20220121 X-UUID: a58c552daf164f0b91006c7fbfaa0b73-20220121 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1990731876; Fri, 21 Jan 2022 00:19:50 -0700 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 20 Jan 2022 23:19:49 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 21 Jan 2022 15:19:47 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 21 Jan 2022 15:19:46 +0800 From: Axe Yang To: Ulf Hansson , Rob Herring , Chaotian Jing , Matthias Brugger , Adrian Hunter CC: Yoshihiro Shimoda , Satya Tangirala , Andy Shevchenko , Wolfram Sang , Axe Yang , Lucas Stach , Eric Biggers , Andrew Jeffery , Stephen Boyd , Kiwoong Kim , Yue Hu , Tian Tao , , , , , , Subject: [PATCH v5 2/3] mmc: core: Add support for SDIO async interrupt Date: Fri, 21 Jan 2022 15:19:41 +0800 Message-ID: <20220121071942.11601-3-axe.yang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220121071942.11601-1-axe.yang@mediatek.com> References: <20220121071942.11601-1-axe.yang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220120_232000_289520_6EF81E8F X-CRM114-Status: GOOD ( 18.25 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org If cap-sdio-async-irq flag is set in host dts node, parse EAI information from SDIO CCCR interrupt externsion segment. If async interrupt is supported by SDIO card then send command to card to enable it and set enable_async_irq flag in sdio_cccr structure to 1. The parse flow is implemented in sdio_read_cccr(). Acked-by: AngeloGioacchino Del Regno Signed-off-by: Axe Yang --- drivers/mmc/core/host.c | 2 ++ drivers/mmc/core/sdio.c | 17 +++++++++++++++++ include/linux/mmc/card.h | 3 ++- include/linux/mmc/host.h | 1 + include/linux/mmc/sdio.h | 5 +++++ 5 files changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index cf140f4ec864..a972241548b4 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c @@ -410,6 +410,8 @@ int mmc_of_parse(struct mmc_host *host) if (device_property_read_bool(dev, "no-mmc-hs400")) host->caps2 &= ~(MMC_CAP2_HS400_1_8V | MMC_CAP2_HS400_1_2V | MMC_CAP2_HS400_ES); + if (device_property_read_bool(dev, "cap-sdio-async-irq")) + host->caps2 |= MMC_CAP2_SDIO_ASYNC_IRQ; /* Must be after "non-removable" check */ if (device_property_read_u32(dev, "fixed-emmc-driver-type", &drv_type) == 0) { diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index 41164748723d..771fb5d18585 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c @@ -225,6 +225,23 @@ static int sdio_read_cccr(struct mmc_card *card, u32 ocr) card->sw_caps.sd3_drv_type |= SD_DRIVER_TYPE_C; if (data & SDIO_DRIVE_SDTD) card->sw_caps.sd3_drv_type |= SD_DRIVER_TYPE_D; + + if (card->host->caps2 & MMC_CAP2_SDIO_ASYNC_IRQ) { + ret = mmc_io_rw_direct(card, 0, 0, SDIO_CCCR_INTERRUPT_EXT, 0, + &data); + if (ret) + goto out; + + if (data & SDIO_INTERRUPT_EXT_SAI) { + data |= SDIO_INTERRUPT_EXT_EAI; + ret = mmc_io_rw_direct(card, 1, 0, SDIO_CCCR_INTERRUPT_EXT, + data, NULL); + if (ret) + goto out; + + card->cccr.enable_async_irq = 1; + } + } } /* if no uhs mode ensure we check for high speed */ diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index 37f975875102..4df9182bc0e6 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -219,7 +219,8 @@ struct sdio_cccr { wide_bus:1, high_power:1, high_speed:1, - disable_cd:1; + disable_cd:1, + enable_async_irq:1; }; struct sdio_cis { diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 7afb57cab00b..502a5418264c 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -402,6 +402,7 @@ struct mmc_host { #define MMC_CAP2_CRYPTO 0 #endif #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */ +#define MMC_CAP2_SDIO_ASYNC_IRQ (1 << 29) /* SDIO host supports asynchronous interrupt */ int fixed_drv_type; /* fixed driver type for non-removable media */ diff --git a/include/linux/mmc/sdio.h b/include/linux/mmc/sdio.h index 2a05d1ac4f0e..1ef400f28642 100644 --- a/include/linux/mmc/sdio.h +++ b/include/linux/mmc/sdio.h @@ -159,6 +159,11 @@ #define SDIO_DTSx_SET_TYPE_A (1 << SDIO_DRIVE_DTSx_SHIFT) #define SDIO_DTSx_SET_TYPE_C (2 << SDIO_DRIVE_DTSx_SHIFT) #define SDIO_DTSx_SET_TYPE_D (3 << SDIO_DRIVE_DTSx_SHIFT) + +#define SDIO_CCCR_INTERRUPT_EXT 0x16 +#define SDIO_INTERRUPT_EXT_SAI (1 << 0) +#define SDIO_INTERRUPT_EXT_EAI (1 << 1) + /* * Function Basic Registers (FBR) */ From patchwork Fri Jan 21 07:19:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?QXhlIFlhbmcgKOadqOejiik=?= X-Patchwork-Id: 12719382 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A36DEC433EF for ; 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Fri, 21 Jan 2022 15:19:47 +0800 From: Axe Yang To: Ulf Hansson , Rob Herring , Chaotian Jing , Matthias Brugger , Adrian Hunter CC: Yoshihiro Shimoda , Satya Tangirala , Andy Shevchenko , Wolfram Sang , Axe Yang , Lucas Stach , Eric Biggers , Andrew Jeffery , Stephen Boyd , Kiwoong Kim , Yue Hu , Tian Tao , , , , , , , Yong Mao Subject: [PATCH v5 3/3] mmc: mediatek: add support for SDIO eint IRQ Date: Fri, 21 Jan 2022 15:19:42 +0800 Message-ID: <20220121071942.11601-4-axe.yang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220121071942.11601-1-axe.yang@mediatek.com> References: <20220121071942.11601-1-axe.yang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220120_232957_226828_64FC19BC X-CRM114-Status: GOOD ( 26.95 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add support for eint IRQ when MSDC is used as an SDIO host. This feature requires SDIO device support async IRQ function. With this feature, SDIO host can be awakened by SDIO card in suspend state, without additional pin. MSDC driver will time-share the SDIO DAT1 pin. During suspend, MSDC turn off clock and switch SDIO DAT1 pin to GPIO mode. And during resume, switch GPIO function back to DAT1 mode then turn on clock. Some device tree property should be added or modified in MSDC node to support SDIO eint IRQ. Pinctrls named state_dat1 and state_eint are mandatory. And cap-sdio-async-irq flag is necessary since this feature depends on asynchronous interrupt: &mmcX { ... pinctrl-names = "default", "state_uhs", "state_eint", "state_dat1"; ... pinctrl-2 = <&mmc2_pins_eint>; pinctrl-3 = <&mmc2_pins_dat1>; ... cap-sdio-async-irq; ... }; Co-developed-by: Yong Mao Signed-off-by: Yong Mao Signed-off-by: Axe Yang Reviewed-by: Andy Shevchenko Acked-by: Chaotian Jing --- drivers/mmc/host/mtk-sd.c | 123 +++++++++++++++++++++++++++++++++++--- 1 file changed, 115 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 65037e1d7723..f8e38228d810 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2014-2015 MediaTek Inc. + * Copyright (c) 2014-2015, 2022 MediaTek Inc. * Author: Chaotian.Jing */ @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -440,8 +441,12 @@ struct msdc_host { struct pinctrl *pinctrl; struct pinctrl_state *pins_default; struct pinctrl_state *pins_uhs; + struct pinctrl_state *pins_eint; + struct pinctrl_state *pins_dat1; struct delayed_work req_timeout; int irq; /* host interrupt */ + int eint_irq; /* device interrupt */ + int sdio_irq_cnt; /* irq enable cnt */ struct reset_control *reset; struct clk *src_clk; /* msdc source clock */ @@ -465,6 +470,7 @@ struct msdc_host { bool hs400_tuning; /* hs400 mode online tuning */ bool internal_cd; /* Use internal card-detect logic */ bool cqhci; /* support eMMC hw cmdq */ + bool sdio_eint_ready; /* Ready to support SDIO eint interrupt */ struct msdc_save_para save_para; /* used when gate HCLK */ struct msdc_tune_para def_tune_para; /* default tune setting */ struct msdc_tune_para saved_tune_para; /* tune result of CMD21/CMD19 */ @@ -1527,10 +1533,12 @@ static void msdc_enable_sdio_irq(struct mmc_host *mmc, int enb) __msdc_enable_sdio_irq(host, enb); spin_unlock_irqrestore(&host->lock, flags); - if (enb) - pm_runtime_get_noresume(host->dev); - else - pm_runtime_put_noidle(host->dev); + if (mmc->card && !mmc->card->cccr.enable_async_irq) { + if (enb) + pm_runtime_get_noresume(host->dev); + else + pm_runtime_put_noidle(host->dev); + } } static irqreturn_t msdc_cmdq_irq(struct msdc_host *host, u32 intsts) @@ -2461,6 +2469,48 @@ static const struct mmc_host_ops mt_msdc_ops = { .hw_reset = msdc_hw_reset, }; +static irqreturn_t msdc_sdio_eint_irq(int irq, void *dev_id) +{ + struct msdc_host *host = dev_id; + struct mmc_host *mmc = mmc_from_priv(host); + + spin_lock(&host->lock); + if (likely(host->sdio_irq_cnt > 0)) { + disable_irq_nosync(host->eint_irq); + disable_irq_wake(host->eint_irq); + host->sdio_irq_cnt--; + } + spin_unlock(&host->lock); + + sdio_signal_irq(mmc); + + return IRQ_HANDLED; +} + +static int msdc_request_dat1_eint_irq(struct msdc_host *host) +{ + struct gpio_desc *desc; + int irq, ret; + + desc = devm_gpiod_get(host->dev, "eint", GPIOD_IN); + if (IS_ERR(desc)) + return PTR_ERR(desc); + + irq = gpiod_to_irq(desc); + if (irq < 0) + return irq; + + ret = devm_request_threaded_irq(host->dev, irq, NULL, msdc_sdio_eint_irq, + IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_NO_AUTOEN, + "sdio-eint", host); + if (ret) + return ret; + + host->eint_irq = irq; + + return 0; +} + static const struct cqhci_host_ops msdc_cmdq_ops = { .enable = msdc_cqe_enable, .disable = msdc_cqe_disable, @@ -2631,6 +2681,23 @@ static int msdc_drv_probe(struct platform_device *pdev) goto host_free; } + if (!(mmc->caps2 & MMC_CAP2_NO_SDIO) && (mmc->caps2 & MMC_CAP2_SDIO_ASYNC_IRQ)) { + /* Support for SDIO eint irq */ + host->pins_eint = pinctrl_lookup_state(host->pinctrl, "state_eint"); + if (IS_ERR(host->pins_eint)) { + dev_dbg(&pdev->dev, "Cannot find pinctrl eint!\n"); + } else { + host->pins_dat1 = pinctrl_lookup_state(host->pinctrl, "state_dat1"); + if (IS_ERR(host->pins_dat1)) { + ret = dev_err_probe(&pdev->dev, PTR_ERR(host->pins_dat1), + "Cannot find pinctrl dat1!\n"); + goto host_free; + } + + host->sdio_eint_ready = true; + } + } + msdc_of_property_parse(pdev, host); host->dev = &pdev->dev; @@ -2722,6 +2789,16 @@ static int msdc_drv_probe(struct platform_device *pdev) if (ret) goto release; + if (host->sdio_eint_ready) { + ret = msdc_request_dat1_eint_irq(host); + if (ret) { + dev_err(host->dev, "Failed to register data1 eint irq!\n"); + goto release; + } + + pinctrl_select_state(host->pinctrl, host->pins_dat1); + } + pm_runtime_set_active(host->dev); pm_runtime_set_autosuspend_delay(host->dev, MTK_MMC_AUTOSUSPEND_DELAY); pm_runtime_use_autosuspend(host->dev); @@ -2843,8 +2920,22 @@ static int __maybe_unused msdc_runtime_suspend(struct device *dev) { struct mmc_host *mmc = dev_get_drvdata(dev); struct msdc_host *host = mmc_priv(mmc); + unsigned long flags; msdc_save_reg(host); + + if (host->sdio_eint_ready) { + disable_irq(host->irq); + pinctrl_select_state(host->pinctrl, host->pins_eint); + spin_lock_irqsave(&host->lock, flags); + if (host->sdio_irq_cnt == 0) { + enable_irq(host->eint_irq); + enable_irq_wake(host->eint_irq); + host->sdio_irq_cnt++; + } + sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); + spin_unlock_irqrestore(&host->lock, flags); + } msdc_gate_clock(host); return 0; } @@ -2853,6 +2944,7 @@ static int __maybe_unused msdc_runtime_resume(struct device *dev) { struct mmc_host *mmc = dev_get_drvdata(dev); struct msdc_host *host = mmc_priv(mmc); + unsigned long flags; int ret; ret = msdc_ungate_clock(host); @@ -2860,10 +2952,25 @@ static int __maybe_unused msdc_runtime_resume(struct device *dev) return ret; msdc_restore_reg(host); + + if (host->sdio_eint_ready) { + spin_lock_irqsave(&host->lock, flags); + if (host->sdio_irq_cnt > 0) { + disable_irq_nosync(host->eint_irq); + disable_irq_wake(host->eint_irq); + host->sdio_irq_cnt--; + sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); + } else { + sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); + } + spin_unlock_irqrestore(&host->lock, flags); + pinctrl_select_state(host->pinctrl, host->pins_uhs); + enable_irq(host->irq); + } return 0; } -static int __maybe_unused msdc_suspend(struct device *dev) +static int __maybe_unused msdc_suspend_noirq(struct device *dev) { struct mmc_host *mmc = dev_get_drvdata(dev); int ret; @@ -2877,13 +2984,13 @@ static int __maybe_unused msdc_suspend(struct device *dev) return pm_runtime_force_suspend(dev); } -static int __maybe_unused msdc_resume(struct device *dev) +static int __maybe_unused msdc_resume_noirq(struct device *dev) { return pm_runtime_force_resume(dev); } static const struct dev_pm_ops msdc_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(msdc_suspend, msdc_resume) + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(msdc_suspend_noirq, msdc_resume_noirq) SET_RUNTIME_PM_OPS(msdc_runtime_suspend, msdc_runtime_resume, NULL) };