From patchwork Fri Jan 21 20:36:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Brost X-Patchwork-Id: 12720219 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C0A7C433F5 for ; Fri, 21 Jan 2022 20:42:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DD3E810E620; Fri, 21 Jan 2022 20:42:48 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 599F310E621; Fri, 21 Jan 2022 20:42:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642797767; x=1674333767; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ec+/QIGQtHv/dwSc1g5GDVEhgDa48Tj473Sf4dnEFjY=; b=ms7OCjKlsi5jj07TZqqa9xTInmTPx5jdsxnOY4xJGERCH4UZNAGgyDHi dA2POl7O/jdGRJ8jsMe77kOndLhcpqepDneyK1dKFGQe2H4JWfNon6eQn OZV3E8ZWJWaKJg2I4RWfyMk20CCFDDtgIMSd8Iwv4WMUDqy9tmO0//yXI MkB9irhTp4naAGI8xtngIbmQYsrlEqhuV06ezEInADwnTQVlndLAxzdGJ gz3/RRrbStc4imnNhcvjp/8ibIhyXg/5+QTl7ZF1rtNDUl9xzsyIC5VOZ PcxpZcWWT4UIxG/my1bjBhMaKJBi+A0msqKZplsLTsgOU1tgC1JWD9ym1 A==; X-IronPort-AV: E=McAfee;i="6200,9189,10234"; a="309065947" X-IronPort-AV: E=Sophos;i="5.88,306,1635231600"; d="scan'208";a="309065947" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2022 12:42:46 -0800 X-IronPort-AV: E=Sophos;i="5.88,306,1635231600"; d="scan'208";a="626855412" Received: from jons-linux-dev-box.fm.intel.com ([10.1.27.20]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2022 12:42:46 -0800 From: Matthew Brost To: , Subject: [PATCH 1/2] drm/i915: Add request cancel low level trace point Date: Fri, 21 Jan 2022 12:36:57 -0800 Message-Id: <20220121203658.28042-2-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121203658.28042-1-matthew.brost@intel.com> References: <20220121203658.28042-1-matthew.brost@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: daniele.ceraolospurio@intel.com, john.c.harrison@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add request cancel trace point guarded by CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINT. Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_context.h | 1 + drivers/gpu/drm/i915/i915_trace.h | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h index d8c74bbf9aae2..3aed4d77f116c 100644 --- a/drivers/gpu/drm/i915/gt/intel_context.h +++ b/drivers/gpu/drm/i915/gt/intel_context.h @@ -124,6 +124,7 @@ intel_context_is_pinned(struct intel_context *ce) static inline void intel_context_cancel_request(struct intel_context *ce, struct i915_request *rq) { + trace_i915_request_cancel(rq); GEM_BUG_ON(!ce->ops->cancel_request); return ce->ops->cancel_request(ce, rq); } diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index 37b5c9e9d260e..d0a11a8bb0ca3 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -324,6 +324,11 @@ DEFINE_EVENT(i915_request, i915_request_add, ); #if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) +DEFINE_EVENT(i915_request, i915_request_cancel, + TP_PROTO(struct i915_request *rq), + TP_ARGS(rq) +); + DEFINE_EVENT(i915_request, i915_request_guc_submit, TP_PROTO(struct i915_request *rq), TP_ARGS(rq) @@ -497,6 +502,11 @@ DEFINE_EVENT(intel_context, intel_context_do_unpin, #else #if !defined(TRACE_HEADER_MULTI_READ) +static inline void +trace_i915_request_cancel(struct i915_request *rq) +{ +} + static inline void trace_i915_request_guc_submit(struct i915_request *rq) { From patchwork Fri Jan 21 20:36:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Brost X-Patchwork-Id: 12720220 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 38627C433EF for ; Fri, 21 Jan 2022 20:43:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 36FFD10E63A; Fri, 21 Jan 2022 20:42:52 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8C74E10E620; Fri, 21 Jan 2022 20:42:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642797767; x=1674333767; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4l3+xzWnWjHMsV4mFbb2LyRRljNcK/W59e3P77+StVE=; b=RcvkwK0WTfc0tYSgsVjvfGTZ3nQYvJR9ABaZNhwoYbL9oiq4atAxfeVK 1BK0dneiglhIah8sp/fREAr8KR39Tftr3liOg6NchOYpSlDfN68GAJudj 5sjWTB3gxG7P2CXziDTipE6v+2TNzFDtjCIjuwYmx4I6cAMltsU672x1b 6Vr3/UbBQy3lZXxKnjOT4+zsoHxXC+w3iX3nXm6W6wiPYMhnWoLOhOB5D MDg3KSZhHLI47gpTunerox1G9iG2Qfv+JQmTDIJBjRXpcKGZQdX+7L2ZZ lVF5s1NrmA1DJWPpVTXZ++ot8MZqHmZM6LWzwLqEHQysHcxbiHLp3Qm6k A==; X-IronPort-AV: E=McAfee;i="6200,9189,10234"; a="309065948" X-IronPort-AV: E=Sophos;i="5.88,306,1635231600"; d="scan'208";a="309065948" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2022 12:42:46 -0800 X-IronPort-AV: E=Sophos;i="5.88,306,1635231600"; d="scan'208";a="626855416" Received: from jons-linux-dev-box.fm.intel.com ([10.1.27.20]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jan 2022 12:42:46 -0800 From: Matthew Brost To: , Subject: [PATCH 2/2] drm/i915/guc: Cancel requests immediately Date: Fri, 21 Jan 2022 12:36:58 -0800 Message-Id: <20220121203658.28042-3-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121203658.28042-1-matthew.brost@intel.com> References: <20220121203658.28042-1-matthew.brost@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: daniele.ceraolospurio@intel.com, john.c.harrison@intel.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Change the preemption timeout to the smallest possible value (1 us) when disabling scheduling to cancel a request and restore it after cancelation. This not only cancels the request as fast as possible, it fixes a bug where the preemption timeout is 0 which results in the schedule disable hanging forever. Reported-by: Jani Saarinen Fixes: 62eaf0ae217d4 ("drm/i915/guc: Support request cancellation") Link: https://gitlab.freedesktop.org/drm/intel/-/issues/4960 Signed-off-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_context_types.h | 5 ++ .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 46 +++++++++++-------- 2 files changed, 31 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h index 30cd81ad8911a..730998823dbea 100644 --- a/drivers/gpu/drm/i915/gt/intel_context_types.h +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h @@ -198,6 +198,11 @@ struct intel_context { * each priority bucket */ u32 prio_count[GUC_CLIENT_PRIORITY_NUM]; + /** + * @preemption_timeout: preemption timeout of the context, used + * to restore this value after request cancellation + */ + u32 preemption_timeout; } guc_state; struct { diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index 3918f1be114fa..966947c450253 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -2147,7 +2147,8 @@ static inline u32 get_children_join_value(struct intel_context *ce, return __get_parent_scratch(ce)->join[child_index].semaphore; } -static void guc_context_policy_init(struct intel_engine_cs *engine, +static void guc_context_policy_init(struct intel_context *ce, + struct intel_engine_cs *engine, struct guc_lrc_desc *desc) { desc->policy_flags = 0; @@ -2157,7 +2158,8 @@ static void guc_context_policy_init(struct intel_engine_cs *engine, /* NB: For both of these, zero means disabled. */ desc->execution_quantum = engine->props.timeslice_duration_ms * 1000; - desc->preemption_timeout = engine->props.preempt_timeout_ms * 1000; + ce->guc_state.preemption_timeout = engine->props.preempt_timeout_ms * 1000; + desc->preemption_timeout = ce->guc_state.preemption_timeout; } static int guc_lrc_desc_pin(struct intel_context *ce, bool loop) @@ -2193,7 +2195,7 @@ static int guc_lrc_desc_pin(struct intel_context *ce, bool loop) desc->hw_context_desc = ce->lrc.lrca; desc->priority = ce->guc_state.prio; desc->context_flags = CONTEXT_REGISTRATION_FLAG_KMD; - guc_context_policy_init(engine, desc); + guc_context_policy_init(ce, engine, desc); /* * If context is a parent, we need to register a process descriptor @@ -2226,7 +2228,7 @@ static int guc_lrc_desc_pin(struct intel_context *ce, bool loop) desc->hw_context_desc = child->lrc.lrca; desc->priority = ce->guc_state.prio; desc->context_flags = CONTEXT_REGISTRATION_FLAG_KMD; - guc_context_policy_init(engine, desc); + guc_context_policy_init(child, engine, desc); } clear_children_join_go_memory(ce); @@ -2409,6 +2411,19 @@ static u16 prep_context_pending_disable(struct intel_context *ce) return ce->guc_id.id; } +static void __guc_context_set_preemption_timeout(struct intel_guc *guc, + u16 guc_id, + u32 preemption_timeout) +{ + u32 action[] = { + INTEL_GUC_ACTION_SET_CONTEXT_PREEMPTION_TIMEOUT, + guc_id, + preemption_timeout + }; + + intel_guc_send_busy_loop(guc, action, ARRAY_SIZE(action), 0, true); +} + static struct i915_sw_fence *guc_context_block(struct intel_context *ce) { struct intel_guc *guc = ce_to_guc(ce); @@ -2442,8 +2457,10 @@ static struct i915_sw_fence *guc_context_block(struct intel_context *ce) spin_unlock_irqrestore(&ce->guc_state.lock, flags); - with_intel_runtime_pm(runtime_pm, wakeref) + with_intel_runtime_pm(runtime_pm, wakeref) { + __guc_context_set_preemption_timeout(guc, guc_id, 1); __guc_context_sched_disable(guc, ce, guc_id); + } return &ce->guc_state.blocked; } @@ -2492,8 +2509,10 @@ static void guc_context_unblock(struct intel_context *ce) spin_unlock_irqrestore(&ce->guc_state.lock, flags); - if (enable) { - with_intel_runtime_pm(runtime_pm, wakeref) + with_intel_runtime_pm(runtime_pm, wakeref) { + __guc_context_set_preemption_timeout(guc, ce->guc_id.id, + ce->guc_state.preemption_timeout); + if (enable) __guc_context_sched_enable(guc, ce); } } @@ -2521,19 +2540,6 @@ static void guc_context_cancel_request(struct intel_context *ce, } } -static void __guc_context_set_preemption_timeout(struct intel_guc *guc, - u16 guc_id, - u32 preemption_timeout) -{ - u32 action[] = { - INTEL_GUC_ACTION_SET_CONTEXT_PREEMPTION_TIMEOUT, - guc_id, - preemption_timeout - }; - - intel_guc_send_busy_loop(guc, action, ARRAY_SIZE(action), 0, true); -} - static void guc_context_ban(struct intel_context *ce, struct i915_request *rq) { struct intel_guc *guc = ce_to_guc(ce);