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[98.233.193.225]) by smtp.gmail.com with ESMTPSA id t1sm2142883qtc.48.2022.01.27.16.38.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jan 2022 16:38:15 -0800 (PST) From: Peter Geis To: Rob Herring , Heiko Stuebner , Peter Geis Cc: Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/4] arm64: dts: rockchip: fix Quartz64-A ddr regulator voltage Date: Thu, 27 Jan 2022 19:38:05 -0500 Message-Id: <20220128003809.3291407-2-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220128003809.3291407-1-pgwipeout@gmail.com> References: <20220128003809.3291407-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220127_163817_815461_4150192D X-CRM114-Status: GOOD ( 10.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Quartz64 Model A uses a voltage divider to ensure ddr voltage is within specification from the default regulator configuration. Adjusting this voltage is detrimental, and currently causes the ddr voltage to be about 0.8v. Remove the min and max voltage setpoints for the ddr regulator. Fixes: b33a22a1e7c4 ("arm64: dts: rockchip: add basic dts for Pine64 Quartz64-A") Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index 166399b7f13f..d9eb92d59099 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -285,8 +285,6 @@ regulator-state-mem { vcc_ddr: DCDC_REG3 { regulator-always-on; regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; regulator-initial-mode = <0x2>; regulator-name = "vcc_ddr"; regulator-state-mem { From patchwork Fri Jan 28 00:38:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12727758 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8D38FC433EF for ; Fri, 28 Jan 2022 01:03:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=g1c3cy4trTypbqodAh09HZyq1iKYh0JkhHe5zj5RanI=; b=w/r081K26Mah3t qp/+L4bpTDORnlCH9ZyDC6UYLaT/ITo3nCgQUjCwy5Qdtjjrpw+iXT2Qqf7JiaIBm3OMCL4p/hjXD chi6SpHwRxhAkB16BeLoPSI/Xri/dw/cVrrWjsqwMJNVp+1HlPKOxulYBxaKFVU8Po7oYHZP251k9 bM2/RTwRuARwwxt3SaGXPetaqdko1rd/33q3ke6dMS48HDnoTshUvBNzvRwMKlbFe/dEfK65kDOsz c+Cy0unRoaOc0NbYuCpP5YSFgYK5V3Tv3jQ8+8KDZtdQFRoU5Zc8KZiL5aGkctPJyOz2UIpUwXVwn pUxzr/PqQyOO3yyusM1A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDFdt-00HaEq-EO; Fri, 28 Jan 2022 01:01:36 +0000 Received: from mail-qv1-xf2e.google.com ([2607:f8b0:4864:20::f2e]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDFHO-00HVZD-Gg; Fri, 28 Jan 2022 00:38:19 +0000 Received: by mail-qv1-xf2e.google.com with SMTP id i19so4380327qvx.12; Thu, 27 Jan 2022 16:38:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pLFwv7MjOQ+N54vrBm9216io6/o12k65yBVIhwcPg5Y=; b=LxbFlMhLkImQU7BenMFSJxGZJe7qA50NBhuhQySXdCmKQOPYYjk6mWtu6ikBn35pca 3+mCL1QKPT2X0fBzscixX63/zFpbqu4oIK8Z/y6xelxW61p94+DgEU/WP9KX3k1TaHIe somjPHKZ+svAFdzQvVqmxibq414ThT1PZq66WMG6XfkpmFhE7bzMS+KAcLJj2eqhPLiu DlVUcm6n07Hwymu9QlH9YHlchrZ2W7mwjJwK1klkWGvXtqFEWRqMh0/rIZDj/65aRQUz fZxMxzxG6ziSLO4idnclWdYFXqsZQBllQWdfAQFOLN92XE5cZJrNjK0Gmf5E9qlUwf7C dpZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pLFwv7MjOQ+N54vrBm9216io6/o12k65yBVIhwcPg5Y=; b=RqyhH4VSBHqMT83/gIoUk6HLpGEWopmt4hfZmHwIb5LVJIfCsOaY31vRiunKjun3pb 0nB3GXAOZpc+lxeeb1HiUnY68TByoa0fGNRZARkewY79DjMY73ILk+1bpIBMi/ymBrAf XL27TYzuaoJ+K9e8Wc6KOl28FbyydmW9rdjV++UUubGSdXpyqZtEL+K0eHrsX+4p1DYh RN3/8eyw102/WWqSEp6tea5O5tsNqMhFv+rDHj+wEknpbNXN2o2Rnsir4bkE4/lmi6tU GJfiwi5QSgk+x+WuyB4PMSznDWXAiPyrEB3TxJFlWOH10f5o3t4kgNZi9ikikYB3VMRf DwYQ== X-Gm-Message-State: AOAM531sdPByNUHOA2sj2Bj8X+GcMkF6NQZ0CmDkba3clVFFBj52KND8 aUDwCICwdy29EibgJSvJp08= X-Google-Smtp-Source: ABdhPJwrhsjuD03NSeUskaZoQXKK7d36ovsnIB0/+BjyXAkBfGW8Owu0kBbjWXKy0HrxScJjC41hRw== X-Received: by 2002:a05:6214:238a:: with SMTP id fw10mr5286173qvb.15.1643330296577; Thu, 27 Jan 2022 16:38:16 -0800 (PST) Received: from master-x64.sparksnet (c-98-233-193-225.hsd1.dc.comcast.net. [98.233.193.225]) by smtp.gmail.com with ESMTPSA id t1sm2142883qtc.48.2022.01.27.16.38.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jan 2022 16:38:16 -0800 (PST) From: Peter Geis To: Rob Herring , Heiko Stuebner Cc: Peter Geis , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/4] arm64: dts: rockchip: add Quartz64-A pmu_io_domains Date: Thu, 27 Jan 2022 19:38:06 -0500 Message-Id: <20220128003809.3291407-3-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220128003809.3291407-1-pgwipeout@gmail.com> References: <20220128003809.3291407-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220127_163818_610386_C1F7B94F X-CRM114-Status: GOOD ( 10.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Several io power domains on the Quartz64-A operate at 1.8v. Add the pmu_io_domains definition to enable support for this. This permits the enablement of the following features: sdio - wifi support sdhci - mmc-hs200-1_8v Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index d9eb92d59099..33c2c18caaa9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -482,6 +482,19 @@ vcc_sd_h: vcc-sd-h { }; }; +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc1v8_dvp>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + &sdhci { bus-width = <8>; mmc-hs200-1_8v; From patchwork Fri Jan 28 00:38:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12727768 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9CC0EC433F5 for ; Fri, 28 Jan 2022 01:07:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=k6qHSY5TT3jD7DLJQ8cVAeNVZ6mMOWgzYWoShCQLPTU=; b=C+e/WwTV1/0WBH copIiq3ELlzCl8xI02a/PgIm0SSHM/DdsXZISvZRFF7SBvsnv3CcI58BCbLHdzKWEEcq9VHwSUDYT jXi+xsVs1O1o6jDadCxGCMLp4y9Ea88KsB7Ie+W32Rfbq0R9TzD3y7UqpFD5VRqpYkoPTDfa2bYTs uTrMsPk/pcmSl4dBklUvRfHer1p+L4Ycyl5NqRJJcAir2lOcxeA8QkZOzw0f4TNbG/TZAMMm7rXSy 5MEVy6rM/opG2R/+QM5qfoKJwq+UZ2bcJwW8heyo4GwlfXnYki4FayHPekPl2L2sviLnoEFxofvpn wW3QfEMFeTmom08DojuA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDFhs-00Hb7U-9a; Fri, 28 Jan 2022 01:05:42 +0000 Received: from mail-qt1-x82d.google.com ([2607:f8b0:4864:20::82d]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDFHO-00HVZU-HW; Fri, 28 Jan 2022 00:38:20 +0000 Received: by mail-qt1-x82d.google.com with SMTP id e16so3958110qtq.6; Thu, 27 Jan 2022 16:38:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=U0ZtMbfGNf5bI/1AePHt7T+pCQPNUqP752Ba3r+02dM=; b=ky3S5f7lhADSWWb9ST7r5M95iARgFNUMQiSs99hEtWaw9Cp2LuMvM2peP/BugzC8Qt hL9HrtWe8moyMoNhZNvQiBjznS0tyEp0+rY8HYfYN3VoUS9cBnnKNVKYMZvPiwqJ3hic rb+I9nYH8h0r66PhJaB8YPjBF9DzPXWTqulCSkokuNa48FoUim3pIGSCvAdRruR0m7or ZEFoVTctqzAl3Jqh0xysji9bV1mN4IQwTUN8w0vgoz9hC+t+leeHidi4OkC03NIkFhF6 WMPV9PjfvLSKgDZRSQ/1m6rui25WgB5iCND4dEom4YN5aYnGka/J8MzSpBSV/2uSjfvw hwSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=U0ZtMbfGNf5bI/1AePHt7T+pCQPNUqP752Ba3r+02dM=; b=vr3MVtPtMAt25vBUawyaUkTTGrU9vdhmn5328UFgm72NEcPUjCRvrH9XNpGHFruiDG ed4+5PIy4/Z8cvtcJNckAVPm6MDSZmB4G52MeyUVsPX+ZKtbp26iww7XEnzavVdTXx89 geDWOMCI5+rfWM5tkKgjn4Ulc0WTvaz5GfcTkCDJBcwLSyxaXPo6EomxwkWUqu6mrUEy KDivWUPSMIPZIo1XlkI156bVicc7G+qWXKtRC0FGsGZwWXwnLORGx5XboUsgDuNsk09k 3xZZS6c1NPzvkJsBO54cPAsp3ryJweEZeeebdXDlgDLH4c+GGWETyxlqYjuLfMapiYnG FQJw== X-Gm-Message-State: AOAM531UeUkJxoLcpPQt4ph+Qhxvh4v1ulq6Q36kON1EcRWitA5RFKcA O1jykL9HJGWorc5hYvC1n8k= X-Google-Smtp-Source: ABdhPJwRZPAqYv4oJNy1fNafX2Qj6lvpf2KHx++EeZKTn31dh+x8Mtfsyq8oYEbbM/XWJw5lq3VWrw== X-Received: by 2002:ac8:5e0d:: with SMTP id h13mr4763623qtx.97.1643330297428; Thu, 27 Jan 2022 16:38:17 -0800 (PST) Received: from master-x64.sparksnet (c-98-233-193-225.hsd1.dc.comcast.net. [98.233.193.225]) by smtp.gmail.com with ESMTPSA id t1sm2142883qtc.48.2022.01.27.16.38.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jan 2022 16:38:17 -0800 (PST) From: Peter Geis To: Rob Herring , Heiko Stuebner Cc: Peter Geis , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/4] arm64: dts: rockchip: add Quartz64-A sdmmc1 node Date: Thu, 27 Jan 2022 19:38:07 -0500 Message-Id: <20220128003809.3291407-4-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220128003809.3291407-1-pgwipeout@gmail.com> References: <20220128003809.3291407-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220127_163818_649755_436C03C5 X-CRM114-Status: GOOD ( 11.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The sdmmc1 node on Quartz64-A supports the optional wifi module from Pine64. Add the sdmmc1 node and requisite sdio_pwrseq to enable wifi support on the Quartz64-A. Signed-off-by: Peter Geis --- Changelog: v2: - drop status = "okay" from sdio_pwrseq - drop disable-wp from sdmmc1 - move reset-gpios to be alphabetical in sdio_pwrseq --- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index 33c2c18caaa9..c5a79046a9d0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -91,6 +91,17 @@ simple-audio-card,codec { }; }; + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk817 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + post-power-on-delay-ms = <100>; + power-off-delay-us = <5000000>; + reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>; + }; + vcc12v_dcin: vcc12v_dcin { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; @@ -147,6 +158,17 @@ vcc_sys: vcc_sys { regulator-max-microvolt = <4400000>; vin-supply = <&vbus>; }; + + /* sourced from vcc_sys, sdio module operates internally at 3.3v */ + vcc_wl: vcc_wl { + compatible = "regulator-fixed"; + regulator-name = "vcc_wl"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_sys>; + }; }; &cpu0 { @@ -475,6 +497,12 @@ pmic_int_l: pmic-int-l { }; }; + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + vcc_sd { vcc_sd_h: vcc-sd-h { rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; @@ -516,6 +544,21 @@ &sdmmc0 { status = "okay"; }; +&sdmmc1 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; + sd-uhs-sdr104; + vmmc-supply = <&vcc_wl>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + &spdif { status = "okay"; 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[98.233.193.225]) by smtp.gmail.com with ESMTPSA id t1sm2142883qtc.48.2022.01.27.16.38.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jan 2022 16:38:18 -0800 (PST) From: Peter Geis To: Rob Herring , Heiko Stuebner Cc: Peter Geis , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/4] arm64: dts: rockchip: add Quartz64-A con40 hardware Date: Thu, 27 Jan 2022 19:38:08 -0500 Message-Id: <20220128003809.3291407-5-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220128003809.3291407-1-pgwipeout@gmail.com> References: <20220128003809.3291407-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220127_163819_490550_C2540A3B X-CRM114-Status: GOOD ( 10.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Quartz64-A has a 40 pin connector that exposes various functions. Annotate the functions exposed in the device tree. Enable i2c3, which is pulled up to vcc_3v3 on board. The following functions are currently exposed: i2c3 spi1 uart2 uart0 spdif Signed-off-by: Peter Geis --- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index c5a79046a9d0..d3dc60ff60dd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -449,6 +449,14 @@ regulator-state-mem { }; }; +/* i2c3 is exposed on con40 + * pin 3 - i2c3_sda_m0, pullup to vcc_3v3 + * pin 5 - i2c3_scl_m0, pullup to vcc_3v3 + */ +&i2c3 { + status = "okay"; +}; + &i2s1_8ch { pinctrl-names = "default"; pinctrl-0 = <&i2s1m0_sclktx @@ -559,10 +567,17 @@ &sdmmc1 { status = "okay"; }; +/* spdif is exposed on con40 pin 18 */ &spdif { status = "okay"; }; +/* spi1 is exposed on con40 + * pin 11 - spi1_mosi_m1 + * pin 13 - spi1_miso_m1 + * pin 15 - spi1_clk_m1 + * pin 17 - spi1_cs0_m1 + */ &spi1 { pinctrl-names = "default"; pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>; @@ -576,6 +591,10 @@ &tsadc { status = "okay"; }; +/* uart0 is exposed on con40 + * pin 12 - uart0_tx + * pin 14 - uart0_rx + */ &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_xfer>; @@ -602,6 +621,10 @@ bluetooth { }; }; +/* uart2 is exposed on con40 + * pin 8 - uart2_tx_m0_debug + * pin 10 - uart2_rx_m0_debug + */ &uart2 { status = "okay"; };