From patchwork Fri Jan 28 19:14:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Catalin Marinas X-Patchwork-Id: 12728971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C3BB2C433EF for ; Fri, 28 Jan 2022 19:16:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Subject:Cc:To: From:Date:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=3QOCwRX6XkjDh/o/LqI9dDuP404wka4uZTUrNG7iGhg=; b=ZIaXZqPUNxc0QD RAA+LI/qgGXXrLUveVnw+h4hvrJZKeVB3P5iBo2W5rr0PwRV2bGARgMWn4Vn94TMhfvK8g1mNoKyt 1762jEvk8JLQE+LgL6wRVQhntEmyjuUlyC+vRRINgte5zkz1j+BymnhZu1w4oqozpp4HoNePE+Suw OTbPHF6QKI3597SQSFKKi9xc2xg7IDMYsiwtp7LX/bNpOEny8J58E6530FZI1/1XCx5vGIJv+vy4G EfTEYg0EAZYK5RVlKuH+onNXLzxGOufzdeUwM2LSWosHaoF8QQUD1TDw6VhiazSHkEzsZoDTlg+eE Yz+2HRdtPeL9u5ImogZg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDWhk-003OWz-MJ; Fri, 28 Jan 2022 19:14:40 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nDWhg-003OVQ-30 for linux-arm-kernel@lists.infradead.org; Fri, 28 Jan 2022 19:14:37 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id BBEA8B825E4; Fri, 28 Jan 2022 19:14:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 57EDDC340E7; Fri, 28 Jan 2022 19:14:32 +0000 (UTC) Date: Fri, 28 Jan 2022 19:14:29 +0000 From: Catalin Marinas To: Linus Torvalds Cc: Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org Subject: [GIT PULL] arm64 fixes for 5.17-rc2 Message-ID: MIME-Version: 1.0 Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220128_111436_312521_3757DFE6 X-CRM114-Status: GOOD ( 12.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Linus, Please pull the arm64 fixes below. Thanks. The following changes since commit e783362eb54cd99b2cac8b3a9aeac942e6f6ac07: Linux 5.17-rc1 (2022-01-23 10:12:53 +0200) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux tags/arm64-fixes for you to fetch changes up to 297ae1eb23b04c5a46111ab53c8d0f69af43f402: arm64: cpufeature: List early Cortex-A510 parts as having broken dbm (2022-01-28 16:15:46 +0000) ---------------------------------------------------------------- arm64 fixes: - Errata workarounds for Cortex-A510: broken hardware dirty bit management, detection code for the TRBE (tracing) bugs with the actual fixes going in via the CoreSight tree. - Cortex-X2 errata handling for TRBE (inheriting the workarounds from Cortex-A710). - Fix ex_handler_load_unaligned_zeropad() to use the correct struct members. - A couple of kselftest fixes for FPSIMD. - Silence the vdso "no previous prototype" warning. - Mark start_backtrace() notrace and NOKPROBE_SYMBOL. ---------------------------------------------------------------- Anshuman Khandual (6): arm64: Add Cortex-X2 CPU part definition arm64: errata: Update ARM64_ERRATUM_[2119858|2224489] with Cortex-X2 ranges arm64: Add Cortex-A510 CPU part definition arm64: errata: Add detection for TRBE ignored system register writes arm64: errata: Add detection for TRBE invalid prohibited states arm64: errata: Add detection for TRBE trace data corruption Catalin Marinas (1): Merge tag 'trbe-cortex-a510-errata' of gitolite.kernel.org:pub/scm/linux/kernel/git/coresight/linux into for-next/fixes Evgenii Stepanov (1): arm64: extable: fix load_unaligned_zeropad() reg indices James Morse (1): arm64: cpufeature: List early Cortex-A510 parts as having broken dbm Mark Brown (2): kselftest/arm64: Skip VL_INHERIT tests for unsupported vector types kselftest/arm64: Correct logging of FPSIMD register read via ptrace Masami Hiramatsu (1): arm64: Mark start_backtrace() notrace and NOKPROBE_SYMBOL Vincenzo Frascino (1): arm64: vdso: Fix "no previous prototype" warning Documentation/arm64/silicon-errata.rst | 12 ++++ arch/arm64/Kconfig | 81 +++++++++++++++++++++++++-- arch/arm64/include/asm/cputype.h | 4 ++ arch/arm64/kernel/cpu_errata.c | 29 ++++++++++ arch/arm64/kernel/cpufeature.c | 3 + arch/arm64/kernel/stacktrace.c | 5 +- arch/arm64/kernel/vdso/Makefile | 5 +- arch/arm64/mm/extable.c | 4 +- arch/arm64/tools/cpucaps | 3 + tools/testing/selftests/arm64/fp/sve-ptrace.c | 11 +++- 10 files changed, 144 insertions(+), 13 deletions(-)