From patchwork Thu Feb 10 02:05:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alison Schofield X-Patchwork-Id: 12741158 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D217229CA for ; Thu, 10 Feb 2022 02:01:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644458473; x=1675994473; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=29cuZLvmKBnAIeASl5MGw94rvlTi7I21Qwdugl5wVpw=; b=ActXxtii83hYlbj046p+a3azcxv7glD1NZjKzIEwg6F3+pdayjuHGktI E00URMnu8cI4elY2Kr88/9aUvpJ7btkY4XhKkJhYbDp/7xHlfIlWWMAJM 0hr2LBI/bYHgUmPd1C39dwNEZn1yJ/cMw8OxewbrWOn3r5teQj1AI1tPs 1if/GUIk3lfiteplhZsOMx86IAwSqpaoEB7Nru2BpOBSUKrjBo+X1Q4/t bCaLzQb7NTWJvQ8FFw+YTA2e4YEM8WIaJspN767swlaq7lIhCa88YIh2x FKPVHTEPGmHqa++gZs7BlKoL9wEYi5Jb1HO5tkDius3UUvJVbRqC4IJOc Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10253"; a="236792108" X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="236792108" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:13 -0800 X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="585799481" Received: from alison-desk.jf.intel.com (HELO localhost) ([10.54.74.41]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:12 -0800 From: alison.schofield@intel.com To: Ben Widawsky , Dan Williams , Ira Weiny , Vishal Verma Cc: Alison Schofield , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org Subject: [ndctl PATCH v5 1/6] libcxl: add GET_PARTITION_INFO mailbox command and accessors Date: Wed, 9 Feb 2022 18:05:09 -0800 Message-Id: <6cd7fffe1a95c9a1bc2239cb342067df564401a5.1644455619.git.alison.schofield@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alison Schofield The CXL PMEM provisioning model depends upon the values reported in the CXL GET_PARTITION_INFO mailbox command when changing the partitioning between volatile and persistent capacity. Add libcxl APIs to create a new GET_PARTITION_INFO mailbox command, the command output data structure (privately), and accessor APIs to return the fields in the partition info output. Per the CXL 2.0 specification, devices report partition capacities as multiples of 256MB. Define and use a capacity multiplier to convert the raw data into bytes for user consumption. Use byte format as the norm for all capacity values produced or consumed using CXL Mailbox commands. Signed-off-by: Alison Schofield Reviewed-by: Dan Williams --- Documentation/cxl/lib/libcxl.txt | 1 + cxl/lib/libcxl.c | 66 ++++++++++++++++++++++++++++++++ cxl/lib/libcxl.sym | 5 +++ cxl/lib/private.h | 10 +++++ cxl/libcxl.h | 5 +++ util/size.h | 1 + 6 files changed, 88 insertions(+) diff --git a/Documentation/cxl/lib/libcxl.txt b/Documentation/cxl/lib/libcxl.txt index 4392b47..a6986ab 100644 --- a/Documentation/cxl/lib/libcxl.txt +++ b/Documentation/cxl/lib/libcxl.txt @@ -131,6 +131,7 @@ int cxl_memdev_read_label(struct cxl_memdev *memdev, void *buf, size_t length, size_t offset); int cxl_memdev_write_label(struct cxl_memdev *memdev, void *buf, size_t length, size_t offset); +struct cxl_cmd *cxl_cmd_new_get_partition(struct cxl_memdev *memdev); ---- diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index e0b443f..4557a71 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -1985,6 +1985,11 @@ static int cxl_cmd_validate_status(struct cxl_cmd *cmd, u32 id) return 0; } +static uint64_t cxl_capacity_to_bytes(leint64_t size) +{ + return le64_to_cpu(size) * CXL_CAPACITY_MULTIPLIER; +} + /* Helpers for health_info fields (no endian conversion) */ #define cmd_get_field_u8(cmd, n, N, field) \ do { \ @@ -2371,6 +2376,67 @@ CXL_EXPORT ssize_t cxl_cmd_read_label_get_payload(struct cxl_cmd *cmd, return length; } +CXL_EXPORT struct cxl_cmd *cxl_cmd_new_get_partition(struct cxl_memdev *memdev) +{ + return cxl_cmd_new_generic(memdev, + CXL_MEM_COMMAND_ID_GET_PARTITION_INFO); +} + +static struct cxl_cmd_get_partition * +cmd_to_get_partition(struct cxl_cmd *cmd) +{ + if (cxl_cmd_validate_status(cmd, CXL_MEM_COMMAND_ID_GET_PARTITION_INFO)) + return NULL; + + if (!cmd) + return NULL; + return cmd->output_payload; +} + +CXL_EXPORT unsigned long long +cxl_cmd_partition_get_active_volatile_size(struct cxl_cmd *cmd) +{ + struct cxl_cmd_get_partition *c; + + c = cmd_to_get_partition(cmd); + if (!c) + return ULLONG_MAX; + return cxl_capacity_to_bytes(c->active_volatile); +} + +CXL_EXPORT unsigned long long +cxl_cmd_partition_get_active_persistent_size(struct cxl_cmd *cmd) +{ + struct cxl_cmd_get_partition *c; + + c = cmd_to_get_partition(cmd); + if (!c) + return ULLONG_MAX; + return cxl_capacity_to_bytes(c->active_persistent); +} + +CXL_EXPORT unsigned long long +cxl_cmd_partition_get_next_volatile_size(struct cxl_cmd *cmd) +{ + struct cxl_cmd_get_partition *c; + + c = cmd_to_get_partition(cmd); + if (!c) + return ULLONG_MAX; + return cxl_capacity_to_bytes(c->next_volatile); +} + +CXL_EXPORT unsigned long long +cxl_cmd_partition_get_next_persistent_size(struct cxl_cmd *cmd) +{ + struct cxl_cmd_get_partition *c; + + c = cmd_to_get_partition(cmd); + if (!c) + return ULLONG_MAX; + return cxl_capacity_to_bytes(c->next_persistent); +} + CXL_EXPORT int cxl_cmd_submit(struct cxl_cmd *cmd) { struct cxl_memdev *memdev = cmd->memdev; diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym index e56a2bf..509e62d 100644 --- a/cxl/lib/libcxl.sym +++ b/cxl/lib/libcxl.sym @@ -155,4 +155,9 @@ global: cxl_dport_get_port; cxl_port_get_dport_by_memdev; cxl_dport_maps_memdev; + cxl_cmd_new_get_partition; + cxl_cmd_partition_get_active_volatile_size; + cxl_cmd_partition_get_active_persistent_size; + cxl_cmd_partition_get_next_volatile_size; + cxl_cmd_partition_get_next_persistent_size; } LIBCXL_1; diff --git a/cxl/lib/private.h b/cxl/lib/private.h index f483c30..7f3a562 100644 --- a/cxl/lib/private.h +++ b/cxl/lib/private.h @@ -7,6 +7,7 @@ #include #include #include +#include #define CXL_EXPORT __attribute__ ((visibility("default"))) @@ -185,6 +186,15 @@ struct cxl_cmd_get_health_info { le32 pmem_errors; } __attribute__((packed)); +struct cxl_cmd_get_partition { + le64 active_volatile; + le64 active_persistent; + le64 next_volatile; + le64 next_persistent; +} __attribute__((packed)); + +#define CXL_CAPACITY_MULTIPLIER SZ_256M + /* CXL 2.0 8.2.9.5.3 Byte 0 Health Status */ #define CXL_CMD_HEALTH_INFO_STATUS_MAINTENANCE_NEEDED_MASK BIT(0) #define CXL_CMD_HEALTH_INFO_STATUS_PERFORMANCE_DEGRADED_MASK BIT(1) diff --git a/cxl/libcxl.h b/cxl/libcxl.h index 3b2293b..2c0a8d1 100644 --- a/cxl/libcxl.h +++ b/cxl/libcxl.h @@ -242,6 +242,11 @@ ssize_t cxl_cmd_read_label_get_payload(struct cxl_cmd *cmd, void *buf, unsigned int length); struct cxl_cmd *cxl_cmd_new_write_label(struct cxl_memdev *memdev, void *buf, unsigned int offset, unsigned int length); +struct cxl_cmd *cxl_cmd_new_get_partition(struct cxl_memdev *memdev); +unsigned long long cxl_cmd_partition_get_active_volatile_size(struct cxl_cmd *cmd); +unsigned long long cxl_cmd_partition_get_active_persistent_size(struct cxl_cmd *cmd); +unsigned long long cxl_cmd_partition_get_next_volatile_size(struct cxl_cmd *cmd); +unsigned long long cxl_cmd_partition_get_next_persistent_size(struct cxl_cmd *cmd); #ifdef __cplusplus } /* extern "C" */ diff --git a/util/size.h b/util/size.h index a0f3593..e72467f 100644 --- a/util/size.h +++ b/util/size.h @@ -15,6 +15,7 @@ #define SZ_4M 0x00400000 #define SZ_16M 0x01000000 #define SZ_64M 0x04000000 +#define SZ_256M 0x10000000 #define SZ_1G 0x40000000 #define SZ_1T 0x10000000000ULL From patchwork Thu Feb 10 02:05:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alison Schofield X-Patchwork-Id: 12741160 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B31382C80 for ; Thu, 10 Feb 2022 02:01:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644458474; x=1675994474; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=g6llTrHh/ojmCw4TL9zhIeN/sHiK2+9zbAVpKY+VN2c=; b=dA5zbvh2i4g5aj7XtzZ6odbaNUUWCk/lV4v4EqhDirBm1Te6gzT7ZiEs RB9ZzdshAF+n/PCQ1Gyo3/dA9BOgWLqzNqim5p8SzvZjMxXxgJUfYLGKb qHjzpa5CdHrHlf+gLjnN+PwkgNk7kmTiCsTeRDohqyAJLNQyVsUdF981F eYM66qX+fvjPzwLITCHyGWPA42WUZOsu+c9SgIuy5Ane8tRVyB4QZudjd EVJ1KwnPv1Kbw+WoGdqgN5h2cSnwVe5ueg2gHBubgRnA1+2R75BbVJFS+ e8iE+CqyhdlNTWJgd1BZmR8InNQbLr0Gv9HAtPouE943IFUXCBlI1a6T6 w==; X-IronPort-AV: E=McAfee;i="6200,9189,10253"; a="236792114" X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="236792114" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:13 -0800 X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="585799513" Received: from alison-desk.jf.intel.com (HELO localhost) ([10.54.74.41]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:13 -0800 From: alison.schofield@intel.com To: Ben Widawsky , Dan Williams , Ira Weiny , Vishal Verma Cc: Alison Schofield , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org Subject: [ndctl PATCH v5 2/6] libcxl: add accessors for capacity fields of the IDENTIFY command Date: Wed, 9 Feb 2022 18:05:10 -0800 Message-Id: <58dec40b15a68f134466f61421751994735e55c1.1644455619.git.alison.schofield@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alison Schofield The CXL PMEM provisioning model depends upon the values reported in the CXL IDENTIFY mailbox command when changing the partitioning between volatile and persistent capacity. Add accessors to the libcxl API to retrieve the total, volatile only, and persistent only capacities from the IDENTIFY command. The fields are specified in multiples of 256MB per the CXL 2.0 spec. Use the capacity multiplier to convert the raw data into bytes for user consumption. Signed-off-by: Alison Schofield Reviewed-by: Dan Williams --- cxl/lib/libcxl.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ cxl/lib/libcxl.sym | 3 +++ cxl/libcxl.h | 3 +++ 3 files changed, 50 insertions(+) diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index 4557a71..9413384 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -2277,6 +2277,17 @@ CXL_EXPORT struct cxl_cmd *cxl_cmd_new_identify(struct cxl_memdev *memdev) return cxl_cmd_new_generic(memdev, CXL_MEM_COMMAND_ID_IDENTIFY); } +static struct cxl_cmd_identify * +cmd_to_identify(struct cxl_cmd *cmd) +{ + if (cxl_cmd_validate_status(cmd, CXL_MEM_COMMAND_ID_IDENTIFY)) + return NULL; + + if (!cmd) + return NULL; + return cmd->output_payload; +} + CXL_EXPORT int cxl_cmd_identify_get_fw_rev(struct cxl_cmd *cmd, char *fw_rev, int fw_len) { @@ -2321,6 +2332,39 @@ CXL_EXPORT unsigned int cxl_cmd_identify_get_label_size(struct cxl_cmd *cmd) return le32_to_cpu(id->lsa_size); } +CXL_EXPORT unsigned long long +cxl_cmd_identify_get_total_size(struct cxl_cmd *cmd) +{ + struct cxl_cmd_identify *c; + + c = cmd_to_identify(cmd); + if (!c) + return ULLONG_MAX; + return cxl_capacity_to_bytes(c->total_capacity); +} + +CXL_EXPORT unsigned long long +cxl_cmd_identify_get_volatile_only_size(struct cxl_cmd *cmd) +{ + struct cxl_cmd_identify *c; + + c = cmd_to_identify(cmd); + if (!c) + return ULLONG_MAX; + return cxl_capacity_to_bytes(c->volatile_capacity); +} + +CXL_EXPORT unsigned long long +cxl_cmd_identify_get_persistent_only_size(struct cxl_cmd *cmd) +{ + struct cxl_cmd_identify *c; + + c = cmd_to_identify(cmd); + if (!c) + return ULLONG_MAX; + return cxl_capacity_to_bytes(c->persistent_capacity); +} + CXL_EXPORT struct cxl_cmd *cxl_cmd_new_raw(struct cxl_memdev *memdev, int opcode) { diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym index 509e62d..5ac6e9b 100644 --- a/cxl/lib/libcxl.sym +++ b/cxl/lib/libcxl.sym @@ -160,4 +160,7 @@ global: cxl_cmd_partition_get_active_persistent_size; cxl_cmd_partition_get_next_volatile_size; cxl_cmd_partition_get_next_persistent_size; + cxl_cmd_identify_get_total_size; + cxl_cmd_identify_get_volatile_only_size; + cxl_cmd_identify_get_persistent_only_size; } LIBCXL_1; diff --git a/cxl/libcxl.h b/cxl/libcxl.h index 2c0a8d1..6e18e84 100644 --- a/cxl/libcxl.h +++ b/cxl/libcxl.h @@ -201,6 +201,9 @@ int cxl_cmd_get_mbox_status(struct cxl_cmd *cmd); int cxl_cmd_get_out_size(struct cxl_cmd *cmd); struct cxl_cmd *cxl_cmd_new_identify(struct cxl_memdev *memdev); int cxl_cmd_identify_get_fw_rev(struct cxl_cmd *cmd, char *fw_rev, int fw_len); +unsigned long long cxl_cmd_identify_get_total_size(struct cxl_cmd *cmd); +unsigned long long cxl_cmd_identify_get_volatile_only_size(struct cxl_cmd *cmd); +unsigned long long cxl_cmd_identify_get_persistent_only_size(struct cxl_cmd *cmd); unsigned long long cxl_cmd_identify_get_partition_align(struct cxl_cmd *cmd); unsigned int cxl_cmd_identify_get_label_size(struct cxl_cmd *cmd); struct cxl_cmd *cxl_cmd_new_get_health_info(struct cxl_memdev *memdev); From patchwork Thu Feb 10 02:05:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alison Schofield X-Patchwork-Id: 12741159 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DBE62CA4 for ; Thu, 10 Feb 2022 02:01:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644458475; x=1675994475; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zdPVXTdbWAIRBULjnmsUnkEvtM/Beuh0buw5XHal5qQ=; b=hkSIhJjKN6DcR7uTB+LQkfT49xXuYGQeYKWmM7Cxqu8h/axNETx8/s8Q CGiYBICI16BRcULwwyD7cL2HdIXYEPFl6rb3HT1rqeQGyr9EFnp5SejSW 5WsP622Ml41je5sn/by90YjvyJR6RlT2fV8jWtKmTo07fAtBU2FO1Ubaf AERH/nkfgg9vhwmNQgy+sMMnkKspDKicpU0Gmptig+5aTFdrp4IWxW8gr vcuYGkDNSVQeOrQaurpi3CP4UFDpw1kL+gr8gWz/3TNvU52YKAaDhyAlf lVo5sG1YQXipKz+06ZvAGCcG0Z/WrfaiYXaLYF5DejCHqxh8/NgKOKJaq g==; X-IronPort-AV: E=McAfee;i="6200,9189,10253"; a="236792117" X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="236792117" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:14 -0800 X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="585799541" Received: from alison-desk.jf.intel.com (HELO localhost) ([10.54.74.41]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:13 -0800 From: alison.schofield@intel.com To: Ben Widawsky , Dan Williams , Ira Weiny , Vishal Verma Cc: Alison Schofield , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org Subject: [ndctl PATCH v5 3/6] libcxl: return the partition alignment field in bytes Date: Wed, 9 Feb 2022 18:05:11 -0800 Message-Id: <6b937b09b61ddf95e069fd7acfda0c5bbb845be8.1644455619.git.alison.schofield@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alison Schofield Per the CXL specification, the partition alignment field reports the alignment value in multiples of 256MB. In the libcxl API, values for all capacity fields are defined to return bytes. Update the partition alignment accessor to return bytes so that it is in sync with other capacity related fields. Use the helpers cmd_to_identify() and cxl_capacity_to_bytes() to accomplish. Since this is early in the development cycle, the expectation is that no third party consumers of this library have come to depend on the encoded capacity field. If that is not the case, the original format can be restored, and a new _bytes version introduced. Signed-off-by: Alison Schofield Reviewed-by: Dan Williams --- cxl/lib/libcxl.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index 9413384..c05c13c 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -2308,15 +2308,12 @@ CXL_EXPORT int cxl_cmd_identify_get_fw_rev(struct cxl_cmd *cmd, char *fw_rev, CXL_EXPORT unsigned long long cxl_cmd_identify_get_partition_align( struct cxl_cmd *cmd) { - struct cxl_cmd_identify *id = - (struct cxl_cmd_identify *)cmd->send_cmd->out.payload; + struct cxl_cmd_identify *c; - if (cmd->send_cmd->id != CXL_MEM_COMMAND_ID_IDENTIFY) - return -EINVAL; - if (cmd->status < 0) - return cmd->status; - - return le64_to_cpu(id->partition_align); + c = cmd_to_identify(cmd); + if (!c) + return ULLONG_MAX; + return cxl_capacity_to_bytes(c->partition_align); } CXL_EXPORT unsigned int cxl_cmd_identify_get_label_size(struct cxl_cmd *cmd) From patchwork Thu Feb 10 02:05:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alison Schofield X-Patchwork-Id: 12741161 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3F542CA7 for ; Thu, 10 Feb 2022 02:01:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644458475; x=1675994475; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QPJtWyUb5kmvwq9xhMKJY5pM2JeJVzHNbRvlC6Ur7fM=; b=lSIERpPLyOdJvSWnJMwN1+EXaH96ms4Qx5nXBehvv+JJiFer385rPHmp sa9JEPc9J4jMGG1R8wEOJ6SpZTQwHspWvbY/sXNazPBRZVPScZPT3d9Gm oiJQnzAxcZcId/zkE4IbocFlqckL7lK0z5jNlJY5Zfuw5gsLgi6vWGbUy +XXW9A9Xk3okGiCATgpVbPB1PeaL46Hs7/ErlH7MrUu/5VQBIGIEuIjpT HhgFOBXq5TuBQwgWSMI5v6kpsMH6ruQ/2Xfk2e9b3cG2T5CceuQMCjSdc Yb2DNgjO7dJMZWT9mMRNUpNKcq+H7RzaZJaFZB1GGTjtywfcatX9fRcli Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10253"; a="236792123" X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="236792123" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:14 -0800 X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="585799571" Received: from alison-desk.jf.intel.com (HELO localhost) ([10.54.74.41]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:14 -0800 From: alison.schofield@intel.com To: Ben Widawsky , Dan Williams , Ira Weiny , Vishal Verma Cc: Alison Schofield , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org Subject: [ndctl PATCH v5 4/6] cxl: add memdev partition information to cxl-list Date: Wed, 9 Feb 2022 18:05:12 -0800 Message-Id: <7581aba52da0e5c39ccdb8a78a0e5ae7c34fa47d.1644455619.git.alison.schofield@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alison Schofield The CXL PMEM provisioning model depends upon the values reported in both the CXL IDENTIFY and GET_PARTITION_INFO mailbox commands when changing the partitioning between volatile and persistent capacity. Add an option to the 'cxl list' command to display partition information. Include all of the fields from GET_PARTITION_INFO and the partitioning related fields from the IDENTIFY mailbox command. Example: "partition_info":{ "active_volatile_size":273535729664, "active_persistent_size":0, "next_volatile_size":0, "next_persistent_size":0, "total_size":273535729664, "volatile_only_size":0, "persistent_only_size":0, "partition_alignment_size":268435456 } Signed-off-by: Alison Schofield Reviewed-by: Dan Williams --- Documentation/cxl/cxl-list.txt | 23 +++++++ cxl/filter.c | 2 + cxl/filter.h | 1 + cxl/json.c | 113 +++++++++++++++++++++++++++++++++ cxl/list.c | 2 + util/json.h | 1 + 6 files changed, 142 insertions(+) diff --git a/Documentation/cxl/cxl-list.txt b/Documentation/cxl/cxl-list.txt index 90e6d9f..86fc4e7 100644 --- a/Documentation/cxl/cxl-list.txt +++ b/Documentation/cxl/cxl-list.txt @@ -196,6 +196,29 @@ OPTIONS } ] ---- +-I:: +--partition:: + Include partition information in the memdev listing. Example listing: +---- +# cxl list -m mem0 -I +[ + { + "memdev":"mem0", + "pmem_size":0, + "ram_size":273535729664, + "partition_info":{ + "active_volatile_size":273535729664, + "active_persistent_size":0, + "next_volatile_size":0, + "next_persistent_size":0, + "total_size":273535729664, + "volatile_only_size":0, + "persistent_only_size":0, + "partition_alignment_size":268435456 + } + } +] +---- -B:: --buses:: diff --git a/cxl/filter.c b/cxl/filter.c index 925bf3a..b339642 100644 --- a/cxl/filter.c +++ b/cxl/filter.c @@ -581,6 +581,8 @@ static unsigned long params_to_flags(struct cxl_filter_params *param) flags |= UTIL_JSON_HEALTH; if (param->targets) flags |= UTIL_JSON_TARGETS; + if (param->partition) + flags |= UTIL_JSON_PARTITION; return flags; } diff --git a/cxl/filter.h b/cxl/filter.h index 5deabb3..697b777 100644 --- a/cxl/filter.h +++ b/cxl/filter.h @@ -23,6 +23,7 @@ struct cxl_filter_params { bool idle; bool human; bool health; + bool partition; struct log_ctx ctx; }; diff --git a/cxl/json.c b/cxl/json.c index f3b536e..69671b3 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -185,6 +185,114 @@ err_jobj: return NULL; } +/* + * Present complete view of memdev partition by presenting fields from + * both GET_PARTITION_INFO and IDENTIFY mailbox commands. + */ +static struct json_object *util_cxl_memdev_partition_to_json(struct cxl_memdev *memdev, + unsigned long flags) +{ + struct json_object *jobj = NULL; + struct json_object *jpart; + unsigned long long cap; + struct cxl_cmd *cmd; + int rc; + + jpart = json_object_new_object(); + if (!jpart) + return NULL; + if (!memdev) + goto err_jobj; + + /* Retrieve partition info in GET_PARTITION_INFO mbox cmd */ + cmd = cxl_cmd_new_get_partition(memdev); + if (!cmd) + goto err_jobj; + + rc = cxl_cmd_submit(cmd); + if (rc < 0) + goto err_cmd; + rc = cxl_cmd_get_mbox_status(cmd); + if (rc != 0) + goto err_cmd; + + cap = cxl_cmd_partition_get_active_volatile_size(cmd); + if (cap != ULLONG_MAX) { + jobj = util_json_object_size(cap, flags); + if (jobj) + json_object_object_add(jpart, + "active_volatile_size", jobj); + } + cap = cxl_cmd_partition_get_active_persistent_size(cmd); + if (cap != ULLONG_MAX) { + jobj = util_json_object_size(cap, flags); + if (jobj) + json_object_object_add(jpart, + "active_persistent_size", jobj); + } + cap = cxl_cmd_partition_get_next_volatile_size(cmd); + if (cap != ULLONG_MAX) { + jobj = util_json_object_size(cap, flags); + if (jobj) + json_object_object_add(jpart, + "next_volatile_size", jobj); + } + cap = cxl_cmd_partition_get_next_persistent_size(cmd); + if (cap != ULLONG_MAX) { + jobj = util_json_object_size(cap, flags); + if (jobj) + json_object_object_add(jpart, + "next_persistent_size", jobj); + } + cxl_cmd_unref(cmd); + + /* Retrieve partition info in the IDENTIFY mbox cmd */ + cmd = cxl_cmd_new_identify(memdev); + if (!cmd) + goto err_jobj; + + rc = cxl_cmd_submit(cmd); + if (rc < 0) + goto err_cmd; + rc = cxl_cmd_get_mbox_status(cmd); + if (rc != 0) + goto err_cmd; + + cap = cxl_cmd_identify_get_total_size(cmd); + if (cap != ULLONG_MAX) { + jobj = util_json_object_size(cap, flags); + if (jobj) + json_object_object_add(jpart, "total_size", jobj); + } + cap = cxl_cmd_identify_get_volatile_only_size(cmd); + if (cap != ULLONG_MAX) { + jobj = util_json_object_size(cap, flags); + if (jobj) + json_object_object_add(jpart, + "volatile_only_size", jobj); + } + cap = cxl_cmd_identify_get_persistent_only_size(cmd); + if (cap != ULLONG_MAX) { + jobj = util_json_object_size(cap, flags); + if (jobj) + json_object_object_add(jpart, + "persistent_only_size", jobj); + } + cap = cxl_cmd_identify_get_partition_align(cmd); + jobj = util_json_object_size(cap, flags); + if (jobj) + json_object_object_add(jpart, "partition_alignment_size", jobj); + + cxl_cmd_unref(cmd); + return jpart; + +err_cmd: + cxl_cmd_unref(cmd); +err_jobj: + json_object_put(jpart); + return NULL; +} + struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, unsigned long flags) { @@ -239,6 +347,11 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, json_object_object_add(jdev, "state", jobj); } + if (flags & UTIL_JSON_PARTITION) { + jobj = util_cxl_memdev_partition_to_json(memdev, flags); + if (jobj) + json_object_object_add(jdev, "partition_info", jobj); + } return jdev; } diff --git a/cxl/list.c b/cxl/list.c index de96ff9..1e9d441 100644 --- a/cxl/list.c +++ b/cxl/list.c @@ -48,6 +48,8 @@ static const struct option options[] = { "use human friendly number formats "), OPT_BOOLEAN('H', "health", ¶m.health, "include memory device health information "), + OPT_BOOLEAN('I', "partition", ¶m.partition, + "include memory device partition information "), #ifdef ENABLE_DEBUG OPT_BOOLEAN(0, "debug", &debug, "debug list walk"), #endif diff --git a/util/json.h b/util/json.h index e026df1..73bb9f0 100644 --- a/util/json.h +++ b/util/json.h @@ -19,6 +19,7 @@ enum util_json_flags { UTIL_JSON_DAX_MAPPINGS = (1 << 9), UTIL_JSON_HEALTH = (1 << 10), UTIL_JSON_TARGETS = (1 << 11), + UTIL_JSON_PARTITION = (1 << 12), }; void util_display_json_array(FILE *f_out, struct json_object *jarray, From patchwork Thu Feb 10 02:05:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alison Schofield X-Patchwork-Id: 12741162 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6A102F28 for ; Thu, 10 Feb 2022 02:01:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644458476; x=1675994476; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OmUG16NjzS8dLRugEQI60eydFLLr0J4PwLjBw9SAeUg=; b=HAdaQ0Y+751TbG/H1pdcTNDvnyOhWvoRrW8/W6l8CLja0nYujx234Q6X tXdkHCDBfgqHT4p+MJ1I75A7g58H3HwvWLGFuex3eZlsZBH0LAyxLq+Vt PvhjhONmWGl1PQc7ycpZZzrAxiBtYZBBIVD0LIFG+jX8mIJW2HabfbUmd LS1Ngh4a4sYJvRKhK/6DFMuOJK2avx9fPDmGXQfCyNC9l/vnoEqkiJWbt SHFkJ6nvlrJwzw0ttlpmhQ22L5GqrY3+4zS47eoXEgJF21HMJZgKxwkjk 3pNKGq8u2locqPbdVuWYUGhJOQrO3HDb3YsPnI6OZm0wS9Zmq+aCd6+k2 g==; X-IronPort-AV: E=McAfee;i="6200,9189,10253"; a="236792132" X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="236792132" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:15 -0800 X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="585799610" Received: from alison-desk.jf.intel.com (HELO localhost) ([10.54.74.41]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:14 -0800 From: alison.schofield@intel.com To: Ben Widawsky , Dan Williams , Ira Weiny , Vishal Verma Cc: Alison Schofield , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org Subject: [ndctl PATCH v5 5/6] libcxl: add interfaces for SET_PARTITION_INFO mailbox command Date: Wed, 9 Feb 2022 18:05:13 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alison Schofield The CXL PMEM provisioning model depends upon the CXL mailbox command SET_PARTITION_INFO to change a device's partitioning between volatile and persistent capacity. Add interfaces to libcxl to allocate and send a SET_PARTITION_INFO mailbox command as defined in the CXL 2.0 specification. Signed-off-by: Alison Schofield Reviewed-by: Dan Williams --- Documentation/cxl/lib/libcxl.txt | 11 +++++++++++ cxl/lib/libcxl.c | 28 ++++++++++++++++++++++++++++ cxl/lib/libcxl.sym | 2 ++ cxl/lib/private.h | 8 ++++++++ cxl/libcxl.h | 10 ++++++++++ 5 files changed, 59 insertions(+) diff --git a/Documentation/cxl/lib/libcxl.txt b/Documentation/cxl/lib/libcxl.txt index a6986ab..7b223cb 100644 --- a/Documentation/cxl/lib/libcxl.txt +++ b/Documentation/cxl/lib/libcxl.txt @@ -132,6 +132,8 @@ int cxl_memdev_read_label(struct cxl_memdev *memdev, void *buf, size_t length, int cxl_memdev_write_label(struct cxl_memdev *memdev, void *buf, size_t length, size_t offset); struct cxl_cmd *cxl_cmd_new_get_partition(struct cxl_memdev *memdev); +struct cxl_cmd *cxl_cmd_new_set_partition(struct cxl_memdev *memdev, + unsigned long long volatile_size); ---- @@ -148,6 +150,8 @@ this sub-class of interfaces, there are: a CXL standard opcode. See the potential command ids in /usr/include/linux/cxl_mem.h. + * 'cxl_cmd__set_' interfaces that set specific fields in a cxl_cmd + * 'cxl_cmd_submit' which submits the command via ioctl() * 'cxl_cmd__get_' interfaces that get specific fields out of the @@ -167,6 +171,13 @@ cxl_memdev{read,write,zero}_label() are helpers for marshaling multiple label access commands over an arbitrary extent of the device's label area. +cxl_cmd_partition_set_mode() supports selecting NEXTBOOT or IMMEDIATE +mode. When CXL_SETPART_IMMEDIATE mode is set, it is the caller’s +responsibility to avoid immediate changes to partitioning when the +device is in use. When CXL_SETPART_NEXTBOOT mode is set, the change +in partitioning shall become the “next” configuration, to become +active on the next device reset. + BUSES ----- The CXL Memory space is CPU and Device coherent. The address ranges that diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index c05c13c..daa2bbc 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -2478,6 +2478,34 @@ cxl_cmd_partition_get_next_persistent_size(struct cxl_cmd *cmd) return cxl_capacity_to_bytes(c->next_persistent); } +CXL_EXPORT int cxl_cmd_partition_set_mode(struct cxl_cmd *cmd, + enum cxl_setpartition_mode mode) +{ + struct cxl_cmd_set_partition *setpart = cmd->input_payload; + + if (mode == CXL_SETPART_IMMEDIATE) + setpart->flags = CXL_CMD_SET_PARTITION_FLAG_IMMEDIATE; + else + setpart->flags = !CXL_CMD_SET_PARTITION_FLAG_IMMEDIATE; + + return 0; +} + +CXL_EXPORT struct cxl_cmd *cxl_cmd_new_set_partition(struct cxl_memdev *memdev, + unsigned long long volatile_size) +{ + struct cxl_cmd_set_partition *setpart; + struct cxl_cmd *cmd; + + cmd = cxl_cmd_new_generic(memdev, + CXL_MEM_COMMAND_ID_SET_PARTITION_INFO); + + setpart = cmd->input_payload; + setpart->volatile_size = cpu_to_le64(volatile_size) + / CXL_CAPACITY_MULTIPLIER; + return cmd; +} + CXL_EXPORT int cxl_cmd_submit(struct cxl_cmd *cmd) { struct cxl_memdev *memdev = cmd->memdev; diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym index 5ac6e9b..aab1112 100644 --- a/cxl/lib/libcxl.sym +++ b/cxl/lib/libcxl.sym @@ -163,4 +163,6 @@ global: cxl_cmd_identify_get_total_size; cxl_cmd_identify_get_volatile_only_size; cxl_cmd_identify_get_persistent_only_size; + cxl_cmd_new_set_partition; + cxl_cmd_partition_set_mode; } LIBCXL_1; diff --git a/cxl/lib/private.h b/cxl/lib/private.h index 7f3a562..c6d88f7 100644 --- a/cxl/lib/private.h +++ b/cxl/lib/private.h @@ -195,6 +195,14 @@ struct cxl_cmd_get_partition { #define CXL_CAPACITY_MULTIPLIER SZ_256M +struct cxl_cmd_set_partition { + le64 volatile_size; + u8 flags; +} __attribute__((packed)); + +/* CXL 2.0 8.2.9.5.2 Set Partition Info */ +#define CXL_CMD_SET_PARTITION_FLAG_IMMEDIATE BIT(0) + /* CXL 2.0 8.2.9.5.3 Byte 0 Health Status */ #define CXL_CMD_HEALTH_INFO_STATUS_MAINTENANCE_NEEDED_MASK BIT(0) #define CXL_CMD_HEALTH_INFO_STATUS_PERFORMANCE_DEGRADED_MASK BIT(1) diff --git a/cxl/libcxl.h b/cxl/libcxl.h index 6e18e84..0063d31 100644 --- a/cxl/libcxl.h +++ b/cxl/libcxl.h @@ -250,6 +250,16 @@ unsigned long long cxl_cmd_partition_get_active_volatile_size(struct cxl_cmd *cm unsigned long long cxl_cmd_partition_get_active_persistent_size(struct cxl_cmd *cmd); unsigned long long cxl_cmd_partition_get_next_volatile_size(struct cxl_cmd *cmd); unsigned long long cxl_cmd_partition_get_next_persistent_size(struct cxl_cmd *cmd); +struct cxl_cmd *cxl_cmd_new_set_partition(struct cxl_memdev *memdev, + unsigned long long volatile_size); + +enum cxl_setpartition_mode { + CXL_SETPART_NEXTBOOT, + CXL_SETPART_IMMEDIATE, +}; + +int cxl_cmd_partition_set_mode(struct cxl_cmd *cmd, + enum cxl_setpartition_mode mode); #ifdef __cplusplus } /* extern "C" */ From patchwork Thu Feb 10 02:05:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alison Schofield X-Patchwork-Id: 12741163 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA2342F39 for ; Thu, 10 Feb 2022 02:01:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644458476; x=1675994476; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+Corq0mPg3TvNq6iftgNFWpYI1dTs6z/sC+IyVrVskQ=; b=C1SDR1KhOxbogsglvjznF1MUbAep/aWqMtwMJClCHA+OoIAJWAgmOVHw 5IdZc1qKksaUmULrqyIf/S0hNrYNBkQEvnZozVbqU/aERX0Q17n4ZF5lv c0r/wkDyX3+swt4/kHyNpaQZDnh4ZO6d5ylmJzkarPCSoOdE5GyHTIWZx OwF8lj0G/M1+5C0rjRE1sA3GvKRfOIdytWFlV9AVSYAkzw8DGTUYaGzkI d8NfH86aOeQc54Ggund2zRlXgd2QK2MBBjlgV+0gUXtLZcIC4hwFur4AA UP7fcnoOTZb/gt5CdXobQI6C6s5/2bc2eqx1AqK40/N36NJ2bmLWRRVzE w==; X-IronPort-AV: E=McAfee;i="6200,9189,10253"; a="236792139" X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="236792139" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:15 -0800 X-IronPort-AV: E=Sophos;i="5.88,357,1635231600"; d="scan'208";a="585799636" Received: from alison-desk.jf.intel.com (HELO localhost) ([10.54.74.41]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 18:01:15 -0800 From: alison.schofield@intel.com To: Ben Widawsky , Dan Williams , Ira Weiny , Vishal Verma Cc: Alison Schofield , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org Subject: [ndctl PATCH v5 6/6] cxl: add command 'cxl set-partition' Date: Wed, 9 Feb 2022 18:05:14 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alison Schofield CXL devices may support both volatile and persistent memory capacity. The amount of device capacity set aside for each type is typically established at the factory, but some devices also allow for dynamic re-partitioning. Add a command for this purpose. usage: cxl set-partition [..] [] -v, --verbose turn on debug -S, --serial use serial numbers to id memdevs -t, --type 'pmem' or 'volatile' (Default: 'pmem') -s, --size size in bytes (Default: all available capacity) -a, --align auto-align --size per device's requirement Signed-off-by: Alison Schofield Reviewed-by: Dan Williams --- Documentation/cxl/cxl-set-partition.txt | 68 ++++++++ Documentation/cxl/meson.build | 1 + cxl/builtin.h | 1 + cxl/cxl.c | 1 + cxl/memdev.c | 206 ++++++++++++++++++++++++ 5 files changed, 277 insertions(+) create mode 100644 Documentation/cxl/cxl-set-partition.txt diff --git a/Documentation/cxl/cxl-set-partition.txt b/Documentation/cxl/cxl-set-partition.txt new file mode 100644 index 0000000..1e548af --- /dev/null +++ b/Documentation/cxl/cxl-set-partition.txt @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: GPL-2.0 + +cxl-set-partition(1) +==================== + +NAME +---- +cxl-set-partition - set the partitioning between volatile and persistent capacity on a CXL memdev + +SYNOPSIS +-------- +[verse] +'cxl set-partition [ [..] []' + +DESCRIPTION +----------- +CXL devices may support both volatile and persistent memory capacity. +The amount of device capacity set aside for each type is typically +established at the factory, but some devices also allow for dynamic +re-partitioning. + +Use this command to partition a device into volatile and persistent +capacity. The change in partitioning becomes the “next” configuration, +to become active on the next device reset. + +Use "cxl list -m -I" to examine the partitioning capabilities +of a device. A partition_alignment_size value of zero means there is +no available capacity and therefore the partitions cannot be changed. + +Using this command to change the size of the persistent capacity shall +result in the loss of data stored. + +OPTIONS +------- +:: +include::memdev-option.txt[] + +-t:: +--type=:: + Type of partition, 'pmem' or 'volatile', to modify. + Default: 'pmem' + +-s:: +--size=:: + Size of the partition in bytes. Size must align to the + devices alignment requirement. Use 'cxl list -m -I' + to find 'partition_alignment_size', or, use the --align option. + Default: All available capacity is assigned to . + +-a:: +--align:: + Select this option to allow the automatic alignment of --size + to meet device alignment requirements. When using this option, + specify the minimum --size of the --type partition needed. When + this option is omitted, the command fails if --size is not + properly aligned. Use 'cxl list -m -I' to examine the + partition_alignment_size. + +-v:: + Turn on verbose debug messages in the library (if libcxl was built with + logging and debug enabled). + +include::../copyright.txt[] + +SEE ALSO +-------- +linkcxl:cxl-list[1], +CXL-2.0 8.2.9.5.2 diff --git a/Documentation/cxl/meson.build b/Documentation/cxl/meson.build index 96f4666..e927644 100644 --- a/Documentation/cxl/meson.build +++ b/Documentation/cxl/meson.build @@ -34,6 +34,7 @@ cxl_manpages = [ 'cxl-disable-memdev.txt', 'cxl-enable-port.txt', 'cxl-disable-port.txt', + 'cxl-set-partition.txt', ] foreach man : cxl_manpages diff --git a/cxl/builtin.h b/cxl/builtin.h index 3123d5e..7bbad98 100644 --- a/cxl/builtin.h +++ b/cxl/builtin.h @@ -14,4 +14,5 @@ int cmd_disable_memdev(int argc, const char **argv, struct cxl_ctx *ctx); int cmd_enable_memdev(int argc, const char **argv, struct cxl_ctx *ctx); int cmd_disable_port(int argc, const char **argv, struct cxl_ctx *ctx); int cmd_enable_port(int argc, const char **argv, struct cxl_ctx *ctx); +int cmd_set_partition(int argc, const char **argv, struct cxl_ctx *ctx); #endif /* _CXL_BUILTIN_H_ */ diff --git a/cxl/cxl.c b/cxl/cxl.c index c20c569..ab4bbec 100644 --- a/cxl/cxl.c +++ b/cxl/cxl.c @@ -68,6 +68,7 @@ static struct cmd_struct commands[] = { { "enable-memdev", .c_fn = cmd_enable_memdev }, { "disable-port", .c_fn = cmd_disable_port }, { "enable-port", .c_fn = cmd_enable_port }, + { "set-partition", .c_fn = cmd_set_partition }, }; int main(int argc, const char **argv) diff --git a/cxl/memdev.c b/cxl/memdev.c index 90b33e1..91d914d 100644 --- a/cxl/memdev.c +++ b/cxl/memdev.c @@ -6,11 +6,14 @@ #include #include #include +#include +#include #include #include #include #include +#include "json.h" #include "filter.h" struct action_context { @@ -26,10 +29,18 @@ static struct parameters { bool verbose; bool serial; bool force; + bool align; + const char *type; + const char *size; } param; static struct log_ctx ml; +enum cxl_setpart_type { + CXL_SETPART_PMEM, + CXL_SETPART_VOLATILE, +}; + #define BASE_OPTIONS() \ OPT_BOOLEAN('v',"verbose", ¶m.verbose, "turn on debug"), \ OPT_BOOLEAN('S', "serial", ¶m.serial, "use serial numbers to id memdevs") @@ -51,6 +62,14 @@ OPT_UINTEGER('O', "offset", ¶m.offset, \ OPT_BOOLEAN('f', "force", ¶m.force, \ "DANGEROUS: override active memdev safety checks") +#define SET_PARTITION_OPTIONS() \ +OPT_STRING('t', "type", ¶m.type, "type", \ + "'pmem' or 'volatile' (Default: 'pmem')"), \ +OPT_STRING('s', "size", ¶m.size, "size", \ + "size in bytes (Default: all available capacity)"), \ +OPT_BOOLEAN('a', "align", ¶m.align, \ + "auto-align --size per device's requirement") + static const struct option read_options[] = { BASE_OPTIONS(), LABEL_OPTIONS(), @@ -82,6 +101,12 @@ static const struct option enable_options[] = { OPT_END(), }; +static const struct option set_partition_options[] = { + BASE_OPTIONS(), + SET_PARTITION_OPTIONS(), + OPT_END(), +}; + static int action_disable(struct cxl_memdev *memdev, struct action_context *actx) { if (!cxl_memdev_is_enabled(memdev)) @@ -209,6 +234,176 @@ out: return rc; } +static unsigned long long +partition_align(const char *devname, enum cxl_setpart_type type, + unsigned long long volatile_size, unsigned long long alignment, + unsigned long long available) +{ + if (IS_ALIGNED(volatile_size, alignment)) + return volatile_size; + + if (!param.align) { + log_err(&ml, "%s: size %lld is not partition aligned %lld\n", + devname, volatile_size, alignment); + return ULLONG_MAX; + } + + /* Align based on partition type to fulfill users size request */ + if (type == CXL_SETPART_PMEM) + volatile_size = ALIGN_DOWN(volatile_size, alignment); + else + volatile_size = ALIGN(volatile_size, alignment); + + /* Fail if the align pushes size over the available limit. */ + if (volatile_size > available) { + log_err(&ml, "%s: aligned partition size %lld exceeds available size %lld\n", + devname, volatile_size, available); + volatile_size = ULLONG_MAX; + } + + return volatile_size; +} + +static unsigned long long +param_size_to_volatile_size(const char *devname, enum cxl_setpart_type type, + unsigned long long size, unsigned long long available) +{ + /* User omits size option. Apply all available capacity to type. */ + if (size == ULLONG_MAX) { + if (type == CXL_SETPART_PMEM) + return 0; + return available; + } + + /* User includes a size option. Apply it to type */ + if (size > available) { + log_err(&ml, "%s: %lld exceeds available capacity %lld\n", + devname, size, available); + return ULLONG_MAX; + } + if (type == CXL_SETPART_PMEM) + return available - size; + return size; +} + +/* + * Return the volatile_size to use in the CXL set paritition + * command, or ULLONG_MAX if unable to validate the partition + * request. + */ +static unsigned long long +validate_partition(struct cxl_memdev *memdev, enum cxl_setpart_type type, + unsigned long long size) +{ + unsigned long long total_cap, volatile_only, persistent_only; + const char *devname = cxl_memdev_get_devname(memdev); + unsigned long long volatile_size = ULLONG_MAX; + unsigned long long available, alignment; + struct cxl_cmd *cmd; + int rc; + + cmd = cxl_cmd_new_identify(memdev); + if (!cmd) + return ULLONG_MAX; + rc = cxl_cmd_submit(cmd); + if (rc < 0) + goto out; + rc = cxl_cmd_get_mbox_status(cmd); + if (rc != 0) + goto out; + + alignment = cxl_cmd_identify_get_partition_align(cmd); + if (alignment == 0) { + log_err(&ml, "%s: no available capacity\n", devname); + goto out; + } + + /* Calculate the actual available capacity */ + total_cap = cxl_cmd_identify_get_total_size(cmd); + volatile_only = cxl_cmd_identify_get_volatile_only_size(cmd); + persistent_only = cxl_cmd_identify_get_persistent_only_size(cmd); + available = total_cap - volatile_only - persistent_only; + + /* Translate the users size request into an aligned volatile_size */ + volatile_size = param_size_to_volatile_size(devname, type, size, + available); + if (volatile_size == ULLONG_MAX) + goto out; + + volatile_size = partition_align(devname, type, volatile_size, alignment, + available); + +out: + cxl_cmd_unref(cmd); + return volatile_size; +} + +static int action_setpartition(struct cxl_memdev *memdev, + struct action_context *actx) +{ + const char *devname = cxl_memdev_get_devname(memdev); + enum cxl_setpart_type type = CXL_SETPART_PMEM; + unsigned long long size = ULLONG_MAX; + struct json_object *jmemdev; + struct cxl_cmd *cmd; + int rc; + + if (param.type) { + if (strcmp(param.type, "pmem") == 0) + /* default */; + else if (strcmp(param.type, "volatile") == 0) + type = CXL_SETPART_VOLATILE; + else { + log_err(&ml, "invalid type '%s'\n", param.type); + return -EINVAL; + } + } + + if (param.size) { + size = parse_size64(param.size); + if (size == ULLONG_MAX) { + log_err(&ml, "%s: failed to parse size option '%s'\n", + devname, param.size); + return -EINVAL; + } + } + + size = validate_partition(memdev, type, size); + if (size == ULLONG_MAX) + return -EINVAL; + + cmd = cxl_cmd_new_set_partition(memdev, size); + if (!cmd) { + rc = -ENXIO; + goto out_err; + } + + rc = cxl_cmd_submit(cmd); + if (rc < 0) { + log_err(&ml, "cmd submission failed: %s\n", strerror(-rc)); + goto out_cmd; + } + + rc = cxl_cmd_get_mbox_status(cmd); + if (rc != 0) { + log_err(&ml, "%s: mbox status: %d\n", __func__, rc); + rc = -ENXIO; + } + +out_cmd: + cxl_cmd_unref(cmd); +out_err: + if (rc) + log_err(&ml, "%s error: %s\n", devname, strerror(-rc)); + + jmemdev = util_cxl_memdev_to_json(memdev, UTIL_JSON_PARTITION); + if (jmemdev) + printf("%s\n", json_object_to_json_string_ext(jmemdev, + JSON_C_TO_STRING_PRETTY)); + + return rc; +} + static int memdev_action(int argc, const char **argv, struct cxl_ctx *ctx, int (*action)(struct cxl_memdev *memdev, struct action_context *actx), @@ -398,3 +593,14 @@ int cmd_enable_memdev(int argc, const char **argv, struct cxl_ctx *ctx) count > 1 ? "s" : ""); return count >= 0 ? 0 : EXIT_FAILURE; } + +int cmd_set_partition(int argc, const char **argv, struct cxl_ctx *ctx) +{ + int count = memdev_action(argc, argv, ctx, action_setpartition, + set_partition_options, + "cxl set-partition [..] []"); + log_info(&ml, "set_partition %d mem%s\n", count >= 0 ? count : 0, + count > 1 ? "s" : ""); + + return count >= 0 ? 0 : EXIT_FAILURE; +}