From patchwork Fri Feb 18 15:27:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 12751610 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6C9D9C433F5 for ; Fri, 18 Feb 2022 15:30:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Rename the struct member accordingly. This is a preparing patch for when USB glue is actually used. Signed-off-by: Alexander Stein Reviewed-by: Li Jun --- Changes in v5: * Added Reviewed-by: Li Jun drivers/usb/dwc3/dwc3-imx8mp.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-imx8mp.c b/drivers/usb/dwc3/dwc3-imx8mp.c index d328d20abfbc..1c8fe657b3a9 100644 --- a/drivers/usb/dwc3/dwc3-imx8mp.c +++ b/drivers/usb/dwc3/dwc3-imx8mp.c @@ -39,7 +39,7 @@ struct dwc3_imx8mp { struct device *dev; struct platform_device *dwc3; - void __iomem *glue_base; + void __iomem *hsio_blk_base; struct clk *hsio_clk; struct clk *suspend_clk; int irq; @@ -55,7 +55,7 @@ static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx) if (!dwc3) return; - val = readl(dwc3_imx->glue_base + USB_WAKEUP_CTRL); + val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL); if ((dwc3->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc3->xhci) val |= USB_WAKEUP_EN | USB_WAKEUP_SS_CONN | @@ -64,16 +64,16 @@ static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx) val |= USB_WAKEUP_EN | USB_WAKEUP_VBUS_EN | USB_WAKEUP_VBUS_SRC_SESS_VAL; - writel(val, dwc3_imx->glue_base + USB_WAKEUP_CTRL); + writel(val, dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL); } static void dwc3_imx8mp_wakeup_disable(struct dwc3_imx8mp *dwc3_imx) { u32 val; - val = readl(dwc3_imx->glue_base + USB_WAKEUP_CTRL); + val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL); val &= ~(USB_WAKEUP_EN | USB_WAKEUP_EN_MASK); - writel(val, dwc3_imx->glue_base + USB_WAKEUP_CTRL); + writel(val, dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL); } static irqreturn_t dwc3_imx8mp_interrupt(int irq, void *_dwc3_imx) @@ -115,9 +115,9 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev) dwc3_imx->dev = dev; - dwc3_imx->glue_base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(dwc3_imx->glue_base)) - return PTR_ERR(dwc3_imx->glue_base); + dwc3_imx->hsio_blk_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(dwc3_imx->hsio_blk_base)) + return PTR_ERR(dwc3_imx->hsio_blk_base); dwc3_imx->hsio_clk = devm_clk_get(dev, "hsio"); if (IS_ERR(dwc3_imx->hsio_clk)) { From patchwork Fri Feb 18 15:27:05 2022 Content-Type: text/plain; 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bh=NUNBthkSzGU6hGyMwUVYeSCWLjIWKGHnzMfDpZUB7Zw=; b=iql3kk7dHSssCmzUkrvVXEcvLKSegqKIlpcVDihjlJ2VkX31T73s4Sh9 M0vvDkx5RIHJ+vLqNndwbj62sbIQQ71PJZmdzeF/4bgADiIR1Xx3x0zNU HY6O17pxrpDaU4GpjySn2drt6ZgvoL9HS22opQUJGb3QwUh5xK6BYIVu1 N/XdYWrrkv+beFM3DNi8t4XSJUFdr+tgr9jxaAUXroo5+MgksFdgWXbos wh/kgKsZatxX40JkqQEeTxQDMn4b9eE24citD1sbSyB2n5rkLGD15lxai /Ct6whkbYpZKXw/ouzp+KVpOykeUz8ehE3LhsOydDhbe72GB20yUgjUlK A==; X-IronPort-AV: E=Sophos;i="5.88,379,1635199200"; d="scan'208";a="22181140" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 18 Feb 2022 16:27:14 +0100 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 81693280065; Fri, 18 Feb 2022 16:27:14 +0100 (CET) From: Alexander Stein To: Greg Kroah-Hartman , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , NXP Linux Team , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Li Jun , Rob Herring Subject: [PATCH v5 2/4] dt-bindings: usb: dwc3-imx8mp: Add imx8mp specific flags Date: Fri, 18 Feb 2022 16:27:05 +0100 Message-Id: <20220218152707.2198357-3-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220218152707.2198357-1-alexander.stein@ew.tq-group.com> References: <20220218152707.2198357-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220218_072721_746593_39DC064F X-CRM114-Status: GOOD ( 13.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds bindings for features in the USB glue block. They allow setting polarity of PWR and OC as well as disabling port power control. Also permanently attached can be annotated as well. Additional IO address and clock are needed. Signed-off-by: Alexander Stein Reviewed-by: Rob Herring --- Changes in v5: * Added Reviewed-by: Rob Herring .../bindings/usb/fsl,imx8mp-dwc3.yaml | 31 ++++++++++++++++--- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml index 974032b1fda0..01ab0f922ae8 100644 --- a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml @@ -15,9 +15,9 @@ properties: const: fsl,imx8mp-dwc3 reg: - maxItems: 1 - description: Address and length of the register set for the wrapper of - dwc3 core on the SOC. + items: + - description: Address and length of the register set for HSIO Block Control + - description: Address and length of the register set for the wrapper of dwc3 core on the SOC. "#address-cells": enum: [ 1, 2 ] @@ -49,6 +49,28 @@ properties: - const: hsio - const: suspend + fsl,permanently-attached: + type: boolean + description: + Indicates if the device atached to a downstream port is + permanently attached. + + fsl,disable-port-power-control: + type: boolean + description: + Indicates whether the host controller implementation includes port + power control. Defines Bit 3 in capability register (HCCPARAMS). + + fsl,over-current-active-low: + type: boolean + description: + Over current signal polarity is active low. + + fsl,power-active-low: + type: boolean + description: + Power pad (PWR) polarity is active low. + # Required child node: patternProperties: @@ -74,7 +96,8 @@ examples: #include usb3_0: usb@32f10100 { compatible = "fsl,imx8mp-dwc3"; - reg = <0x32f10100 0x8>; + reg = <0x32f10100 0x8>, + <0x381f0000 0x20>; clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, <&clk IMX8MP_CLK_USB_ROOT>; clock-names = "hsio", "suspend"; From patchwork Fri Feb 18 15:27:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 12751611 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D5FEDC433F5 for ; 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18 Feb 2022 16:27:14 +0100 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id BB235280075; Fri, 18 Feb 2022 16:27:14 +0100 (CET) From: Alexander Stein To: Greg Kroah-Hartman , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , NXP Linux Team , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Li Jun Subject: [PATCH v5 3/4] usb: dwc3: imx8mp: Add support for setting SOC specific flags Date: Fri, 18 Feb 2022 16:27:06 +0100 Message-Id: <20220218152707.2198357-4-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220218152707.2198357-1-alexander.stein@ew.tq-group.com> References: <20220218152707.2198357-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220218_072723_145798_1181B4FB X-CRM114-Status: GOOD ( 20.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The i.MX8MP glue layer has support for the following flags: * over-current polarity * PWR pad polarity * controlling PPC flag in HCCPARAMS register * permanent port attach for usb2 & usb3 port Allow setting these flags by supporting specific flags in the glue node. In order to get this to work an additional IORESOURCE_MEM and clock is necessary. For backward compatibility this is purely optional. Signed-off-by: Alexander Stein --- Changes in v5: * Added comment why reprogramming is necessary in resume drivers/usb/dwc3/dwc3-imx8mp.c | 63 ++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-imx8mp.c b/drivers/usb/dwc3/dwc3-imx8mp.c index 1c8fe657b3a9..174f07614318 100644 --- a/drivers/usb/dwc3/dwc3-imx8mp.c +++ b/drivers/usb/dwc3/dwc3-imx8mp.c @@ -36,10 +36,22 @@ #define USB_WAKEUP_EN_MASK GENMASK(5, 0) +/* USB glue registers */ +#define USB_CTRL0 0x00 +#define USB_CTRL1 0x04 + +#define USB_CTRL0_PORTPWR_EN BIT(12) /* 1 - PPC enabled (default) */ +#define USB_CTRL0_USB3_FIXED BIT(22) /* 1 - USB3 permanent attached */ +#define USB_CTRL0_USB2_FIXED BIT(23) /* 1 - USB2 permanent attached */ + +#define USB_CTRL1_OC_POLARITY BIT(16) /* 0 - HIGH / 1 - LOW */ +#define USB_CTRL1_PWR_POLARITY BIT(17) /* 0 - HIGH / 1 - LOW */ + struct dwc3_imx8mp { struct device *dev; struct platform_device *dwc3; void __iomem *hsio_blk_base; + void __iomem *glue_base; struct clk *hsio_clk; struct clk *suspend_clk; int irq; @@ -47,6 +59,42 @@ struct dwc3_imx8mp { bool wakeup_pending; }; +static void imx8mp_configure_glue(struct dwc3_imx8mp *dwc3_imx) +{ + struct device *dev = dwc3_imx->dev; + u32 value; + + if (!dwc3_imx->glue_base) + return; + + value = readl(dwc3_imx->glue_base + USB_CTRL0); + + if (device_property_read_bool(dev, "fsl,permanently-attached")) + value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED); + else + value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED); + + if (device_property_read_bool(dev, "fsl,disable-port-power-control")) + value &= ~(USB_CTRL0_PORTPWR_EN); + else + value |= USB_CTRL0_PORTPWR_EN; + + writel(value, dwc3_imx->glue_base + USB_CTRL0); + + value = readl(dwc3_imx->glue_base + USB_CTRL1); + if (device_property_read_bool(dev, "fsl,over-current-active-low")) + value |= USB_CTRL1_OC_POLARITY; + else + value &= ~USB_CTRL1_OC_POLARITY; + + if (device_property_read_bool(dev, "fsl,power-active-low")) + value |= USB_CTRL1_PWR_POLARITY; + else + value &= ~USB_CTRL1_PWR_POLARITY; + + writel(value, dwc3_imx->glue_base + USB_CTRL1); +} + static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx) { struct dwc3 *dwc3 = platform_get_drvdata(dwc3_imx->dwc3); @@ -100,6 +148,7 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *dwc3_np, *node = dev->of_node; struct dwc3_imx8mp *dwc3_imx; + struct resource *res; int err, irq; if (!node) { @@ -119,6 +168,15 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev) if (IS_ERR(dwc3_imx->hsio_blk_base)) return PTR_ERR(dwc3_imx->hsio_blk_base); + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) { + dev_warn(dev, "Base address for glue layer missing. Continuing without, some features are missing though."); + } else { + dwc3_imx->glue_base = devm_ioremap_resource(dev, res); + if (IS_ERR(dwc3_imx->glue_base)) + return PTR_ERR(dwc3_imx->glue_base); + } + dwc3_imx->hsio_clk = devm_clk_get(dev, "hsio"); if (IS_ERR(dwc3_imx->hsio_clk)) { err = PTR_ERR(dwc3_imx->hsio_clk); @@ -152,6 +210,8 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev) } dwc3_imx->irq = irq; + imx8mp_configure_glue(dwc3_imx); + pm_runtime_set_active(dev); pm_runtime_enable(dev); err = pm_runtime_get_sync(dev); @@ -252,6 +312,9 @@ static int __maybe_unused dwc3_imx8mp_resume(struct dwc3_imx8mp *dwc3_imx, dwc3_imx8mp_wakeup_disable(dwc3_imx); dwc3_imx->pm_suspended = false; + /* Upon power loss any previous configuration is lost, restore it */ + imx8mp_configure_glue(dwc3_imx); + if (dwc3_imx->wakeup_pending) { dwc3_imx->wakeup_pending = false; if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) { From patchwork Fri Feb 18 15:27:07 2022 Content-Type: text/plain; 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bh=HOdfXpDV8bIeEo5WcfKavhxD1bHf99R2VgJCyxOy74g=; b=ZwHk3F5ZArmEn+/NFTqvTg+d9RDJJ2rlE9rDK7HRhkkAdLOMiKHwiTX5 n5nbtS58elk6CIP0qercTRJUEhfHMtw/IR9PnunOdMzltF8YEY1MisdK8 OqBBW1fOwl/pnfbT6woUJtihFlipu4JLeOM+fje+6xQfurLl3i1qCBo0C qu0hFZq9hBnl38mmlWO41jwBuDg+LGzLtEGKoI+fRmmXe1c/Efg+WTSF2 szYY4brCXMZF1s+5cMtjmYkyfNKSZynHZNdTVelDen6j1YRVCpPGYGV/P Xgd+cN1xyO8NLBMgxZEXZDVysBfKJ0qRhRQq9Pr4b/wOk1uDF7DSXV9Lx w==; X-IronPort-AV: E=Sophos;i="5.88,379,1635199200"; d="scan'208";a="22181144" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 18 Feb 2022 16:27:15 +0100 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id EBAB2280065; Fri, 18 Feb 2022 16:27:14 +0100 (CET) From: Alexander Stein To: Greg Kroah-Hartman , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , NXP Linux Team , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Li Jun Subject: [PATCH v5 4/4] arm64: dts: imx8mp: Add memory for USB3 glue layer to usb3 nodes Date: Fri, 18 Feb 2022 16:27:07 +0100 Message-Id: <20220218152707.2198357-5-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220218152707.2198357-1-alexander.stein@ew.tq-group.com> References: <20220218152707.2198357-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220218_072724_516129_62024CF4 X-CRM114-Status: GOOD ( 13.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The USB3 glue layer has 2 areas in the register set, see RM Rev.1 section 11.2.5.2.1 GLUE_usb3 memory map: * USB3 control/status * PHY control/status Provide the memory area to the usb3 nodes for accessing the features in the USB3 control area. Signed-off-by: Alexander Stein Reviewed-by: Li Jun --- Changes in v5: * Added Reviewed-by: Li Jun arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 00ed083662e9..d73f0937b5d3 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1033,7 +1033,8 @@ usb3_phy0: usb-phy@381f0040 { usb3_0: usb@32f10100 { compatible = "fsl,imx8mp-dwc3"; - reg = <0x32f10100 0x8>; + reg = <0x32f10100 0x8>, + <0x381f0000 0x20>; clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, <&clk IMX8MP_CLK_USB_ROOT>; clock-names = "hsio", "suspend"; @@ -1074,7 +1075,8 @@ usb3_phy1: usb-phy@382f0040 { usb3_1: usb@32f10108 { compatible = "fsl,imx8mp-dwc3"; - reg = <0x32f10108 0x8>; + reg = <0x32f10108 0x8>, + <0x382f0000 0x20>; clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, <&clk IMX8MP_CLK_USB_ROOT>; clock-names = "hsio", "suspend";