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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id j8sm6680745edw.40.2022.02.19.10.42.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:42:28 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Wei Xu , Andy Gross , Bjorn Andersson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Chanho Park , Srinivas Kandagatla , Jan Kotas , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [RFC PATCH 1/8] dt-bindings: ufs: add common platform bindings Date: Sat, 19 Feb 2022 19:42:17 +0100 Message-Id: <20220219184224.44339-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> References: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Add bindings for common parts (platform) of Universal Flash Storage (UFS) Host Controllers in dtschema format. The 'freq-table-hz' is not correct in dtschema, because '-hz' suffix defines uint32 type, not an array. Therefore deprecate 'freq-table-hz' and use 'freq-table' instead. Include also the bindings directory in UFS maintainers entry. Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 2 +- .../devicetree/bindings/ufs/ufs-common.yaml | 86 +++++++++++++++++++ .../devicetree/bindings/ufs/ufs-hisi.txt | 4 +- MAINTAINERS | 1 + 4 files changed, 90 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml diff --git a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml index 4d13e6bc1c50..dc93fe2d3458 100644 --- a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml @@ -80,7 +80,7 @@ examples: compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0"; reg = <0x0 0x4000 0x0 0x10000>; interrupts = ; - freq-table-hz = <19200000 19200000>; + freq-table = <19200000 19200000>; power-domains = <&k3_pds 277>; clocks = <&k3_clks 277 1>; assigned-clocks = <&k3_clks 277 1>; diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml new file mode 100644 index 000000000000..66d0612b9991 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/ufs-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common properties for Universal Flash Storage (UFS) Host Controllers + +maintainers: + - Alim Akhtar + - Avri Altman + +properties: + clocks: true + + clock-names: true + + freq-table-hz: + deprecated: true + description: + Use freq-table. + + freq-table: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 64 + description: | + Array of operating frequencies in Hz stored in the same order + as the clocks property. If this property is not defined or a value in the + array is "0" then it is assumed that the frequency is set by the parent + clock or a fixed rate clock source. + + interrupts: + maxItems: 1 + + lanes-per-direction: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2] + default: 2 + description: + Number of lanes available per direction. Note that it is assume same + number of lanes is used both directions at once. + + vdd-hba-supply: + description: + Phandle to UFS host controller supply regulator node. + + vcc-supply: + description: + Phandle to VCC supply regulator node. + + vccq-supply: + description: + Phandle to VCCQ supply regulator node. + + vccq2-supply: + description: + Phandle to VCCQ2 supply regulator node. + + vcc-supply-1p8: + type: boolean + description: + For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V. This + boolean property when set, specifies to use low voltage range of + 1.7-1.95V. Note for external UFS cards this property is invalid and valid + VCC range is always 2.7-3.6V. + + vcc-max-microamp: + description: + Specifies max. load that can be drawn from VCC supply. + + vccq-max-microamp: + description: + Specifies max. load that can be drawn from VCCQ supply. + + vccq2-max-microamp: + description: + Specifies max. load that can be drawn from VCCQ2 supply. + +dependencies: + freq-table: [ 'clocks' ] + +required: + - interrupts + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt index 0b83df1a5418..7e9cf4cff3d3 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt +++ b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt @@ -14,7 +14,7 @@ Required properties: - clocks : List of phandle and clock specifier pairs - clock-names : List of clock input name strings sorted in the same order as the clocks property. "ref_clk", "phy_clk" is optional -- freq-table-hz : Array of operating frequencies stored in the same +- freq-table : Array of operating frequencies stored in the same order as the clocks property. If this property is not defined or a value in the array is "0" then it is assumed that the frequency is set by the parent clock or a @@ -35,7 +35,7 @@ Example: clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>, <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>; clock-names = "ref_clk", "phy_clk"; - freq-table-hz = <0 0>, <0 0>; + freq-table = <0 0 0 0>; /* offset: 0x84; bit: 12 */ resets = <&crg_rst 0x84 12>; reset-names = "rst"; diff --git a/MAINTAINERS b/MAINTAINERS index cae5b0c8400d..542174f434ce 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20015,6 +20015,7 @@ R: Alim Akhtar R: Avri Altman L: linux-scsi@vger.kernel.org S: Supported +F: Documentation/devicetree/bindings/ufs/ F: Documentation/scsi/ufs.rst F: drivers/scsi/ufs/ From patchwork Sat Feb 19 18:42:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12752370 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 551C9C4321E for ; Sat, 19 Feb 2022 18:43:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242939AbiBSSnd (ORCPT ); Sat, 19 Feb 2022 13:43:33 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242930AbiBSSnP (ORCPT ); Sat, 19 Feb 2022 13:43:15 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F05F27B07 for ; Sat, 19 Feb 2022 10:42:43 -0800 (PST) Received: from mail-lj1-f198.google.com (mail-lj1-f198.google.com [209.85.208.198]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 2E8513F1F6 for ; Sat, 19 Feb 2022 18:42:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645296162; bh=rlo6dv8R8AO8D00xVoydpkfzh23wJWM99TpGFXJ1F5U=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qCsQmBnSn20HdYPCj0ehf4ZtsdwuVy12To3s5uMRupC1ukuwRbKuwseW102ebx6AL BBRYO87kjRRY2nCl70UNhYmZgjXhXaYrcq2eMFeKL7AenQXq/8dueBIggBuE3xUDoc vEoX4fM0JUk8wEJnzlH2U18vk0bh7FoWRkNFinEOdxz+UXv3kmG33v//sHzgbDA7mR qE2iKzx4Ig/pJ0iHqc/SUcJ5Z9tczh22/JbYtFT96cZqxm/ItlHTLpZ+eJLP6eSgFO omSwNLsCNnmDVFhnqcv9i0FJPhypEm9pkP22t+mv4YkVBCNTx6cwTAGaMszFbdzmWY Zv5fs8EJcbGcg== Received: by mail-lj1-f198.google.com with SMTP id s20-20020a2eb8d4000000b00244c0c07f5aso2132792ljp.7 for ; Sat, 19 Feb 2022 10:42:42 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rlo6dv8R8AO8D00xVoydpkfzh23wJWM99TpGFXJ1F5U=; b=RnZg9+T1ZTCoHB/KDHs4fF29+S398OcREfGR44HrqSsbbN61a1pDZYzctIPzizykIz tOL0ktEM2a0A8ctmdZU+BU78SOhJwlANtYVQhA2/gHQip6YEwNWvUTrwkAKLU8CwcA5+ wbeeYmybPM4Rn+SUZwITUFk8jak2uSmah00khXfk3YVPn64p99eUZhUEK62fz1aXk5Eb YOI6H1vVog+HvJpd9LyXfohLbUZdGGNl/OcUDpZom5JjwQRgDmlH29RtyzC+NaJdZx0Y wUHECSPQjZV5nHQ6P1zxgbH4Xkz746AenP/yR2TjVDVYckR0GTixEDiMv5TNG6hcFJ9i UMfg== X-Gm-Message-State: AOAM532QxE1SvWr8re7yy6Bx/GC8NtelAluehdWiqEnjaV9yfhcWoZEp NtxmhqyDThafHggN4/slTFibmZkm5BrZzNPdDhYM6nOAke8cOH7+nEbDy8sCRcYglLbC+xG6SCs LdNs+L2Du98pElRIho+CCDVCKA7w8n1a4HLcejZY= X-Received: by 2002:a17:907:3a13:b0:6cf:1186:1381 with SMTP id fb19-20020a1709073a1300b006cf11861381mr10792767ejc.539.1645296150907; Sat, 19 Feb 2022 10:42:30 -0800 (PST) X-Google-Smtp-Source: ABdhPJx2naSdEU4Ep7cfPOis7zL8hDLMxXjvy+MqwgzXgYHKGMAwKMtnXxUn3sccavk0GfxDOqA4cQ== X-Received: by 2002:a17:907:3a13:b0:6cf:1186:1381 with SMTP id fb19-20020a1709073a1300b006cf11861381mr10792750ejc.539.1645296150719; Sat, 19 Feb 2022 10:42:30 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id j8sm6680745edw.40.2022.02.19.10.42.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:42:30 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Wei Xu , Andy Gross , Bjorn Andersson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Chanho Park , Srinivas Kandagatla , Jan Kotas , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [RFC PATCH 2/8] dt-bindings: ufs: samsung,exynos-ufs: use common bindings Date: Sat, 19 Feb 2022 19:42:18 +0100 Message-Id: <20220219184224.44339-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> References: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Use common UFS bindings in Samsung Exynos UFS to cover generic/common properties in DTS. Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml index 95ac1c18334d..e01408b4fcc2 100644 --- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml @@ -15,8 +15,10 @@ description: | in the common ufshcd bindings [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt -properties: +allOf: + - $ref: ufs-common.yaml +properties: compatible: enum: - samsung,exynos7-ufs @@ -47,9 +49,6 @@ properties: - const: core_clk - const: sclk_unipro_main - interrupts: - maxItems: 1 - phys: maxItems: 1 @@ -67,13 +66,12 @@ properties: required: - compatible - reg - - interrupts - phys - phy-names - clocks - clock-names -additionalProperties: false +unevaluatedProperties: false examples: - | From patchwork Sat Feb 19 18:42:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12752366 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7750FC433FE for ; Sat, 19 Feb 2022 18:42:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242901AbiBSSnE (ORCPT ); Sat, 19 Feb 2022 13:43:04 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242886AbiBSSm7 (ORCPT ); Sat, 19 Feb 2022 13:42:59 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FF4B26AEF for ; Sat, 19 Feb 2022 10:42:39 -0800 (PST) Received: from mail-ed1-f71.google.com (mail-ed1-f71.google.com [209.85.208.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 9DDAD405F2 for ; Sat, 19 Feb 2022 18:42:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645296152; bh=WPcW8NWUMCzy2JTNuQQQREfZ+SUwrjpg/KLSIOSfPWo=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dIE7OXzALGMegPGqgiirxA7+MRzQLzAPgcJa8j2jJF2WmOP7UqJMfc0Yr9thnDdgd Ikpg2Xa8S9yePuQ/5Eeq65MN2DZXQXjiTSKlQjuMU/SkFYl+qbG/CJrXqmpgL2WtmN RcQ1++fL8jymgGE+BXS12L0R4MCwHmFwZzvHooXLdiNISMFTRPeJCcFcgk8uWvhZt4 F1NapdLuzJ3xDcR2AdhzE43lc2UK9Mw89zLkhJv+9VxL3OT3SXw3T14zA6xB4a5B6C V6BB3R4d3iXxSHWGEoWxcFKwa0Ii+f4JSsZVDsXl9m6lD3PKHLfVoADPM8fcsubLdt KhA4DkmaeB3Wg== Received: by mail-ed1-f71.google.com with SMTP id eq13-20020a056402298d00b00412cfa4bb0eso2771703edb.7 for ; Sat, 19 Feb 2022 10:42:32 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WPcW8NWUMCzy2JTNuQQQREfZ+SUwrjpg/KLSIOSfPWo=; b=76EZXmcgURC+Mswl8hJbR0TfzqQMIn5y3EgsokjoZ7L6hRxpx4crzK6ZpgsOYU6try Sf4fijxi/0SpN7hUUzBDqXxoUEQuZ9NnX6pz21GJEtEgeo7iUqusdH6rMP5hepLOcnpt IseYdbM9mtjh//eGRlmnyz9Uh2qbab5seW3uJWMHphRReNERKcqasvgEG/Xe6skTbbcM okdHNz4UHUZY6Nt6PaDNdM2qPqOYeGWOyE2Gl6ydDZ8ZepP82px9d83YL2cr1Mw6Ql8s J3TBm9miZSDPG3r5Oa123WdJa2JKZUc6nQG+35nZReK64RhQIf9FJ8QmWDCt9NNTeL4A 9Crw== X-Gm-Message-State: AOAM532O3qxoP+kT7eBB0UqUr2B/0A9GeDZV+DHSB9gI8cQRb/NU5ja8 eVV4ZGZDsJWVWcEBsFv+vTIYy/4P4Uz+R1NcBidafVUrA4evMZs9eLmwuRBBEAr79t1fZfsMiLa Fstx/XTW5abMqARcZymNCnwUVOnXYWqY2ocr8T6o= X-Received: by 2002:a05:6402:294e:b0:40f:905b:dab5 with SMTP id ed14-20020a056402294e00b0040f905bdab5mr13853824edb.103.1645296152248; Sat, 19 Feb 2022 10:42:32 -0800 (PST) X-Google-Smtp-Source: ABdhPJx5GhfIf0huNIJ/pQcpXPASV6pT9kSKCqt7N4u74cDFIfTjfwRFcQoz1nbzofCZtXrbD3dyZw== X-Received: by 2002:a05:6402:294e:b0:40f:905b:dab5 with SMTP id ed14-20020a056402294e00b0040f905bdab5mr13853807edb.103.1645296152062; Sat, 19 Feb 2022 10:42:32 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id j8sm6680745edw.40.2022.02.19.10.42.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:42:31 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Wei Xu , Andy Gross , Bjorn Andersson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Chanho Park , Srinivas Kandagatla , Jan Kotas , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [RFC PATCH 3/8] dt-bindings: ufs: cdns,ufshc: convert to dtschema Date: Sat, 19 Feb 2022 19:42:19 +0100 Message-Id: <20220219184224.44339-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> References: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema format. Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ----------- .../devicetree/bindings/ufs/cdns,ufshc.yaml | 56 +++++++++++++++++++ 2 files changed, 56 insertions(+), 32 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt deleted file mode 100644 index 02347b017abd..000000000000 --- a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt +++ /dev/null @@ -1,32 +0,0 @@ -* Cadence Universal Flash Storage (UFS) Controller - -UFS nodes are defined to describe on-chip UFS host controllers. -Each UFS controller instance should have its own node. -Please see the ufshcd-pltfrm.txt for a list of all available properties. - -Required properties: -- compatible : Compatible list, contains one of the following controllers: - "cdns,ufshc" - Generic CDNS HCI, - "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY - complemented with the JEDEC version: - "jedec,ufs-2.0" - -- reg : Address and length of the UFS register set. -- interrupts : One interrupt mapping. -- freq-table-hz : Clock frequency table. - See the ufshcd-pltfrm.txt for details. -- clocks : List of phandle and clock specifier pairs. -- clock-names : List of clock input name strings sorted in the same - order as the clocks property. "core_clk" is mandatory. - Depending on a type of a PHY, - the "phy_clk" clock can also be added, if needed. - -Example: - ufs@fd030000 { - compatible = "cdns,ufshc", "jedec,ufs-2.0"; - reg = <0xfd030000 0x10000>; - interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>; - freq-table-hz = <0 0>, <0 0>; - clocks = <&ufs_core_clk>, <&ufs_phy_clk>; - clock-names = "core_clk", "phy_clk"; - }; diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml new file mode 100644 index 000000000000..68ae5663cd25 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence Universal Flash Storage (UFS) Controller + +maintainers: + - Jan Kotas + +allOf: + - $ref: ufs-common.yaml + +properties: + compatible: + items: + - enum: + - cdns,ufshc + # CDNS UFS HC + M31 16nm PHY + - cdns,ufshc-m31-16nm + - const: jedec,ufs-2.0 + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + items: + - const: core_clk + - const: phy_clk + - const: ref_clk + +required: + - compatible + - clocks + - clock-names + - reg + +unevaluatedProperties: false + +examples: + - | + #include + + ufs@fd030000 { + compatible = "cdns,ufshc", "jedec,ufs-2.0"; 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id j8sm6680745edw.40.2022.02.19.10.42.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:42:32 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Wei Xu , Andy Gross , Bjorn Andersson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Chanho Park , Srinivas Kandagatla , Jan Kotas , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [RFC PATCH 4/8] scsi: ufs: deprecate 'freq-table-hz' property Date: Sat, 19 Feb 2022 19:42:20 +0100 Message-Id: <20220219184224.44339-5-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> References: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The 'freq-table-hz' is not correct in DT schema, because '-hz' suffix defines uint32 type, not an array. Therefore deprecate 'freq-table-hz' and use 'freq-table' instead. Signed-off-by: Krzysztof Kozlowski --- drivers/scsi/ufs/ufshcd-pltfrm.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c index 87975d1a21c8..2b192477d158 100644 --- a/drivers/scsi/ufs/ufshcd-pltfrm.c +++ b/drivers/scsi/ufs/ufshcd-pltfrm.c @@ -47,8 +47,9 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) if (cnt <= 0) goto out; - if (!of_get_property(np, "freq-table-hz", &len)) { - dev_info(dev, "freq-table-hz property not specified\n"); + if (!of_get_property(np, "freq-table", &len) || + !of_get_property(np, "freq-table-hz", &len)) { + dev_info(dev, "freq-table property not specified\n"); goto out; } @@ -57,7 +58,7 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) sz = len / sizeof(*clkfreq); if (sz != 2 * cnt) { - dev_err(dev, "%s len mismatch\n", "freq-table-hz"); + dev_err(dev, "%s len mismatch\n", "freq-table"); ret = -EINVAL; goto out; } @@ -69,12 +70,16 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) goto out; } - ret = of_property_read_u32_array(np, "freq-table-hz", + ret = of_property_read_u32_array(np, "freq-table", clkfreq, sz); if (ret && (ret != -EINVAL)) { - dev_err(dev, "%s: error reading array %d\n", - "freq-table-hz", ret); - return ret; + ret = of_property_read_u32_array(np, "freq-table-hz", + clkfreq, sz); + if (ret && (ret != -EINVAL)) { + dev_err(dev, "%s: error reading array %d\n", + "freq-table", ret); + return ret; + } } for (i = 0; i < sz; i += 2) { @@ -99,7 +104,7 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) if (!strcmp(name, "ref_clk")) clki->keep_link_active = true; - dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz", + dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table", clki->min_freq, clki->max_freq, clki->name); list_add_tail(&clki->list, &hba->clk_list_head); } From patchwork Sat Feb 19 18:42:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12752368 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 693BBC4332F for ; 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id j8sm6680745edw.40.2022.02.19.10.42.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:42:34 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Wei Xu , Andy Gross , Bjorn Andersson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Chanho Park , Srinivas Kandagatla , Jan Kotas , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [RFC PATCH 5/8] arm64: dts: hi3670: use 'freq-table' in UFS node Date: Sat, 19 Feb 2022 19:42:21 +0100 Message-Id: <20220219184224.44339-6-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> References: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The 'freq-table-hz' property is deprecated by UFS bindings. The uint32-array requires also element to be passed within one <> block. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 636c8817df7e..0860c5688977 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -671,8 +671,8 @@ ufs: ufs@ff3c0000 { clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>, <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>; clock-names = "ref_clk", "phy_clk"; - freq-table-hz = <0 0 - 0 0>; + freq-table = <0 0 + 0 0>; /* offset: 0x84; bit: 12 */ resets = <&crg_rst 0x84 12>; reset-names = "rst"; From patchwork Sat Feb 19 18:42:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12752369 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C991C433F5 for ; Sat, 19 Feb 2022 18:43:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242082AbiBSSnb (ORCPT ); Sat, 19 Feb 2022 13:43:31 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242927AbiBSSnP (ORCPT ); Sat, 19 Feb 2022 13:43:15 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A7C92275E4 for ; Sat, 19 Feb 2022 10:42:41 -0800 (PST) Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 6C1074092E for ; Sat, 19 Feb 2022 18:42:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645296157; bh=eds4hwJvnu4NA5qKYzbOl5rJlIyGJooNPDbjWhSXxPA=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fTjNbmylLjXP0VN1lczGMn7EWl0yR/zOu58pVD0L5rRcLgyeQEfIqto0WPKTuVfJM VtNm8KVCeF2Mwd85R4fpwmole6OYXnVdFEPBuxZwZ/EeN41e3IFnIHe7r+gxmpRxup TM/hUwupkBT48qzKxzfTVQ1JlyFB4Ybw4IeW6Jj5ebNCNfkHFS6/4MrYjwlTVi9VM/ GAiv1lQkhs1PaskYjyBGV2rBSofAGT1TMoIbQGVs7FM5s9pRCINzUBnFoE/df1Pa+t V/77b0QegT6/g2JUONoomAQxMh3nHO4S4UmTgIsZIjMrWHokBngmDY5a3vDWldZ50l koZU5oMA3qe+Q== Received: by mail-ed1-f72.google.com with SMTP id d11-20020a50c88b000000b00410ba7a14acso7587019edh.6 for ; Sat, 19 Feb 2022 10:42:37 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eds4hwJvnu4NA5qKYzbOl5rJlIyGJooNPDbjWhSXxPA=; b=v9AW/Mo8Ugsb5qXhRBepVuj3i1/q/uvC3yuFJBASyCJtp32uzJWDml15lNKDNeZHKK 4KZyv+x4dz1+nnWGRxO/ivm4KkBtBm+hJ4aqziLdoMxDeoKfiIIPqhf/NC6SJ/UMa/LH Yqx9LDEIqoQ/FeMKx7tnwsSvWWbXdRS/he+aWLC/UpfOFQnJpG8byOcOyu+S8gbmppfp AS7v1AngQ8hASc/GCZtLsqTa7RaFQ5RS/IAkho+82dkunnqhQb7qM8HbW23BlgWmuOp/ FP34gQ5JvHSonjRcYzJKpfJWl0ePrLRb3WP8a4sIz4YdNcPhN9SU0VE+za78j2fjQvzj 7Z2w== X-Gm-Message-State: AOAM5328LVDkXerlfBTuUrFqb37NFOc21++9aps2AZP4hI8hs1xw+xP1 Y+pKO8L6LzZ2VBU9JpEiNb/zyZ3n/EcGqpKXc6v52C+sIYHp3khg1dpEsKe+Y87PJ2WRO5Q/TUQ fp03jRPQDhFmk96DD4qNSM13VERuOFnAgZD6flms= X-Received: by 2002:a17:906:8557:b0:6cf:2730:b5cf with SMTP id h23-20020a170906855700b006cf2730b5cfmr10757172ejy.368.1645296156513; Sat, 19 Feb 2022 10:42:36 -0800 (PST) X-Google-Smtp-Source: ABdhPJyiBlObuIE4yboQDPgcUgD7fnjCG8ClJXJKKeDYvCOmZcNc7+X05uMuAKMAKm2NUzCGxOVM8g== X-Received: by 2002:a17:906:8557:b0:6cf:2730:b5cf with SMTP id h23-20020a170906855700b006cf2730b5cfmr10757162ejy.368.1645296156345; Sat, 19 Feb 2022 10:42:36 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id j8sm6680745edw.40.2022.02.19.10.42.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:42:35 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Wei Xu , Andy Gross , Bjorn Andersson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Chanho Park , Srinivas Kandagatla , Jan Kotas , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [RFC PATCH 6/8] arm64: dts: exynos: use 'freq-table' in UFS node Date: Sat, 19 Feb 2022 19:42:22 +0100 Message-Id: <20220219184224.44339-7-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> References: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The 'freq-table-hz' property is deprecated by UFS bindings. The uint32-array requires also element to be passed within one <> block. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos7.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index e38bb02a2152..beeca27a7415 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -656,7 +656,8 @@ ufs: ufs@15570000 { clocks = <&clock_fsys1 ACLK_UFS20_LINK>, <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; clock-names = "core_clk", "sclk_unipro_main"; - freq-table-hz = <0 0>, <0 0>; + freq-table = <0 0 + 0 0>; pinctrl-names = "default"; pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; phys = <&ufs_phy>; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index 807d500d6022..0d00543952c6 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -311,7 +311,8 @@ ufs_0: ufs0@17e00000 { clocks = <&ufs_core_clock>, <&ufs_core_clock>; clock-names = "core_clk", "sclk_unipro_main"; - freq-table-hz = <0 0>, <0 0>; + freq-table = <0 0 + 0 0>; pinctrl-names = "default"; pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; phys = <&ufs_0_phy>; From patchwork Sat Feb 19 18:44:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12752384 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C10DC433F5 for ; Sat, 19 Feb 2022 18:45:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242952AbiBSSpS (ORCPT ); Sat, 19 Feb 2022 13:45:18 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:53884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240590AbiBSSpS (ORCPT ); Sat, 19 Feb 2022 13:45:18 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB94080232 for ; Sat, 19 Feb 2022 10:44:58 -0800 (PST) Received: from mail-ed1-f69.google.com (mail-ed1-f69.google.com [209.85.208.69]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 56EB13F1D0 for ; Sat, 19 Feb 2022 18:44:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645296297; bh=VdBW5eJ0KRtkG5qq7BggPOtnxfiLOHvvLGr1LQKWRHE=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=akhBfwYWYcxaTuaVJKkLGa0KA3T6RpEbdSp92OoDFG4qoc66ejveVYBa31dmZRBa2 eAoemDAOijwL3+NdNYwXWhecq+34woyqSsM8Z7guHtQGHsjt/Rmd0J22tUo2X7/qPi kf3Q+qkqqXGDuHC5KmoN9SlCl4c05p9OhJiZQPtqX2sihoug3BNa6UqXFa5vrSozqB aD+KK0Zmxg0PmmEbr0UCyCvg+uERg+7nk7g4uphXwa6Kg2OCeNxNeni3T6weeh5938 9uY7+6KKiZWpUJNvq14ZR9e/KeINyI313zKMO/HBSCMZO3epjPjNRX4i38FA/BpTlc 87ZqQU+OgFsnw== Received: by mail-ed1-f69.google.com with SMTP id l14-20020aa7cace000000b003f7f8e1cbbdso7569889edt.20 for ; Sat, 19 Feb 2022 10:44:57 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VdBW5eJ0KRtkG5qq7BggPOtnxfiLOHvvLGr1LQKWRHE=; b=Y0WW3F1nrXU60SdtJsp+oplPWXOCHNHVTEmRT2JZu8dcZBAkd4wNIbY8SsNSIrsCQC 1Y4qOCMXrHj6wHz3IzQjEMHu/sdx54SBPOEGO666ZdUazDDcxFrcVG6SXnZHIjPNA9Y7 iZHXtQRchI2RuOGTd4VLlJ8dwRlIJvpf+gmczmVmCopSF/SkUhYJJjA+NjHlvr9Q++2c 7zBiigDaABwBiG8s1TLOyyh2RaCbEYr+XYv4sipRehgnRlBchY6LTIgkbF/OwfRX5exb j7bpPy061i4PPz76Hk+wnM6oXMIr9ecuuEAoFgBT+8XEtIVb0TnG4vBkRzrWVAkgJa8X 6SEw== X-Gm-Message-State: AOAM530OM/k+pnIb9Qgog0DT9gl8HUEYpRFFk4TwX9tHcdRKQlZ1KCTJ TjUYz4MX/j+NjxopgDerbTXu6scY7E/vbEuJtbDnAC7ieyT1I/AaBjcChY2irBKwzL5Vm13KxBL 8opXhx2ADm5RH5V+J+LpPRXy5kFQWFNyooWIeBMs= X-Received: by 2002:a17:906:9bed:b0:6ce:6bbc:dc8b with SMTP id de45-20020a1709069bed00b006ce6bbcdc8bmr11003779ejc.428.1645296296749; Sat, 19 Feb 2022 10:44:56 -0800 (PST) X-Google-Smtp-Source: ABdhPJw5eELNrX+BuAo2fm8/sdIZW7wyUGvlrGjYgJmeUvcZV4dLJloHpIRrlrSDF/y9czaR/IL1Hg== X-Received: by 2002:a17:906:9bed:b0:6ce:6bbc:dc8b with SMTP id de45-20020a1709069bed00b006ce6bbcdc8bmr11003769ejc.428.1645296296564; Sat, 19 Feb 2022 10:44:56 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id v24sm3417780ejf.7.2022.02.19.10.44.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:44:56 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Wei Xu , Andy Gross , Bjorn Andersson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Chanho Park , Srinivas Kandagatla , Jan Kotas , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [RFC PATCH 7/8] arm64: dts: qcom: use 'freq-table' in UFS node Date: Sat, 19 Feb 2022 19:44:52 +0100 Message-Id: <20220219184453.44689-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> References: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The 'freq-table-hz' property is deprecated by UFS bindings. The uint32-array requires also element to be passed within one <> block. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 23 +++++++++++------------ arch/arm64/boot/dts/qcom/msm8998.dtsi | 17 ++++++++--------- arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++++++---------- arch/arm64/boot/dts/qcom/sm8150.dtsi | 19 +++++++++---------- arch/arm64/boot/dts/qcom/sm8250.dtsi | 17 ++++++++--------- arch/arm64/boot/dts/qcom/sm8350.dtsi | 19 +++++++++---------- arch/arm64/boot/dts/qcom/sm8450.dtsi | 17 ++++++++--------- 7 files changed, 62 insertions(+), 69 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c85825ea1623..2d6ad6dfa0dd 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1761,18 +1761,17 @@ ufshc: ufshc@624000 { <&rpmcc RPM_SMD_LN_BB_CLK>, <&gcc GCC_UFS_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; - freq-table-hz = - <100000000 200000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <150000000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <100000000 200000000 + 0 0 + 0 0 + 0 0 + 0 0 + 150000000 300000000 + 0 0 + 0 0 + 0 0 + 0 0 + 0 0>; lanes-per-direction = <1>; #reset-cells = <1>; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 2fda21e810c9..eee7bc35e468 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -990,15 +990,14 @@ ufshc: ufshc@1da4000 { <&gcc GCC_UFS_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_1_CLK>; - freq-table-hz = - <50000000 200000000>, - <0 0>, - <0 0>, - <37500000 150000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <50000000 200000000 + 0 0 + 0 0 + 37500000 150000000 + 0 0 + 0 0 + 0 0 + 0 0>; resets = <&gcc GCC_UFS_BCR>; reset-names = "rst"; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 0d6286d27dd4..987730032c0b 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2274,16 +2274,15 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>, <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; - freq-table-hz = - <50000000 200000000>, - <0 0>, - <0 0>, - <37500000 150000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <0 300000000>; + freq-table = <50000000 200000000 + 0 0 + 0 0 + 37500000 150000000 + 0 0 + 0 0 + 0 0 + 0 0 + 0 300000000>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index d15fee495238..3c5acf07337d 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1782,16 +1782,15 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>, <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; - freq-table-hz = - <37500000 300000000>, - <0 0>, - <0 0>, - <37500000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>, - <0 300000000>; + freq-table = <37500000 300000000 + 0 0 + 0 0 + 37500000 300000000 + 0 0 + 0 0 + 0 0 + 0 0 + 0 300000000>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index fdaf303ba047..308585cde3b0 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2133,15 +2133,14 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = - <37500000 300000000>, - <0 0>, - <0 0>, - <37500000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <37500000 300000000 + 0 0 + 0 0 + 37500000 300000000 + 0 0 + 0 0 + 0 0 + 0 0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index d242bab69c2e..526a328a9b7e 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -1935,16 +1935,15 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = - <75000000 300000000>, - <75000000 300000000>, - <0 0>, - <0 0>, - <75000000 300000000>, - <0 0>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <75000000 300000000 + 75000000 300000000 + 0 0 + 0 0 + 75000000 300000000 + 0 0 + 0 0 + 0 0 + 0 0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 934e29b9e153..ed72dbdf3435 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -1398,15 +1398,14 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = - <75000000 300000000>, - <0 0>, - <0 0>, - <75000000 300000000>, - <75000000 300000000>, - <0 0>, - <0 0>, - <0 0>; + freq-table = <75000000 300000000 + 0 0 + 0 0 + 75000000 300000000 + 75000000 300000000 + 0 0 + 0 0 + 0 0>; status = "disabled"; }; From patchwork Sat Feb 19 18:45:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12752385 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FE44C4332F for ; Sat, 19 Feb 2022 18:46:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230022AbiBSSqV (ORCPT ); Sat, 19 Feb 2022 13:46:21 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:58644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242897AbiBSSqT (ORCPT ); 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id j11sm4847509eda.106.2022.02.19.10.45.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:45:57 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Wei Xu , Andy Gross , Bjorn Andersson , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Chanho Park , Srinivas Kandagatla , Jan Kotas , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [RFC PATCH 8/8] arm64: dts: ti: use 'freq-table' in UFS node Date: Sat, 19 Feb 2022 19:45:54 +0100 Message-Id: <20220219184554.44887-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> References: <20220219184224.44339-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The 'freq-table-hz' property is deprecated by UFS bindings. The uint32-array requires also element to be passed within one <> block. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 599861259a30..c3afef0321ae 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1257,7 +1257,9 @@ ufs@4e84000 { compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0"; reg = <0x0 0x4e84000 0x0 0x10000>; interrupts = ; - freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>; + freq-table = <250000000 250000000 + 19200000 19200000 + 19200000 19200000>; clocks = <&k3_clks 277 0>, <&k3_clks 277 1>, <&k3_clks 277 1>; clock-names = "core_clk", "phy_clk", "ref_clk"; dma-coherent;