From patchwork Mon Feb 21 13:37:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 12753653 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9BFBDC433F5 for ; Mon, 21 Feb 2022 14:02:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UgHf68UXdNhpVDvRUecr/emdRXRDQjxTDEztR/iSjy4=; b=GWCEurt+nudJ3N QagrSrULx0nwMcuOc7O5/I8BLs+gVbtJ+wigoSUuZxHpVCWic2woHn/gR5HO3L7smv8TNZLkCAXiB KyTMc/GF8pea+rgee/zZwlGQFHEK0/EZoNmDzn3ABKjUe6Kkz1d0sx9iP4zgYXKltgWpYXnMN3r6K Bf7ifGLVqt2j6Hv+iF0vOYjmXqvrPGpH/S40LJaB7vGABHAZxTAoOVyBNbQC8EeD4UaMO81IJEJLB RU2HacG4+2LtmwwUmRLVRuFkNW085bqPofWdBuawBiQc3XDbjO5EX/tCy89hbU6QFby7x6lf5Zk7E W+MA0XarhZQaeE/X9IeA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nM9Ew-0066CW-2S; Mon, 21 Feb 2022 14:00:36 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nM8tG-005xeL-PL for linux-arm-kernel@lists.infradead.org; Mon, 21 Feb 2022 13:38:13 +0000 Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 21LD6WOQ003366; Mon, 21 Feb 2022 14:37:55 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=fWbIJ2B/E72lu792e8+JaLbz6RiW90m0aC/YdCAClyo=; b=yVeuEuSggNj6d8YzockA3ZhWpMhNo8m8JAnMPyBBA1tiCaCCjzQvMwpfjUtD194TDKI3 aEBA0G+xbPPPIMsnWKkdR0QYP0H/Fq8j2cMff06Qo7iuaAcmSgg8wemrxwwbOyMSPVZd qcr4Qr8/IqWv1QU18Vv+yT+GsG5IpwltrWV9+y24XP2dBm3EMGznxTJzQTcozhIqierd 9NVbamIL+CdHaL2TFPE70LCg8ScFnYajvyoAQhW3RbuaN5gTQwj7AkRejEKoXw+m+s1b pLba38/WCKWN9k0dFGT65AZAUWURj0131ZmfCck8sewyab0fEfXiLohIc8SRkB2JgkoQ 3g== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3ebsceverb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 21 Feb 2022 14:37:55 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E48C2100034; Mon, 21 Feb 2022 14:37:54 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DC187229A82; Mon, 21 Feb 2022 14:37:54 +0100 (CET) Received: from localhost (10.75.127.51) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Mon, 21 Feb 2022 14:37:54 +0100 From: Alexandre Torgue To: , CC: , , Alexandre Torgue , , , Marek Vasut , , Manivannan Sadhasivam , Marcin Sloniewski , Ahmad Fatoum , Marc Zyngier Subject: [PATCH 1/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp13 Date: Mon, 21 Feb 2022 14:37:49 +0100 Message-ID: <20220221133750.20297-2-alexandre.torgue@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220221133750.20297-1-alexandre.torgue@foss.st.com> References: <20220221133750.20297-1-alexandre.torgue@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-21_07,2022-02-21_01,2021-12-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220221_053811_182827_B6C9BF6D X-CRM114-Status: GOOD ( 12.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs. STM32MP13 is a single core A7. Signed-off-by: Alexandre Torgue diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi index 262de4eeb4ed..1708c79b5254 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -92,10 +92,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = , - , - , - ; + interrupts = , + , + , + ; interrupt-parent = <&intc>; always-on; }; From patchwork Mon Feb 21 13:37:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 12753652 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CED38C433EF for ; Mon, 21 Feb 2022 14:01:45 +0000 (UTC) DKIM-Signature: v=1; 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Mon, 21 Feb 2022 14:37:57 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6135A10002A; Mon, 21 Feb 2022 14:37:56 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 55DEA229A81; Mon, 21 Feb 2022 14:37:56 +0100 (CET) Received: from localhost (10.75.127.51) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Mon, 21 Feb 2022 14:37:55 +0100 From: Alexandre Torgue To: , CC: , , Alexandre Torgue , , , Marek Vasut , , Manivannan Sadhasivam , Marcin Sloniewski , Ahmad Fatoum , Marc Zyngier Subject: [PATCH 2/2] ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15 Date: Mon, 21 Feb 2022 14:37:50 +0100 Message-ID: <20220221133750.20297-3-alexandre.torgue@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220221133750.20297-1-alexandre.torgue@foss.st.com> References: <20220221133750.20297-1-alexandre.torgue@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-02-21_07,2022-02-21_01,2021-12-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220221_053810_918088_2DCD2B9A X-CRM114-Status: GOOD ( 12.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs. STM32MP151 is a single A7. STM32MP153/157 is a dual A7. Signed-off-by: Alexandre Torgue diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 2171e7a97e92..f9aa9af31efd 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -45,10 +45,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = , - , - , - ; + interrupts = , + , + , + ; interrupt-parent = <&intc>; }; diff --git a/arch/arm/boot/dts/stm32mp153.dtsi b/arch/arm/boot/dts/stm32mp153.dtsi index 1c1889b194cf..486084e0b80b 100644 --- a/arch/arm/boot/dts/stm32mp153.dtsi +++ b/arch/arm/boot/dts/stm32mp153.dtsi @@ -22,6 +22,13 @@ interrupt-affinity = <&cpu0>, <&cpu1>; }; + timer { + interrupts = , + , + , + ; + }; + soc { m_can1: can@4400e000 { compatible = "bosch,m_can";