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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:41 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 01/15] dt-bindings: ufs: add common platform bindings Date: Tue, 22 Feb 2022 15:58:40 +0100 Message-Id: <20220222145854.358646-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Add bindings for common parts (platform) of Universal Flash Storage (UFS) Host Controllers in dtschema format. The 'freq-table-hz' is not correct in dtschema, because '-hz' suffix defines uint32 type, not an array. Therefore deprecate 'freq-table-hz' and use 'freq-table' instead. Include also the bindings directory in UFS maintainers entry. Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 2 +- .../devicetree/bindings/ufs/ufs-common.yaml | 88 +++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 90 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml diff --git a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml index 4d13e6bc1c50..dc93fe2d3458 100644 --- a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml @@ -80,7 +80,7 @@ examples: compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0"; reg = <0x0 0x4000 0x0 0x10000>; interrupts = ; - freq-table-hz = <19200000 19200000>; + freq-table = <19200000 19200000>; power-domains = <&k3_pds 277>; clocks = <&k3_clks 277 1>; assigned-clocks = <&k3_clks 277 1>; diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml new file mode 100644 index 000000000000..85c73d2853e9 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/ufs-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common properties for Universal Flash Storage (UFS) Host Controllers + +maintainers: + - Alim Akhtar + - Avri Altman + +properties: + clocks: true + + clock-names: true + + freq-table-hz: + deprecated: true + description: + Use freq-table. + + freq-table: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: Minimum frequency for given clock + - description: Maximum frequency for given clock + description: | + Array of operating frequencies in Hz stored in the same order + as the clocks property. If this property is not defined or a value in the + array is "0" then it is assumed that the frequency is set by the parent + clock or a fixed rate clock source. + + interrupts: + maxItems: 1 + + lanes-per-direction: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2] + default: 2 + description: + Number of lanes available per direction. Note that it is assume same + number of lanes is used both directions at once. + + vdd-hba-supply: + description: + Phandle to UFS host controller supply regulator node. + + vcc-supply: + description: + Phandle to VCC supply regulator node. + + vccq-supply: + description: + Phandle to VCCQ supply regulator node. + + vccq2-supply: + description: + Phandle to VCCQ2 supply regulator node. + + vcc-supply-1p8: + type: boolean + description: + For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V. This + boolean property when set, specifies to use low voltage range of + 1.7-1.95V. Note for external UFS cards this property is invalid and valid + VCC range is always 2.7-3.6V. + + vcc-max-microamp: + description: + Specifies max. load that can be drawn from VCC supply. + + vccq-max-microamp: + description: + Specifies max. load that can be drawn from VCCQ supply. + + vccq2-max-microamp: + description: + Specifies max. load that can be drawn from VCCQ2 supply. + +dependencies: + freq-table: [ 'clocks' ] + +required: + - interrupts + +additionalProperties: true diff --git a/MAINTAINERS b/MAINTAINERS index aa0f6cbb634e..c2cff57d32f8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20015,6 +20015,7 @@ R: Alim Akhtar R: Avri Altman L: linux-scsi@vger.kernel.org S: Supported +F: Documentation/devicetree/bindings/ufs/ F: Documentation/scsi/ufs.rst F: drivers/scsi/ufs/ From patchwork Tue Feb 22 14:58:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755334 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59425C433F5 for ; Tue, 22 Feb 2022 14:59:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233024AbiBVPAL (ORCPT ); Tue, 22 Feb 2022 10:00:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47504 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233020AbiBVPAL (ORCPT ); Tue, 22 Feb 2022 10:00:11 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFD6010DA5A for ; Tue, 22 Feb 2022 06:59:45 -0800 (PST) Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id E41713F1DD for ; Tue, 22 Feb 2022 14:59:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645541983; bh=74/pBhghHeWH7/mWTs7/IJw313x+oiYcimgGGTWLW0I=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lZzY+9CANg/mFRjWa8pOexhcMYuFW0b6a/t344ieDX4kPDvTBUtc49+xGyINzLd6p 9vuBEFyrnjPz3gpFCW/JvPW2EyMBvK+BauXG5/fS4+PrGDoX1eMrDqcb5lBz6r04gk 6BoHNqnfE1x0aoXoLXOJaglTIKh7nJ/95RY5jWupGLot9pN2zLp+3LEHrbfBfqnzO8 +NnIVHOzYOj5j7ZeDN202F8KkY4itiYgJ9fzMp5gcI4pWBAX4gIpBmM/325yFaQ6Kz Ek0Xs1u0FxfLdY74beC+TSaNKqWZxqiIU4mSdHf10RbX2NSPik4AKPRPGoeoQ+OZV7 Yu9uLfJAHGFpw== Received: by mail-ed1-f72.google.com with SMTP id r9-20020a05640251c900b00412d54ea618so6361611edd.3 for ; Tue, 22 Feb 2022 06:59:43 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=74/pBhghHeWH7/mWTs7/IJw313x+oiYcimgGGTWLW0I=; b=gfmnvUQRJQjhWiOciv33UGpIDQyHo77OB+E6eZJxrval+U0P1nzdg8QduahmqT2X66 1M0kfhb1AsKW8frnW1cZuQKdl0MErIsQXjHAFo2Wxad4D5t9TXiEsnWx+GfJ8v7U1Pkw kMeuYFJheVRv/uq+8uekhu1icLUsTS5cq2sk1af+CMjdnOPhaU9l9inp41GZZ+05T8Wx 4QXmRYPdtOrYBaVwFu8UUAZt/XTHNz9iSvZRrBQ8EaZ9RcFdUPZK/C8zs/tyGJABrmvJ aqwMkqZ4VjrjFLTrJsRaMtX+fvH6DWOm9amqJjYMCd6AYirh/nuDK3QA4lGCtuPEvBbZ vD0A== X-Gm-Message-State: AOAM533S3Itq5K/u/wv7/RPkCsYsx3SSTg+jHpsD2Lms5U+yOVjjDRZf /DEKDETxIAKTH7Ga3/SnFhcKOe7918guvW0OdPC8umiHRbqIihz8QwbsIVNpLyCeZj/FaC9lYky xt0NDvtMALTpDzZa1ANr+40dCp8WeA6t13EH84/w= X-Received: by 2002:a17:906:194f:b0:6ce:3670:92b with SMTP id b15-20020a170906194f00b006ce3670092bmr19235869eje.737.1645541983425; Tue, 22 Feb 2022 06:59:43 -0800 (PST) X-Google-Smtp-Source: ABdhPJwnm5ZDMw7fGj3UZIRVOLHmbWI713Qr92YShXMsW7GfodY/Q/WqKceA948ZzJpTHBhv2Bc9gQ== X-Received: by 2002:a17:906:194f:b0:6ce:3670:92b with SMTP id b15-20020a170906194f00b006ce3670092bmr19235863eje.737.1645541983264; Tue, 22 Feb 2022 06:59:43 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:42 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 02/15] dt-bindings: ufs: samsung,exynos-ufs: use common bindings Date: Tue, 22 Feb 2022 15:58:41 +0100 Message-Id: <20220222145854.358646-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Use common UFS bindings in Samsung Exynos UFS to cover generic/common properties in DTS. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml index 95ac1c18334d..c949eb617313 100644 --- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml @@ -11,12 +11,11 @@ maintainers: description: | Each Samsung UFS host controller instance should have its own node. - This binding define Samsung specific binding other then what is used - in the common ufshcd bindings - [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt -properties: +allOf: + - $ref: ufs-common.yaml +properties: compatible: enum: - samsung,exynos7-ufs @@ -47,9 +46,6 @@ properties: - const: core_clk - const: sclk_unipro_main - interrupts: - maxItems: 1 - phys: maxItems: 1 @@ -67,13 +63,12 @@ properties: required: - compatible - reg - - interrupts - phys - phy-names - clocks - clock-names -additionalProperties: false +unevaluatedProperties: false examples: - | From patchwork Tue Feb 22 14:58:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755336 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74A6BC35272 for ; Tue, 22 Feb 2022 14:59:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233029AbiBVPAP (ORCPT ); Tue, 22 Feb 2022 10:00:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233028AbiBVPAM (ORCPT ); Tue, 22 Feb 2022 10:00:12 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9EF3810CF39 for ; Tue, 22 Feb 2022 06:59:46 -0800 (PST) Received: from mail-ej1-f71.google.com (mail-ej1-f71.google.com [209.85.218.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 64F6540812 for ; Tue, 22 Feb 2022 14:59:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645541985; bh=hSZ7F8gBRrOjsQXCC6rZDxcT9sE5F7qcCO45OrXZ8Og=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=M6q4YCJdSZGLfQGPec74ObcfZgDcbTGX8FgTnNi+/3vNvtCTcFgcKXof60+MJMqPt KPdGnwKM76k7IioY8ToG7duEfYa+dG6lZfF1xmb0W6JzRVPQPbEYs3AHxJwrD4B4I9 eO2abUBJQ5CmSHRxfzB1jyY00rhJiZy0Yy2KLLNlkS1CGt7a5FZcpYvAxcgm9frG4X jA+BEk0M+6D3xlz7ecmL2caXsApeP35RS7IkgXJSsDwedPxjVywqY9otOvEmgiRoKH an7Yh3t0Qu+6JNm3YJWc0KzjMpZqVNnYfVOtlrspHVjKdXdlt19W41zccdVzqFkBzY SwGGW20Zd6hnA== Received: by mail-ej1-f71.google.com with SMTP id qf24-20020a1709077f1800b006ce8c140d3dso5872369ejc.18 for ; Tue, 22 Feb 2022 06:59:45 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hSZ7F8gBRrOjsQXCC6rZDxcT9sE5F7qcCO45OrXZ8Og=; b=g64PcYHsVUfopvw7Z/wKKSxsy4H9ETg4DXh1wQO5WswpfAwbdMtodirIy9zxABwGnv hSx25rhdlInrBH40gIwwaHohh7K1+bWLawBYW3RDJ7jtfJDe9rt9PWcGVX4UbmsGSyQv gI347r6Ow8/HzV8DZegKE0gg2cGrqb/25/UJKdSNARcy4+AdNsl0gufBmcfi72a5/3l3 MsC/sguz7My9ylrvH5e8cDM+yj9rEJXkMh+P6/8wKP99mQY+X3yUrvv6HFeOklQC2mPj JjoT3jD6TGJh0JxyO2nQX5M27NAqhQ0cePz1M19f6ehCxyGXoVDRU5ZMYHAcgWgbBbqs XXCA== X-Gm-Message-State: AOAM531avJlt6Sn0UNGiXdWQw5GTLOSu26mvIlcSAF8i52Mf6RItEOa3 x6pLsP8mK2RWuNAfsfd3lvwpIrw1jk/YNnTGhh4SfqiggBc7J2iViuvvQqU72mvOyvKd5cNJc9I r39HNcSDcfXmuTsjf3KujqEVb2CqRSyTXM2pcwgs= X-Received: by 2002:a17:906:b351:b0:6ca:8d27:526a with SMTP id cd17-20020a170906b35100b006ca8d27526amr20328737ejb.289.1645541984768; Tue, 22 Feb 2022 06:59:44 -0800 (PST) X-Google-Smtp-Source: ABdhPJxWI4axJkVwBbmPapLPc5fCL1iXsNaaZjBGwawNt2yW9KIZGUlWJR52lTA7TnshFvIcz51bMQ== X-Received: by 2002:a17:906:b351:b0:6ca:8d27:526a with SMTP id cd17-20020a170906b35100b006ca8d27526amr20328714ejb.289.1645541984504; Tue, 22 Feb 2022 06:59:44 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:44 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 03/15] dt-bindings: ufs: cdns,ufshc: convert to dtschema Date: Tue, 22 Feb 2022 15:58:42 +0100 Message-Id: <20220222145854.358646-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema format. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 --------- .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++ .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +- 3 files changed, 71 insertions(+), 36 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt deleted file mode 100644 index 02347b017abd..000000000000 --- a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt +++ /dev/null @@ -1,32 +0,0 @@ -* Cadence Universal Flash Storage (UFS) Controller - -UFS nodes are defined to describe on-chip UFS host controllers. -Each UFS controller instance should have its own node. -Please see the ufshcd-pltfrm.txt for a list of all available properties. - -Required properties: -- compatible : Compatible list, contains one of the following controllers: - "cdns,ufshc" - Generic CDNS HCI, - "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY - complemented with the JEDEC version: - "jedec,ufs-2.0" - -- reg : Address and length of the UFS register set. -- interrupts : One interrupt mapping. -- freq-table-hz : Clock frequency table. - See the ufshcd-pltfrm.txt for details. -- clocks : List of phandle and clock specifier pairs. -- clock-names : List of clock input name strings sorted in the same - order as the clocks property. "core_clk" is mandatory. - Depending on a type of a PHY, - the "phy_clk" clock can also be added, if needed. - -Example: - ufs@fd030000 { - compatible = "cdns,ufshc", "jedec,ufs-2.0"; - reg = <0xfd030000 0x10000>; - interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>; - freq-table-hz = <0 0>, <0 0>; - clocks = <&ufs_core_clk>, <&ufs_phy_clk>; - clock-names = "core_clk", "phy_clk"; - }; diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml new file mode 100644 index 000000000000..59588914ec76 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence Universal Flash Storage (UFS) Controller + +maintainers: + - Jan Kotas + +# Select only our matches, not all jedec,ufs-2.0 +select: + properties: + compatible: + contains: + enum: + - cdns,ufshc + - cdns,ufshc-m31-16nm + required: + - compatible + +allOf: + - $ref: ufs-common.yaml + +properties: + compatible: + items: + - enum: + - cdns,ufshc + # CDNS UFS HC + M31 16nm PHY + - cdns,ufshc-m31-16nm + - const: jedec,ufs-2.0 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + items: + - const: core_clk + - const: phy_clk + - const: ref_clk + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - clock-names + - reg + +unevaluatedProperties: false + +examples: + - | + #include + + ufs@fd030000 { + compatible = "cdns,ufshc", "jedec,ufs-2.0"; + reg = <0xfd030000 0x10000>; + interrupts = ; + freq-table = <0 0>, <0 0>; + clocks = <&ufs_core_clk>, <&ufs_phy_clk>; + clock-names = "core_clk", "phy_clk"; + }; diff --git a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml index dc93fe2d3458..6cb0001e6a58 100644 --- a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml @@ -47,11 +47,10 @@ required: patternProperties: "^ufs@[0-9a-f]+$": - type: object + $ref: cdns,ufshc.yaml description: | - Cadence UFS controller node must be the child node. Refer - Documentation/devicetree/bindings/ufs/cdns,ufshc.txt for binding - documentation of child node + Cadence UFS controller node must be the child node. + unevaluatedProperties: false additionalProperties: false From patchwork Tue Feb 22 14:58:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755337 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54052C433F5 for ; Tue, 22 Feb 2022 14:59:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233079AbiBVPAV (ORCPT ); Tue, 22 Feb 2022 10:00:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231425AbiBVPAN (ORCPT ); Tue, 22 Feb 2022 10:00:13 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C17AB10DA63 for ; Tue, 22 Feb 2022 06:59:47 -0800 (PST) Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 8B8F23FCA4 for ; Tue, 22 Feb 2022 14:59:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645541986; bh=QS6C0GzUsESFnOlW679wMJjG5Id453GO4JtPx943Lak=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MVpTjeTFfq2YaJeNybJBjKmcms2z4Y9uqW33q99pgyfvkVVqxC8VqZoS78b2KT7cC Q7aA/nerYZRDXv10Oj4qwdEhZAV471yti6bNd9310rVP/TJSfxFDGYmHaN5ioAKfuY +PcFkovR9X5mOLU5Lo2kR6OpWcHYI25sMWHhm9c2/Wx0ky+cbYl7vyZBtu8PRJijvc gyNe+lNz0ydAyKsskca3EUpXULO+LyP5i2VK6MW2y4JI0sfWZ30uZOi2jbJkD1oi6G WEWOjM0m3RIYEzCTtknjygYTbQartZGzOjmw23ZWmnQht5nb/4XJ59nyM+G8XNXh8w FA1g4qwhbaZkA== Received: by mail-ej1-f72.google.com with SMTP id mp5-20020a1709071b0500b0069f2ba47b20so5803080ejc.19 for ; Tue, 22 Feb 2022 06:59:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QS6C0GzUsESFnOlW679wMJjG5Id453GO4JtPx943Lak=; b=X9A78Y8xEBJiexkpPMLQf1FiTtf6GnxgH7OPJygqAiAaSwFaCQsu4xWipXknMNBtOr 8L4mWQRM/+/iGaRCVKWKB+RjDXOcUwLbtGUWYCXnt/DiMbZ1lC15Pch/w7jtSHrOeTlj rY0faAIxIbY1RzMDtwni615HrgF3BTxB1n+N6UoViLPf3w+An3Au/6FAB0k4Rd4csQHP 1aI4v5kiswKoW52QQPHZjeOPk7ANfpWb/i0Hbi2Und7xEv1vlYkK3+ryDfH2XQSnF+qo suE/Pf53QhnqH2gSbL6rNwt8HgWC1vRaTlb2FHJs/gThrahAOTMLPQg71VxPhZp8bKU8 tQoA== X-Gm-Message-State: AOAM531mVM3E+umfxfO1qePUVlbY/2O4NKcG7Q9qyEMSssV49czIvGkM RT/KTU4B0HvRzTImOU4LLOnf9DqDCCMF2IITB9PxiH6dcLuAK67OUuJZ384w+cc2sGQxjAIqFul QFq6ktAA2rM3AllCLtidI8G1YKLGXWGqXFgVlDKg= X-Received: by 2002:aa7:df12:0:b0:410:a50b:de00 with SMTP id c18-20020aa7df12000000b00410a50bde00mr26955898edy.2.1645541986229; Tue, 22 Feb 2022 06:59:46 -0800 (PST) X-Google-Smtp-Source: ABdhPJxLhBfWrLlHym0osIm6uJ6NjAAfcWJy5tog0t5Nfvn14lcOwLiw9f5Pm3zKcbnRxuKypKbKmg== X-Received: by 2002:aa7:df12:0:b0:410:a50b:de00 with SMTP id c18-20020aa7df12000000b00410a50bde00mr26955872edy.2.1645541986043; Tue, 22 Feb 2022 06:59:46 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:45 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 04/15] dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings Date: Tue, 22 Feb 2022 15:58:43 +0100 Message-Id: <20220222145854.358646-5-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The Qualcomm UFS PHY bindings are documented in bindings/phy/qcom,qmp-phy.yaml and the compatibles from separate file bindings/ufs/ufs-qcom.txt are not used at all. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Bjorn Andersson Reviewed-by: Rob Herring --- .../devicetree/bindings/ufs/ufs-qcom.txt | 63 ------------------- 1 file changed, 63 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt diff --git a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt deleted file mode 100644 index fd59f93e9556..000000000000 --- a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt +++ /dev/null @@ -1,63 +0,0 @@ -* Qualcomm Technologies Inc Universal Flash Storage (UFS) PHY - -UFSPHY nodes are defined to describe on-chip UFS PHY hardware macro. -Each UFS PHY node should have its own node. - -To bind UFS PHY with UFS host controller, the controller node should -contain a phandle reference to UFS PHY node. - -Required properties: -- compatible : compatible list, contains one of the following - - "qcom,ufs-phy-qmp-20nm" for 20nm ufs phy, - "qcom,ufs-phy-qmp-14nm" for legacy 14nm ufs phy, - "qcom,msm8996-ufs-phy-qmp-14nm" for 14nm ufs phy - present on MSM8996 chipset. -- reg : should contain PHY register address space (mandatory), -- reg-names : indicates various resources passed to driver (via reg proptery) by name. - Required "reg-names" is "phy_mem". -- #phy-cells : This property shall be set to 0 -- vdda-phy-supply : phandle to main PHY supply for analog domain -- vdda-pll-supply : phandle to PHY PLL and Power-Gen block power supply -- clocks : List of phandle and clock specifier pairs -- clock-names : List of clock input name strings sorted in the same - order as the clocks property. "ref_clk_src", "ref_clk", - "tx_iface_clk" & "rx_iface_clk" are mandatory but - "ref_clk_parent" is optional - -Optional properties: -- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply -- vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply -- vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply -- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply -- resets : specifies the PHY reset in the UFS controller - -Example: - - ufsphy1: ufsphy@fc597000 { - compatible = "qcom,ufs-phy-qmp-20nm"; - reg = <0xfc597000 0x800>; - reg-names = "phy_mem"; - #phy-cells = <0>; - vdda-phy-supply = <&pma8084_l4>; - vdda-pll-supply = <&pma8084_l12>; - vdda-phy-max-microamp = <50000>; - vdda-pll-max-microamp = <1000>; - clock-names = "ref_clk_src", - "ref_clk_parent", - "ref_clk", - "tx_iface_clk", - "rx_iface_clk"; - clocks = <&clock_rpm clk_ln_bb_clk>, - <&clock_gcc clk_pcie_1_phy_ldo >, - <&clock_gcc clk_ufs_phy_ldo>, - <&clock_gcc clk_gcc_ufs_tx_cfg_clk>, - <&clock_gcc clk_gcc_ufs_rx_cfg_clk>; - resets = <&ufshc 0>; - }; - - ufshc: ufshc@fc598000 { - #reset-cells = <1>; - ... - phys = <&ufsphy1>; - phy-names = "ufsphy"; - }; From patchwork Tue Feb 22 14:58:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 916A2C433FE for ; Tue, 22 Feb 2022 15:01:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230280AbiBVPBr (ORCPT ); Tue, 22 Feb 2022 10:01:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230465AbiBVPBM (ORCPT ); Tue, 22 Feb 2022 10:01:12 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71FC310EC63 for ; Tue, 22 Feb 2022 07:00:07 -0800 (PST) Received: from mail-lj1-f199.google.com (mail-lj1-f199.google.com [209.85.208.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 3026040A7F for ; Tue, 22 Feb 2022 15:00:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645542003; bh=9Z/gUO3emhqiJ98zvVrvKJB3hrfUgVCYAuQOA838jTk=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=wFNAP0Pss6OwlK9h9Q+a1UqIDvnqh1Y6BRqlVE6car3URnZS/F482V2gcwssCOIPz abg9WkCpTbQYvXoXTdaEiPC5H6lQ2JJWk/LD6d4SyHkTgnS2JEcN85d0YTFC53CWfk 0a8V4sXmVA/qzcze74jrAM07gLr3mx7k8lpZK/P0K4SBON957dVsbAIbgGrmOCfqYf wcYoEEopEsz7yfTwQOkcVABd90GoC0a4UmV10RjHiZjH6u+W2F330uABZGI2DeWXTe /FLkxWEwMmjkgVhYW4zVa3kEhFg8GYZGDT0qTU2CZLgCBOwrcxur3LScfVYB6JsgWy HIU7wj7T/7iAw== Received: by mail-lj1-f199.google.com with SMTP id r27-20020a2e575b000000b002463f43ca0aso3245321ljd.7 for ; Tue, 22 Feb 2022 07:00:03 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9Z/gUO3emhqiJ98zvVrvKJB3hrfUgVCYAuQOA838jTk=; b=R6T0rYx4gYbVpqCpq23/kL3Zzq2zI3enzfl/khUfYZHGpLSnid0eM7CBWD3bq2oAjO tMqYICnQ+yr3qIK5DhMsay97X9XDBFv9C+hAo5kh8fVnyMBM49MPgXBUYt3aaHcMDjOP zY5hJuzCjUjPaWMfHJvUJZvRW1aOafqQFWo5+f9Lo00mlLbJQ+d1Qqxp8uvZJjjkioCN /Tm8qg3x7gyCiWIzkpRlWeHMBy1ws+fKGIw6/CV+AXAgVsCkbkxrLXJftc9hUE6b9u5t SKA3KY2XpgFRMSJ+vowERnOMwr28P25B2DdtXI4RQB/6D8aOuiXsyeiv2bcUJcGnexg3 QDCg== X-Gm-Message-State: AOAM530K1G6xaW2VYJZ+LkQymSYLIxmR/hqAyQIXnQcwxLeYc85rzbJV lEhST6e2FRsDx0MHpKhXsZMnb7goUpEF6UIM8zMOo0PDs3i3I1z3hH0ZKorE8Zzy3gOvRyU7iWg vaAulp3ZZMGErhX78yNnNgi+UYASDXP+k3PWQqhs= X-Received: by 2002:a05:6402:142b:b0:413:2b86:7af2 with SMTP id c11-20020a056402142b00b004132b867af2mr1901150edx.102.1645541988118; Tue, 22 Feb 2022 06:59:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJyLoou8nQRCRNv0hciFigbFDL4utuXOvFr5Y0azz8QSvrtmGP0Fc4h2u6qFAcuNpGyebFoevw== X-Received: by 2002:a05:6402:142b:b0:413:2b86:7af2 with SMTP id c11-20020a056402142b00b004132b867af2mr1901119edx.102.1645541987825; Tue, 22 Feb 2022 06:59:47 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:47 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 05/15] dt-bindings: ufs: qcom,ufs: convert to dtschema Date: Tue, 22 Feb 2022 15:58:44 +0100 Message-Id: <20220222145854.358646-6-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Convert the Qualcomm Universal Flash Storage (UFS) Controller to DT schema format. Except the conversion, add also properties already present in DTS: iommus, interconnects and power-domains. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../devicetree/bindings/ufs/qcom,ufs.yaml | 241 ++++++++++++++++++ .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 ------- 2 files changed, 241 insertions(+), 90 deletions(-) create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml new file mode 100644 index 000000000000..356217124222 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -0,0 +1,241 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Universal Flash Storage (UFS) Controller + +maintainers: + - Yaniv Gardi + +# Select only our matches, not all jedec,ufs-2.0 +select: + properties: + compatible: + contains: + const: qcom,ufshc + required: + - compatible + +properties: + compatible: + items: + - enum: + - qcom,msm8994-ufshc + - qcom,msm8996-ufshc + - qcom,msm8998-ufshc + - qcom,sdm845-ufshc + - qcom,sm8150-ufshc + - qcom,sm8250-ufshc + - qcom,sm8350-ufshc + - qcom,sm8450-ufshc + - const: qcom,ufshc + - const: jedec,ufs-2.0 + + clocks: + minItems: 8 + maxItems: 11 + + clock-names: + minItems: 8 + maxItems: 11 + + interconnects: + minItems: 2 + maxItems: 2 + + interconnect-names: + items: + - const: ufs-ddr + - const: cpu-ufs + + iommus: + minItems: 1 + maxItems: 2 + + phys: + maxItems: 1 + + phy-names: + items: + - const: ufsphy + + power-domains: + maxItems: 1 + + reg: + minItems: 1 + maxItems: 2 + + resets: + maxItems: 1 + + '#reset-cells': + const: 1 + + reset-names: + items: + - const: rst + + reset-gpios: + maxItems: 1 + description: + GPIO connected to the RESET pin of the UFS memory device. + +required: + - compatible + - reg + +allOf: + - $ref: ufs-common.yaml + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8998-ufshc + - qcom,sm8250-ufshc + - qcom,sm8350-ufshc + - qcom,sm8450-ufshc + then: + properties: + clocks: + minItems: 8 + maxItems: 8 + clock-names: + items: + - const: core_clk + - const: bus_aggr_clk + - const: iface_clk + - const: core_clk_unipro + - const: ref_clk + - const: tx_lane0_sync_clk + - const: rx_lane0_sync_clk + - const: rx_lane1_sync_clk + reg: + minItems: 1 + maxItems: 1 + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm845-ufshc + - qcom,sm8150-ufshc + then: + properties: + clocks: + minItems: 9 + maxItems: 9 + clock-names: + items: + - const: core_clk + - const: bus_aggr_clk + - const: iface_clk + - const: core_clk_unipro + - const: ref_clk + - const: tx_lane0_sync_clk + - const: rx_lane0_sync_clk + - const: rx_lane1_sync_clk + - const: ice_core_clk + reg: + minItems: 2 + maxItems: 2 + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8996-ufshc + then: + properties: + clocks: + minItems: 11 + maxItems: 11 + clock-names: + items: + - const: core_clk_src + - const: core_clk + - const: bus_clk + - const: bus_aggr_clk + - const: iface_clk + - const: core_clk_unipro_src + - const: core_clk_unipro + - const: core_clk_ice + - const: ref_clk + - const: tx_lane0_sync_clk + - const: rx_lane0_sync_clk + reg: + minItems: 1 + maxItems: 1 + + # TODO: define clock bindings for qcom,msm8994-ufshc + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + ufs@1d84000 { + compatible = "qcom,sm8450-ufshc", "qcom,ufshc", + "jedec,ufs-2.0"; + reg = <0 0x01d84000 0 0x3000>; + interrupts = ; + phys = <&ufs_mem_phy_lanes>; + phy-names = "ufsphy"; + lanes-per-direction = <2>; + #reset-cells = <1>; + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l7b_2p5>; + vcc-max-microamp = <1100000>; + vccq-supply = <&vreg_l9b_1p2>; + vccq-max-microamp = <1200000>; + + power-domains = <&gcc UFS_PHY_GDSC>; + iommus = <&apps_smmu 0xe0 0x0>; + interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>, + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>; + interconnect-names = "ufs-ddr", "cpu-ufs"; + + clock-names = "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "rx_lane1_sync_clk"; + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; + freq-table = <75000000 300000000>, + <0 0>, + <0 0>, + <75000000 300000000>, + <75000000 300000000>, + <0 0>, + <0 0>, + <0 0>; + }; + }; diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt deleted file mode 100644 index d0fee78e6203..000000000000 --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +++ /dev/null @@ -1,90 +0,0 @@ -* Universal Flash Storage (UFS) Host Controller - -UFSHC nodes are defined to describe on-chip UFS host controllers. -Each UFS controller instance should have its own node. - -Required properties: -- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0" - - For Qualcomm SoCs must contain, as below, an - SoC-specific compatible along with "qcom,ufshc" and - the appropriate jedec string: - "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0" - "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0" - "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0" - "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0" - "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0" - "qcom,sm8250-ufshc", "qcom,ufshc", "jedec,ufs-2.0" - "qcom,sm8350-ufshc", "qcom,ufshc", "jedec,ufs-2.0" - "qcom,sm8450-ufshc", "qcom,ufshc", "jedec,ufs-2.0" -- interrupts : -- reg : - -Optional properties: -- phys : phandle to UFS PHY node -- phy-names : the string "ufsphy" when is found in a node, along - with "phys" attribute, provides phandle to UFS PHY node -- vdd-hba-supply : phandle to UFS host controller supply regulator node -- vcc-supply : phandle to VCC supply regulator node -- vccq-supply : phandle to VCCQ supply regulator node -- vccq2-supply : phandle to VCCQ2 supply regulator node -- vcc-supply-1p8 : For embedded UFS devices, valid VCC range is 1.7-1.95V - or 2.7-3.6V. This boolean property when set, specifies - to use low voltage range of 1.7-1.95V. Note for external - UFS cards this property is invalid and valid VCC range is - always 2.7-3.6V. -- vcc-max-microamp : specifies max. load that can be drawn from vcc supply -- vccq-max-microamp : specifies max. load that can be drawn from vccq supply -- vccq2-max-microamp : specifies max. load that can be drawn from vccq2 supply - -- clocks : List of phandle and clock specifier pairs -- clock-names : List of clock input name strings sorted in the same - order as the clocks property. - "ref_clk" indicates reference clock frequency. - UFS host supplies reference clock to UFS device and UFS device - specification allows host to provide one of the 4 frequencies (19.2 MHz, - 26 MHz, 38.4 MHz, 52MHz) for reference clock. This "ref_clk" entry is - parsed and used to update the reference clock setting in device. - Defaults to 26 MHz(as per specification) if not specified by host. -- freq-table-hz : Array of operating frequencies stored in the same - order as the clocks property. If this property is not - defined or a value in the array is "0" then it is assumed - that the frequency is set by the parent clock or a - fixed rate clock source. --lanes-per-direction : number of lanes available per direction - either 1 or 2. - Note that it is assume same number of lanes is used both - directions at once. If not specified, default is 2 lanes per direction. -- #reset-cells : Must be <1> for Qualcomm UFS controllers that expose - PHY reset from the UFS controller. -- resets : reset node register -- reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP. -- reset-gpios : A phandle and gpio specifier denoting the GPIO connected - to the RESET pin of the UFS memory device. - -Note: If above properties are not defined it can be assumed that the supply -regulators or clocks are always on. - -Example: - ufshc@fc598000 { - compatible = "jedec,ufs-1.1"; - reg = <0xfc598000 0x800>; - interrupts = <0 28 0>; - - vdd-hba-supply = <&xxx_reg0>; - vcc-supply = <&xxx_reg1>; - vcc-supply-1p8; - vccq-supply = <&xxx_reg2>; - vccq2-supply = <&xxx_reg3>; - vcc-max-microamp = 500000; - vccq-max-microamp = 200000; - vccq2-max-microamp = 200000; - - clocks = <&core 0>, <&ref 0>, <&phy 0>, <&iface 0>; - clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk"; - freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>; - resets = <&reset 0 1>; - reset-names = "rst"; - phys = <&ufsphy1>; - phy-names = "ufsphy"; - #reset-cells = <1>; - }; From patchwork Tue Feb 22 14:58:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA979C433FE for ; Tue, 22 Feb 2022 15:00:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233227AbiBVPBX (ORCPT ); Tue, 22 Feb 2022 10:01:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233153AbiBVPAz (ORCPT ); Tue, 22 Feb 2022 10:00:55 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7210810EC64 for ; Tue, 22 Feb 2022 07:00:07 -0800 (PST) Received: from mail-ej1-f71.google.com (mail-ej1-f71.google.com [209.85.218.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 14F224081F for ; Tue, 22 Feb 2022 15:00:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645542004; bh=4tGOeE6Vpb8oaNs+KDz1VN9VoEsDCHdqvyHLI/+JDW4=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ALik62sPwpWS8Za7g28B/yBGI06HBnLIOmai/vfihXTxsduCD9tz7Tgq0rsZ/vZNp DiYEgnqcURBxa+AeWiF0/Z0cyr7hI36CPUcSJdN8q+itWWMjNHW5WpY6STN8bTart7 /sQbX6h7DKkRlICIPseSiEpS8i6xggvy9AJ0cZwLSCRpuH9FREq7bPf2oxDkRKRZDl 4ftnirG+lAiKjC3ZrJh50T9V7gJsiMzxzr+wXb3QItrSxy7E16/tC3H2XeTnvLA07E ZCKHWElELLmw1Lj2EGqZ0LblLLRAb1aSoa+bKDzUIn9KOy5ac+8HWLHu+pGFdvEmOu hqXbhbLmiIyhw== Received: by mail-ej1-f71.google.com with SMTP id o22-20020a1709061d5600b006d1aa593787so1979485ejh.0 for ; Tue, 22 Feb 2022 07:00:04 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4tGOeE6Vpb8oaNs+KDz1VN9VoEsDCHdqvyHLI/+JDW4=; b=2gOlrE5VxH8z28QNxFfjDP2rdob2dAKHdnr/antG1/R3C2+b6Eg7Vi/CtIsPvpiDbB v1VvZHXZ1p7J9ETRSYDdqiUshd6tSU/m2bOztcpD6pakGaVw+9mDDM6m1VRMliyn67vU GjPyRrWnfC7Kst6IGazPzw/afM2hfE+oR+9mU0Ltz0ww6sjQUCjQc8ORaTYZsNBt45hi Dzm9vsE0aw6u5debgkotbx+3+gxTCjMq/X+Gi0wFub6JLzC4JFSvUBZ+zwK6iZGGY6mt /8T2Gr1geF5rp77VChHJAVFVQsdiRiTlannRAaatXtgGW2+0umTkqjU+MpoD0hdyjpbx hWtw== X-Gm-Message-State: AOAM533LFy9Htw8xtggHJHcBvTUOIUgFEbxr470lxLgAdvGWn6qjzBku HfJ51dFp1+y9yQSO9bGYY4Q769IEJZlN3zIc4BM81LazQ8AF1m3A/MgZOyMWKvT2Bph6Bl6VAYK nfUm5gnj8BnbRVtgx5xYfJSNJnc3l0JS+U92BV/E= X-Received: by 2002:aa7:cfda:0:b0:410:aaaa:320 with SMTP id r26-20020aa7cfda000000b00410aaaa0320mr26911190edy.360.1645541989561; Tue, 22 Feb 2022 06:59:49 -0800 (PST) X-Google-Smtp-Source: ABdhPJxh7yewuGQzlFhBRvYx0VSbUW/aGZFnH2j0pyBL985ZqnUYO1c9cthLLmadhlhhpXgOFIy8rw== X-Received: by 2002:aa7:cfda:0:b0:410:aaaa:320 with SMTP id r26-20020aa7cfda000000b00410aaaa0320mr26911156edy.360.1645541989384; Tue, 22 Feb 2022 06:59:49 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:48 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 06/15] dt-bindings: ufs: hisilicon,ufs: convert to dtschema Date: Tue, 22 Feb 2022 15:58:45 +0100 Message-Id: <20220222145854.358646-7-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Convert the HiSilicon Universal Flash Storage (UFS) Controller to DT schema format. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++++++++++++++ .../devicetree/bindings/ufs/ufs-hisi.txt | 42 --------- 2 files changed, 90 insertions(+), 42 deletions(-) create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt diff --git a/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml b/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml new file mode 100644 index 000000000000..3e3bf7d2df55 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/hisilicon,ufs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon Universal Flash Storage (UFS) Controller + +maintainers: + - Li Wei + +# Select only our matches, not all jedec,ufs +select: + properties: + compatible: + contains: + enum: + - hisilicon,hi3660-ufs + - hisilicon,hi3670-ufs + required: + - compatible + +allOf: + - $ref: ufs-common.yaml + +properties: + compatible: + oneOf: + - items: + - const: hisilicon,hi3660-ufs + - const: jedec,ufs-1.1 + - items: + - enum: + - hisilicon,hi3670-ufs + - const: jedec,ufs-2.1 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: ref_clk + - const: phy_clk + + reg: + items: + - description: UFS register address space + - description: UFS SYS CTRL register address space + + resets: + maxItems: 1 + + reset-names: + items: + - const: rst + +required: + - compatible + - reg + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + ufs@ff3c0000 { + compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1"; + reg = <0x0 0xff3c0000 0x0 0x1000>, + <0x0 0xff3e0000 0x0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>, + <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>; + clock-names = "ref_clk", "phy_clk"; + freq-table = <0 0>, + <0 0>; + + resets = <&crg_rst 0x84 12>; + reset-names = "rst"; + }; + }; diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt deleted file mode 100644 index 0b83df1a5418..000000000000 --- a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt +++ /dev/null @@ -1,42 +0,0 @@ -* Hisilicon Universal Flash Storage (UFS) Host Controller - -UFS nodes are defined to describe on-chip UFS hardware macro. -Each UFS Host Controller should have its own node. - -Required properties: -- compatible : compatible list, contains one of the following - - "hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs - host controller present on Hi3660 chipset. - "hisilicon,hi3670-ufs", "jedec,ufs-2.1" for hisi ufs - host controller present on Hi3670 chipset. -- reg : should contain UFS register address space & UFS SYS CTRL register address, -- interrupts : interrupt number -- clocks : List of phandle and clock specifier pairs -- clock-names : List of clock input name strings sorted in the same - order as the clocks property. "ref_clk", "phy_clk" is optional -- freq-table-hz : Array of operating frequencies stored in the same - order as the clocks property. If this property is not - defined or a value in the array is "0" then it is assumed - that the frequency is set by the parent clock or a - fixed rate clock source. -- resets : describe reset node register -- reset-names : reset node register, the "rst" corresponds to reset the whole UFS IP. - -Example: - - ufs: ufs@ff3b0000 { - compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1"; - /* 0: HCI standard */ - /* 1: UFS SYS CTRL */ - reg = <0x0 0xff3b0000 0x0 0x1000>, - <0x0 0xff3b1000 0x0 0x1000>; - interrupt-parent = <&gic>; - interrupts = ; - clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>, - <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>; - clock-names = "ref_clk", "phy_clk"; - freq-table-hz = <0 0>, <0 0>; - /* offset: 0x84; bit: 12 */ - resets = <&crg_rst 0x84 12>; - reset-names = "rst"; - }; From patchwork Tue Feb 22 14:58:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755338 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADFF0C4332F for ; Tue, 22 Feb 2022 15:00:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233082AbiBVPAp (ORCPT ); Tue, 22 Feb 2022 10:00:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233053AbiBVPAa (ORCPT ); Tue, 22 Feb 2022 10:00:30 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E4A010E064 for ; Tue, 22 Feb 2022 06:59:53 -0800 (PST) Received: from mail-ej1-f71.google.com (mail-ej1-f71.google.com [209.85.218.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id E22BE40253 for ; Tue, 22 Feb 2022 14:59:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645541991; bh=1P7qQVIntzoTj3/oLgMEwV7rKt1l7cL2m41gmrqktTo=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bU6JK5adMWxlJBra+LF0Ror6FdImeaukVNNCrbw3yE8hwL6RUZK2oBpGpbE2I4J0G T1n1jVbzQQD+SMc/12x4kD/z7afsVR27irY4K4IKMH08Sa9bFwWMisBQ2tr8D8RgUf b/MA7aVxpbG2YcjZ1M/MO9FhOJLgQxuJv1MeKx6U6Sa0b5CVpzjs/A4jbxT3PFZijN +I2jlBtUmZy9dmaDmymZtGEbLT9YiPktsa/aQsYOBeSCBVrdpV2eHN92EHRisEd0eN rtQvAzzV0oXWPhv8tOSiIOtNBM0jcCo/J3i0/276sR0g6lUAZGuzbbYBGciyBz3M9d jooZCxqpRkBIA== Received: by mail-ej1-f71.google.com with SMTP id mp5-20020a1709071b0500b0069f2ba47b20so5803199ejc.19 for ; Tue, 22 Feb 2022 06:59:51 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1P7qQVIntzoTj3/oLgMEwV7rKt1l7cL2m41gmrqktTo=; b=FHEDbDaDPapfTp6XSoJ7bUwUHt+FSUEPk2aXkOfdaYT3Bz8in/QoRQVt/qaGkTiXgh Wk7YSWtLcvqk9D+j/uaVCyvznGOtpxQeS2ujZ9bIy5gqcYO/e4ceHph/JAqHR0vTchqL wfIiYe9ETkcJFbd6s2Hn55L69LhL1ARK0IW7JbkIgWhxbkukDaqRfeI7tQ4gGA46xtQn ZPP+gLak6o/q0sO21x5VcHysqH/Ni1Gfocg815xzwt3ou258RYq4Rec7CRashP9aQv/v 6l1oLr0QbIyilvB/EeuxNimXwE9cljCeGE2cnScaVHcmPTdpN9gyAULRN+YKovhB6FpS HHzw== X-Gm-Message-State: AOAM532LGoN1sIip6evEq5jfYOULkcJrt6t70BiCLw5cl3wfTaGCI5gQ O0ba1LcF58hexQ/py/KdgnUz2vnxGa1NLCfVAXOnX3+683uv12RnyGiKyCkh0RQGXR2qLW1ksnQ XUoOEU50v6kLrgNDUwhwZmk5STkooix6AHLvkVLA= X-Received: by 2002:a50:e04e:0:b0:410:d961:523a with SMTP id g14-20020a50e04e000000b00410d961523amr27317295edl.223.1645541991396; Tue, 22 Feb 2022 06:59:51 -0800 (PST) X-Google-Smtp-Source: ABdhPJyUtYJeXKFR/3UPBCev0P+VF4C8MI1ryF08nvFtYgouje4ha2q2QFFwRqFjiPr36iU06TskIg== X-Received: by 2002:a50:e04e:0:b0:410:d961:523a with SMTP id g14-20020a50e04e000000b00410d961523amr27317282edl.223.1645541991213; Tue, 22 Feb 2022 06:59:51 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:50 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 07/15] dt-bindings: ufs: mediatek,ufs: convert to dtschema Date: Tue, 22 Feb 2022 15:58:46 +0100 Message-Id: <20220222145854.358646-8-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Convert the Mediatek Universal Flash Storage (UFS) Controller to DT schema format. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++++++++++++++++ .../devicetree/bindings/ufs/ufs-mediatek.txt | 45 ------------- 2 files changed, 67 insertions(+), 45 deletions(-) create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml new file mode 100644 index 000000000000..1cf530b5c57d --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Universal Flash Storage (UFS) Controller + +maintainers: + - Stanley Chu + +allOf: + - $ref: ufs-common.yaml + +properties: + compatible: + enum: + - mediatek,mt8183-ufshci + - mediatek,mt8192-ufshci + + clocks: + maxItems: 1 + + clock-names: + items: + - const: ufs + + phys: + maxItems: 1 + + reg: + maxItems: 1 + + vcc-supply: true + +required: + - compatible + - clocks + - clock-names + - phys + - reg + - vcc-supply + +unevaluatedProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + ufs@ff3c0000 { + compatible = "mediatek,mt8183-ufshci"; + reg = <0 0x11270000 0 0x2300>; + interrupts = ; + phys = <&ufsphy>; + + clocks = <&infracfg_ao CLK_INFRA_UFS>; + clock-names = "ufs"; + freq-table = <0 0>; + + vcc-supply = <&mt_pmic_vemc_ldo_reg>; + }; + }; diff --git a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt b/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt deleted file mode 100644 index 63a953b672d2..000000000000 --- a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt +++ /dev/null @@ -1,45 +0,0 @@ -* Mediatek Universal Flash Storage (UFS) Host Controller - -UFS nodes are defined to describe on-chip UFS hardware macro. -Each UFS Host Controller should have its own node. - -To bind UFS PHY with UFS host controller, the controller node should -contain a phandle reference to UFS M-PHY node. - -Required properties for UFS nodes: -- compatible : Compatible list, contains the following controller: - "mediatek,mt8183-ufshci" for MediaTek UFS host controller - present on MT8183 chipsets. - "mediatek,mt8192-ufshci" for MediaTek UFS host controller - present on MT8192 chipsets. -- reg : Address and length of the UFS register set. -- phys : phandle to m-phy. -- clocks : List of phandle and clock specifier pairs. -- clock-names : List of clock input name strings sorted in the same - order as the clocks property. "ufs" is mandatory. - "ufs": ufshci core control clock. -- freq-table-hz : Array of operating frequencies stored in the same - order as the clocks property. If this property is not - defined or a value in the array is "0" then it is assumed - that the frequency is set by the parent clock or a - fixed rate clock source. -- vcc-supply : phandle to VCC supply regulator node. - -Example: - - ufsphy: phy@11fa0000 { - ... - }; - - ufshci@11270000 { - compatible = "mediatek,mt8183-ufshci"; - reg = <0 0x11270000 0 0x2300>; - interrupts = ; - phys = <&ufsphy>; - - clocks = <&infracfg_ao INFRACFG_AO_UFS_CG>; - clock-names = "ufs"; - freq-table-hz = <0 0>; - - vcc-supply = <&mt_pmic_vemc_ldo_reg>; - }; From patchwork Tue Feb 22 14:58:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755339 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60CEBC433EF for ; Tue, 22 Feb 2022 15:00:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233120AbiBVPAt (ORCPT ); Tue, 22 Feb 2022 10:00:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47672 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233002AbiBVPAj (ORCPT ); Tue, 22 Feb 2022 10:00:39 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C14510E073 for ; Tue, 22 Feb 2022 06:59:54 -0800 (PST) Received: from mail-ej1-f71.google.com (mail-ej1-f71.google.com [209.85.218.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 4127D3FCAC for ; Tue, 22 Feb 2022 14:59:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645541993; bh=arKzCg0MYWfR0buWW2cokaDng0neBp5ISe/OJX5gEOA=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=s79/HWjw0vltJG7esBPEesb9PGJmdud05s/1suoumwCsxcDpTrK3cVJNmIfinD40G GS6DW74tBHkQb2T+oyzJr/2wBMpC8rxZfeaCSK8pC7ee6G3B+jGyfsbyhRMyVA9/fJ j3Mx6fIHDQUqbJRcorO+L2pbi0DjA+pFkqTL3pW1W57cll0x221uz+dJdOjGOecSeq Zcd+YMaPoHCsw9BAOpWyCzqUz/S06RUWLfbmDmnjtuqEh7xSBcahtorqz7f5tnW9VP yC6WB318w+IVwh0SIEzKAsAl61s7Dag5OXBwdzeILsxv9i1vhb0G2dPJ+jDk3CQjlC 2X1p7D4pxHj8Q== Received: by mail-ej1-f71.google.com with SMTP id 13-20020a170906328d00b006982d0888a4so5826690ejw.9 for ; Tue, 22 Feb 2022 06:59:53 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=arKzCg0MYWfR0buWW2cokaDng0neBp5ISe/OJX5gEOA=; b=mcTHhCtv6ff11akzTppzAKBCb7Ze9FtsyQenuaQBnuIrv2VCLGNC/NOwZW0CVYFNmO bnjMNjMGZv6CZC5O+0aFKV7RNRhI3cQD2SgZoTEHS/+V9EBQeE7mfpb7RiHptZPoX1pW gb1/OMCQQL+MQJuIcSvUZtTwdL0YA7teHhpxA62bBbgfrVHYf242zI0jGgC+j+QSDbnm gF+mpmUN+A3vLnTdN8GUrHwzYq3hhFyjVYpcfEPj8zil2AUZZkKhY9fAfkY+XRcEXbhV lmL+nUEx8UbhLuGloTlw2+mIP7ouNOwF5ySjpmQsdqiceEE1ViXKNIccBjANSSncMx7S 4omQ== X-Gm-Message-State: AOAM530AzMmsFFKuB27NhPWkZIQCA46OFEqb/X7MxoM++8KoFUHBjvbs lskXmikP0c6ptp3Lh+LgDHhPlUSP2UDIlNhUabeg89aONq/MyFNvSNylK2XOsTXWnZg1HcZgGG2 e0nAGsLnV770LxGIjxCowvEYqf2Yyop0JKMGSm34= X-Received: by 2002:a05:6402:1941:b0:413:2b5f:9074 with SMTP id f1-20020a056402194100b004132b5f9074mr2026077edz.414.1645541992922; Tue, 22 Feb 2022 06:59:52 -0800 (PST) X-Google-Smtp-Source: ABdhPJyuGCh02ChhaQcgWP8AI9k0NhxlMiAPxSs3pga+zesBZndYOMg1ZtIGJuD44dDaZzrGAARhjg== X-Received: by 2002:a05:6402:1941:b0:413:2b5f:9074 with SMTP id f1-20020a056402194100b004132b5f9074mr2026054edz.414.1645541992714; Tue, 22 Feb 2022 06:59:52 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:52 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 08/15] dt-bindings: ufs: snps,tc-dwc-g210: convert to dtschema Date: Tue, 22 Feb 2022 15:58:47 +0100 Message-Id: <20220222145854.358646-9-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Convert the Synopsys Universal Flash Storage (UFS) Controller to DT schema format. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../bindings/ufs/snps,tc-dwc-g210.yaml | 51 +++++++++++++++++++ .../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 ---------- 2 files changed, 51 insertions(+), 26 deletions(-) create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt diff --git a/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml b/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml new file mode 100644 index 000000000000..671a70d95138 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/snps,tc-dwc-g210.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare Universal Flash Storage (UFS) Controller + +maintainers: + - Li Wei + +# Select only our matches, not all jedec,ufs +select: + properties: + compatible: + contains: + enum: + - snps,dwc-ufshcd-1.40a + required: + - compatible + +allOf: + - $ref: ufs-common.yaml + +properties: + compatible: + items: + - enum: + - snps,g210-tc-6.00-20bit + - snps,g210-tc-6.00-40bit + - const: snps,dwc-ufshcd-1.40a + - const: jedec,ufs-2.0 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + ufs@d0000000 { + compatible = "snps,g210-tc-6.00-40bit", + "snps,dwc-ufshcd-1.40a", + "jedec,ufs-2.0"; + reg = <0xd0000000 0x10000>; + interrupts = <24>; + }; diff --git a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt deleted file mode 100644 index 71c0777960e9..000000000000 --- a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt +++ /dev/null @@ -1,26 +0,0 @@ -* Universal Flash Storage (UFS) DesignWare Host Controller - -DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY. -Each UFS controller instance should have its own node. - -Required properties: -- compatible : compatible list must contain the PHY type & version: - "snps,g210-tc-6.00-20bit" - "snps,g210-tc-6.00-40bit" - complemented with the Controller IP version: - "snps,dwc-ufshcd-1.40a" - complemented with the JEDEC version: - "jedec,ufs-1.1" - "jedec,ufs-2.0" - -- reg : -- interrupts : - -Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC: - dwc-ufs@d0000000 { - compatible = "snps,g210-tc-6.00-40bit", - "snps,dwc-ufshcd-1.40a", - "jedec,ufs-2.0"; - reg = < 0xd0000000 0x10000 >; - interrupts = < 24 >; - }; From patchwork Tue Feb 22 14:58:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755340 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CA06C433F5 for ; Tue, 22 Feb 2022 15:00:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233084AbiBVPAv (ORCPT ); Tue, 22 Feb 2022 10:00:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48688 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233059AbiBVPAj (ORCPT ); Tue, 22 Feb 2022 10:00:39 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D194710DA64 for ; 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:53 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 09/15] scsi: ufs: deprecate 'freq-table-hz' property Date: Tue, 22 Feb 2022 15:58:48 +0100 Message-Id: <20220222145854.358646-10-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The 'freq-table-hz' is not correct in DT schema, because '-hz' suffix defines uint32 type, not an array. Therefore deprecate 'freq-table-hz' and use 'freq-table' instead. Signed-off-by: Krzysztof Kozlowski --- drivers/scsi/ufs/ufshcd-pltfrm.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c index 87975d1a21c8..2b192477d158 100644 --- a/drivers/scsi/ufs/ufshcd-pltfrm.c +++ b/drivers/scsi/ufs/ufshcd-pltfrm.c @@ -47,8 +47,9 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) if (cnt <= 0) goto out; - if (!of_get_property(np, "freq-table-hz", &len)) { - dev_info(dev, "freq-table-hz property not specified\n"); + if (!of_get_property(np, "freq-table", &len) || + !of_get_property(np, "freq-table-hz", &len)) { + dev_info(dev, "freq-table property not specified\n"); goto out; } @@ -57,7 +58,7 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) sz = len / sizeof(*clkfreq); if (sz != 2 * cnt) { - dev_err(dev, "%s len mismatch\n", "freq-table-hz"); + dev_err(dev, "%s len mismatch\n", "freq-table"); ret = -EINVAL; goto out; } @@ -69,12 +70,16 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) goto out; } - ret = of_property_read_u32_array(np, "freq-table-hz", + ret = of_property_read_u32_array(np, "freq-table", clkfreq, sz); if (ret && (ret != -EINVAL)) { - dev_err(dev, "%s: error reading array %d\n", - "freq-table-hz", ret); - return ret; + ret = of_property_read_u32_array(np, "freq-table-hz", + clkfreq, sz); + if (ret && (ret != -EINVAL)) { + dev_err(dev, "%s: error reading array %d\n", + "freq-table", ret); + return ret; + } } for (i = 0; i < sz; i += 2) { @@ -99,7 +104,7 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) if (!strcmp(name, "ref_clk")) clki->keep_link_active = true; - dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz", + dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table", clki->min_freq, clki->max_freq, clki->name); list_add_tail(&clki->list, &hba->clk_list_head); } From patchwork Tue Feb 22 14:58:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE641C43219 for ; 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:55 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 10/15] arm64: dts: hi3670: use 'freq-table' in UFS node Date: Tue, 22 Feb 2022 15:58:49 +0100 Message-Id: <20220222145854.358646-11-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The 'freq-table-hz' property is deprecated by UFS bindings. The uint32-array requires also element to be passed within one <> block. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 636c8817df7e..754b3a66ec0d 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -671,8 +671,8 @@ ufs: ufs@ff3c0000 { clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>, <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>; clock-names = "ref_clk", "phy_clk"; - freq-table-hz = <0 0 - 0 0>; + freq-table = <0 0>, + <0 0>; /* offset: 0x84; bit: 12 */ resets = <&crg_rst 0x84 12>; reset-names = "rst"; From patchwork Tue Feb 22 14:58:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E015C433EF for ; Tue, 22 Feb 2022 15:00:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233162AbiBVPBD (ORCPT ); Tue, 22 Feb 2022 10:01:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48726 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233102AbiBVPAl (ORCPT ); Tue, 22 Feb 2022 10:00:41 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26BA910E554 for ; Tue, 22 Feb 2022 06:59:59 -0800 (PST) Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 002D63FCAC for ; Tue, 22 Feb 2022 14:59:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645541998; bh=AXkZYdVX5Zodn+3WZgtIGj/ZSa6Qs/Xzl3ZJQ9geNsQ=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ENcy3AYPdFcEFGtoER2h5QD3vZwZM6W1hH+bG1Hfkvrl8YAgoLoQZeDu/1HfyKAqM iIpWEyV4woCcTKPT9Jj6gzfW8kWpCZhGQyFUM82owgN5jFG7zJDoYPYv2KE69Zy8bV 9iDMfGXnCTHczEOTaB0fv7pMJTdLW+27uxLFxhABckSZBXlHvB8+ko3phuDbrD3D9L pyMTLcthx2y2ImjAxpBEsWBMa8APk+Ys3mWeA/HO3W7r26EEL9S/jaAC4k/JYbXToA bOd90q9E3dQF4ZpHkSmHD81r9GCWyg2NCr8khrb64AkY3kk1RbcMQPyEcbz69XBK72 e8NSrgfrj+54w== Received: by mail-ed1-f70.google.com with SMTP id e10-20020a056402190a00b00410f20467abso12088168edz.14 for ; Tue, 22 Feb 2022 06:59:57 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AXkZYdVX5Zodn+3WZgtIGj/ZSa6Qs/Xzl3ZJQ9geNsQ=; b=aTKg/h4VbKsF0DEy1urGc61INVI4ENlPE6+sjXu1Fl8w+SWzXb5BQhUvvdYahJfRmC vB1paLA9dwGElDp0zKNXPF85TA4og6wdFcBWxWjtArffYerURYPdN1lmTSjRCaVTA46t 6BDTffsrMPwUXD4TAIgWK1D3bfrAjhMLwo2LIddIROjCK2NTrNxDcK6Z2WcS9TxDGMQX zGbLKg+EBI5cla2NUqu77HCBttOjJnkAVkw+zTEVOHs1MDGY0aE7mH+sMdB1uBXSt2SH 2LBD4PMbO6WwUuA4D8G+ygYRPLp1Cm4d1TUD2gV7hW11biDFz8k3BOPe3nVcluXslZqQ cfTw== X-Gm-Message-State: AOAM530JbxyWiHrXO75Q9XP4kGLl0foZ92ObGPyxGxXKTN0gN8XWU+td vi7zjwgEkZbt9h6AgXCMnLTLSuGOTVJ6AyK74kjqhI/ghB0NfDaCZtzvJVB27V8on9kq0gRUJDh 91xHMi4M7PLrXRX8Vasw5hxYELqJ1xJWUK4NtGuA= X-Received: by 2002:aa7:c703:0:b0:410:b96a:6bf with SMTP id i3-20020aa7c703000000b00410b96a06bfmr26705750edq.439.1645541997725; Tue, 22 Feb 2022 06:59:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJwfSFtNX/a3KL4lHPEAhSPb3vHh30FiudcrzDoMBrPmGyj5vo81xOj/2DV7Q8M391vFSdj/vQ== X-Received: by 2002:aa7:c703:0:b0:410:b96a:6bf with SMTP id i3-20020aa7c703000000b00410b96a06bfmr26705712edq.439.1645541997526; Tue, 22 Feb 2022 06:59:57 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:56 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 11/15] arm64: dts: ti: use 'freq-table' in UFS node Date: Tue, 22 Feb 2022 15:58:50 +0100 Message-Id: <20220222145854.358646-12-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The 'freq-table-hz' property is deprecated by UFS bindings. The uint32-array requires also element to be passed within one <> block. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 599861259a30..34aff40c6b8e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1257,7 +1257,9 @@ ufs@4e84000 { compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0"; reg = <0x0 0x4e84000 0x0 0x10000>; interrupts = ; - freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>; + freq-table = <250000000 250000000>, + <19200000 19200000>, + <19200000 19200000>; clocks = <&k3_clks 277 0>, <&k3_clks 277 1>, <&k3_clks 277 1>; clock-names = "core_clk", "phy_clk", "ref_clk"; dma-coherent; From patchwork Tue Feb 22 14:58:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 255B9C433FE for ; Tue, 22 Feb 2022 15:00:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233184AbiBVPBR (ORCPT ); Tue, 22 Feb 2022 10:01:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233113AbiBVPAl (ORCPT ); Tue, 22 Feb 2022 10:00:41 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D26A10E569 for ; Tue, 22 Feb 2022 07:00:01 -0800 (PST) Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id BAB463FCA0 for ; Tue, 22 Feb 2022 14:59:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645541999; bh=1gnJNDJDw/4tQtVmWxy7bj3CuaQdR4fw8lY4W6WZrSM=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=vDelxuptU+1RsiG1XNMnqzPLG68Kj7oOId3FKP6Qllhw7w02zirucPsD5Qz2/vA9G XGYkplyjMue87p17hCQ+9UWAGpDAums+emkOFOdbjAH0oC+JhQvaiCpwTfkk6kEqtB 3WLSNO8EPlD2kyD61lfRUk6L+Dz24Lrgqa296yhvU0b/PuiviHdBt7ecpFIMNPhQWG cDGiiCiAw12/p81NC4nwBm5UvhJaSC9wckuqdwMk7tW4k41LIzI/VRfMQz+O12cv83 iAH4vyCEpoIJBVH3Tan/oM+Y2p84t3Jr7pE6/OZ7Y5m7Rkah2SauARswKccfFakUYR JoN7PYNVf1Zkw== Received: by mail-ej1-f72.google.com with SMTP id kw5-20020a170907770500b006ba314a753eso5848586ejc.21 for ; Tue, 22 Feb 2022 06:59:59 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1gnJNDJDw/4tQtVmWxy7bj3CuaQdR4fw8lY4W6WZrSM=; b=1R16WmSfYsMJnMCyhFO7sxHhP77M2UJmBajy835NU7GWl3SZdAyMpIOW2fw2mky/sw /xYVsWqIdA2TW3se935G+OBCqYRTpTa9v097ofPJG/jowwnAfimebISUmZT7/0BDip54 USkQWsvRyC2pJTczYKNcPLnb1LG/qIshscaAOZNRJIYFWN3EfeSGzSb7q3v2R8v5ipl6 8tApuhGoJ/zpJ3jxTrvWoKSeFvEsakp+kMp1tSG38bh+ErMYE3KjJxyRkjRGZ6C91nY6 onyCbQkpZg1m5fuq9fuvZRpCaMKEFtQgwEErUYGBqePPdm1zWAcNNy9mX1LnOR+t4TWO HpiA== X-Gm-Message-State: AOAM533oAhJkq45jYPNltNvjlRyVIXgkghWPdHD1atFs0JOLUeE9u3+n odstOnE2VcrtM8Updx1mgtpt6DWIekvBkJNAg8FJ/o4v7d2CFCoG14Y5s1j3NA1jp4ebbAXVoLB XP5V2Ez3+ReTe5D/f9+ToUEKgAwz8CNUa7j70oJY= X-Received: by 2002:a17:906:b155:b0:6c9:ea2d:3363 with SMTP id bt21-20020a170906b15500b006c9ea2d3363mr19204650ejb.729.1645541999450; Tue, 22 Feb 2022 06:59:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJz2oukZ+ozjlCm/noxM1LqqYguIfKnFdQpkzhzOSXTFSlmiKD/vXLNfpJoPvuzwYTi07oxrug== X-Received: by 2002:a17:906:b155:b0:6c9:ea2d:3363 with SMTP id bt21-20020a170906b15500b006c9ea2d3363mr19204621ejb.729.1645541999288; Tue, 22 Feb 2022 06:59:59 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 06:59:58 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 12/15] arm64: dts: qcom: use 'freq-table' in UFS node Date: Tue, 22 Feb 2022 15:58:51 +0100 Message-Id: <20220222145854.358646-13-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The 'freq-table-hz' property is deprecated by UFS bindings. The uint32-array requires also element to be passed within one <> block. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c85825ea1623..fad1bbfa1c0a 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1761,7 +1761,7 @@ ufshc: ufshc@624000 { <&rpmcc RPM_SMD_LN_BB_CLK>, <&gcc GCC_UFS_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; - freq-table-hz = + freq-table = <100000000 200000000>, <0 0>, <0 0>, diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 2fda21e810c9..87336c5866c0 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -990,7 +990,7 @@ ufshc: ufshc@1da4000 { <&gcc GCC_UFS_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_RX_SYMBOL_1_CLK>; - freq-table-hz = + freq-table = <50000000 200000000>, <0 0>, <0 0>, diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 0d6286d27dd4..23caa29e7862 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2274,7 +2274,7 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>, <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; - freq-table-hz = + freq-table = <50000000 200000000>, <0 0>, <0 0>, diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index d15fee495238..db2ac197c630 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1782,7 +1782,7 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>, <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; - freq-table-hz = + freq-table = <37500000 300000000>, <0 0>, <0 0>, diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index fdaf303ba047..8c9e3c4ac5ac 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2133,7 +2133,7 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = + freq-table = <37500000 300000000>, <0 0>, <0 0>, diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index d242bab69c2e..a26bd3f13d4a 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -1935,7 +1935,7 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = + freq-table = <75000000 300000000>, <75000000 300000000>, <0 0>, diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 934e29b9e153..edb904b58c0c 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -1398,7 +1398,7 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; - freq-table-hz = + freq-table = <75000000 300000000>, <0 0>, <0 0>, From patchwork Tue Feb 22 14:58:52 2022 Content-Type: text/plain; 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.06.59.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 07:00:00 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 13/15] arm64: dts: qcom: msm8996: drop unsupported UFS vddp-ref-clk-max-microamp Date: Tue, 22 Feb 2022 15:58:52 +0100 Message-Id: <20220222145854.358646-14-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The property vddp-ref-clk-max-microamp (for VDDP ref clk supply which is l25 regulator) is not documented in MSM8996 UFS PHY bindings (qcom,msm8996-qmp-ufs-phy). It is mentioned in the other UFS PHY bindings for qcom,msm8996-ufs-phy-qmp-14nm. The MSM8996-based Xiaomi devices configure l25 regulator in a conflicting way: 1. with maximum 100 uAmp for VDDP ref clk supply of UFS PHY, 2. with maximum 450 mAmp for VCCQ supply of UFS. Since the vddp-ref-clk-max-microamp property is basically not documented for that UFS PHY and has a conflicting values, drop it entirely as it looks like not tested and not used ever. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi index 7a9fcbe9bb31..3ade756e1cd9 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi @@ -341,7 +341,6 @@ &ufsphy { vdda-pll-max-microamp = <9440>; vddp-ref-clk-supply = <&vreg_l25a_1p2>; - vddp-ref-clk-max-microamp = <100>; vddp-ref-clk-always-on; }; From patchwork Tue Feb 22 14:58:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755348 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07FCAC433EF for ; Tue, 22 Feb 2022 15:01:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233242AbiBVPB7 (ORCPT ); Tue, 22 Feb 2022 10:01:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48730 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233167AbiBVPBO (ORCPT ); Tue, 22 Feb 2022 10:01:14 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1645310EC76 for ; Tue, 22 Feb 2022 07:00:10 -0800 (PST) Received: from mail-ej1-f69.google.com (mail-ej1-f69.google.com [209.85.218.69]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id C71D240257 for ; Tue, 22 Feb 2022 15:00:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645542005; bh=YBEC74wb9GPpBj/B6mQOA+S5GClKlTxflH8/ImjOGfA=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Gqx+ahfAeqtSZDf6m9LV55fr2kSPRxAYUILdJtigArXOZ5n1+MAh+GbbUz7h9SADR rwLMNm95Lw1tx8z//iotZEnk4bsoCwbIY4N//x5wnHkEiPyvi/+Ai1WiofVHyWFHJp CSn3nsovq8v0zaNX1TU5hY1M6zirgj1tO602MuDS1UBteYmlo/1C3npJH0ZvXtfnhy LJmQ8Dv3mAm42EpJ2+31bXjkNFTRXai+HV+r+pq3ocDMFThyeZ6sHJNHrYBDFZgtr1 iqcsXA4b9fnbd5/amPLX2hxuzWvm6Yl6wxZ12M/E8b9H2lM9ipiPUciYXTMygBjSOY ZgUIWOcgVlVxg== Received: by mail-ej1-f69.google.com with SMTP id m4-20020a170906160400b006be3f85906eso5860731ejd.23 for ; Tue, 22 Feb 2022 07:00:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YBEC74wb9GPpBj/B6mQOA+S5GClKlTxflH8/ImjOGfA=; b=bL1g6m1SIlH/mZVV3DRL9GLgxod2EJGfizawSB1USP15/hz/+AwXcvPeaCEljtOKso pCTNaTBv+4xPSVYN7QJyjlJiPfkcN1Xy77o0W6iMFyEVZ6zUl3PwBNyKCF3Byvy16u4G Y/lNGXFgiQD3CP/c2hLlXJSDty3iRNa7tUbDf4u/R+qjmBVyjJh9T6c5CKnPxnhG4asD 053UhHkVN2whrFBKwFCSe0nbKFh5LPEnGplzIGneAX/GzdKd7dkWigq8Cf6wvnoWJ/lw 3cBiyDjhQwtyNGwziqAQWyR86XRpQuenMkafjzCm3WqbgXy7awBrHK94sWAFDVcsqvjU iBQw== X-Gm-Message-State: AOAM53107mxq/5tysenn0ORgXb7m9TgUtuR3JmOwWd0f7RFV/Zxa/DZI a/qJpaQtsR4DuAajgY7mOAUK71ZIsHzHpvMvg6cAf5ocyu7/pSaXLC6WM8IwXzHj3HmoChuDUHi lt+/TYfTLU8Cod+lShUFvAapvwX/M0Ej5ZfdI5gA= X-Received: by 2002:a17:906:7746:b0:6ce:a12e:489f with SMTP id o6-20020a170906774600b006cea12e489fmr18914903ejn.551.1645542003130; Tue, 22 Feb 2022 07:00:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJwLi2RkpjMH1XnBpd7ijPxBtJkEM6ya606jWmcrmuPZusdxAuidRgjMaupSJDwmi2J8JqbfkQ== X-Received: by 2002:a17:906:7746:b0:6ce:a12e:489f with SMTP id o6-20020a170906774600b006cea12e489fmr18914869ejn.551.1645542002826; Tue, 22 Feb 2022 07:00:02 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.07.00.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 07:00:02 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 14/15] arm64: dts: qcom: msm8996: correct UFS compatible Date: Tue, 22 Feb 2022 15:58:53 +0100 Message-Id: <20220222145854.358646-15-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org The Qualcomm UFS bindings require to use specific (qcom,msm8996-ufshc) and generic (jedec,ufs-2.0) compatibles. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index fad1bbfa1c0a..f25c68511b64 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1728,7 +1728,8 @@ pcie2: pcie@610000 { }; ufshc: ufshc@624000 { - compatible = "qcom,ufshc"; + compatible = "qcom,msm8996-ufshc", "qcom,ufshc", + "jedec,ufs-2.0"; reg = <0x00624000 0x2500>; interrupts = ; From patchwork Tue Feb 22 14:58:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12755344 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 561F9C43219 for ; Tue, 22 Feb 2022 15:00:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233161AbiBVPBV (ORCPT ); Tue, 22 Feb 2022 10:01:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48710 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233096AbiBVPAz (ORCPT ); Tue, 22 Feb 2022 10:00:55 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DCCBC10E578 for ; Tue, 22 Feb 2022 07:00:06 -0800 (PST) Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 9C66840296 for ; Tue, 22 Feb 2022 15:00:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1645542005; bh=LfKEooVWXSt0X9amI75MXA0ImuzcwyjqGr8txR6hCCo=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=vc3RucsustSnI9z6fj1AZ3faXkw/uB81BLhjsfHz9uRvUq0axAi6FjprYifCaTms2 G/jZ5OzN3Fsjqjp3rsoU3oDbFNiRJX2kApHmhH+rnhTqdDTx5nOGGuQIQ6z5ypInDT XQZhR0GMrPt225HGhVjquKJrxdjFIkraKhNTHqmrvpXeZ8puofX0OhzAWd4CK4s/vq 9GzlJ8XZX/v1ep8CVwanxcr1kJpqdvVbDSGMOKMMO8rOrzUgh3NRPONnqXvUrres2E cQUpSxkQE6or1M4U3Lv7nrjl8vQ/IdP5JnUWZeNc5MxtirhxkAKnBLLSweT95TmM/D k/vJQLd/Zafog== Received: by mail-ed1-f70.google.com with SMTP id eq13-20020a056402298d00b00412cfa4bb0eso7279622edb.7 for ; Tue, 22 Feb 2022 07:00:05 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LfKEooVWXSt0X9amI75MXA0ImuzcwyjqGr8txR6hCCo=; b=bo8ydJKTP3gfBJy5qsjFFoZLxBR3qety1rsTUZ6BviLTWRzCZPnM8DMBlwiCTW4KDu WA8l02MXfk+e/iuUs/4UGEpB6PUUd19I6YC3RhUs525JxL0/gf1fHoa8F+OzdfIoRfvO Vku7MKRR34r1kXvD47exkVe1mDY8Bn6ipiwQ4SO8skAB4ZBGPNa7LH9dAXodVnQEcOvR TA4fxppk/HT5epy1oU15VHPPVnMgNXcc13BG0IsDmDDtjhdGFVSPx4jgBY9G/KpFxX2M vvJA37XjjWgh0I8j+LK360uWkpR9dfkYdKv28lE98DLAapUMSWyP10MLGk7HzXG2ijQY 9SJw== X-Gm-Message-State: AOAM5336DL89Zpo3KK+B5C9zpEOCoY6eHGk0vPfKBzUERDzUul5kp1b1 B2hZJsbh1B1bM7Cu28rUaeae3yvB2sAxPj1tpI7o/21zb0Ai1IUKttsTokLw941rkKcaCSwlo8f KYL49sVQHWvU8XY/o2t5QavNC7/Yye1/6uHo6X7I= X-Received: by 2002:a17:906:70c2:b0:6cf:e1cc:4d8c with SMTP id g2-20020a17090670c200b006cfe1cc4d8cmr20090150ejk.696.1645542004850; Tue, 22 Feb 2022 07:00:04 -0800 (PST) X-Google-Smtp-Source: ABdhPJyR3qbd+Iftv6XGp15bvvgUICPOPWMYZg+AzIuOxdejdmzbh/iz1wm8C/0MI15ezn8MGt0S6w== X-Received: by 2002:a17:906:70c2:b0:6cf:e1cc:4d8c with SMTP id g2-20020a17090670c200b006cfe1cc4d8cmr20090120ejk.696.1645542004625; Tue, 22 Feb 2022 07:00:04 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id m2sm2467960ejb.20.2022.02.22.07.00.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 07:00:04 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , "James E.J. Bottomley" , "Martin K. Petersen" , Jan Kotas , Li Wei , Stanley Chu , Yaniv Gardi , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 15/15] arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS Date: Tue, 22 Feb 2022 15:58:54 +0100 Message-Id: <20220222145854.358646-16-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> References: <20220222145854.358646-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org ref_clk clock in UFS node is already there with a <0 0> frequency, which matches other DTSI files. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index a26bd3f13d4a..cb6442c9e761 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -1916,7 +1916,6 @@ ufs_mem_hc: ufshc@1d84000 { iommus = <&apps_smmu 0xe0 0x0>; clock-names = - "ref_clk", "core_clk", "bus_aggr_clk", "iface_clk", @@ -1926,7 +1925,6 @@ ufs_mem_hc: ufshc@1d84000 { "rx_lane0_sync_clk", "rx_lane1_sync_clk"; clocks = - <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_AXI_CLK>, <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, <&gcc GCC_UFS_PHY_AHB_CLK>, @@ -1936,7 +1934,6 @@ ufs_mem_hc: ufshc@1d84000 { <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; freq-table = - <75000000 300000000>, <75000000 300000000>, <0 0>, <0 0>,