From patchwork Thu Feb 24 10:12:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 12758298 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABAA9C433EF for ; Thu, 24 Feb 2022 10:12:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233286AbiBXKND (ORCPT ); Thu, 24 Feb 2022 05:13:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232214AbiBXKNC (ORCPT ); Thu, 24 Feb 2022 05:13:02 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E6B7B16EC; Thu, 24 Feb 2022 02:12:32 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2B905615C3; Thu, 24 Feb 2022 10:12:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8BB62C340E9; Thu, 24 Feb 2022 10:12:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645697551; bh=oYoXFxFVA983d45Heq72rIXdWdudjES3kjIEKjsuh9E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SyreEJXTXj6Eqer63SAAyt7DMdA/cuNndPmCB15J7DUlokHjWv6LdjBVtk9j+sb7P iK+IJE/LqFZPz+/0BL+n4Flr1aaEP7npVEg/A5igDgVujl1uaaJF7hoL7rweycbl9f xVsz21lIS/j7wEbFp8jYQbVMdp5aoHeB6gTnLjYc2sM+8Y93/iuzAotzGvUGbmJ73r 8wK7y1Iyy3cMk61dVpBEYKRK+M80oLSHTS8gOTSk3u/MxsL4IStcrh7uyyjj1aW2xN RPNP/ZEEKB4ESnFSrsvzDMTj1f3OqcY4//hla3OmbI5uMa6mHI9CI1lB7ne8/WV11X UBb0hM2b4zBMw== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nNB6r-00A979-BE; Thu, 24 Feb 2022 10:12:29 +0000 From: Marc Zyngier To: linux-kernel@vger.kernel.org Cc: Andy Gross , Bjorn Andersson , Thomas Gleixner , linux-arm-msm@vger.kernel.org Subject: [PATCH 1/5] irqchip/qcom-pdc: Kill PDC_NO_PARENT_IRQ Date: Thu, 24 Feb 2022 10:12:22 +0000 Message-Id: <20220224101226.88373-2-maz@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220224101226.88373-1-maz@kernel.org> References: <20220224101226.88373-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, tglx@linutronix.de, linux-arm-msm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PDC_NO_PARENT_IRQ is pretty pointless, as all it indicates is that the PDC terminates the interrupt hierarchy. Which is exactly the same as not having a mapping in the GIC space. This is also bad practice to treat the absence of a hwirq as a hwirq itself. Just explicitly use the region mapping pointer, and drop the definition. Signed-off-by: Marc Zyngier Reviewed-by: Maulik Shah --- drivers/irqchip/qcom-pdc.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 173e6520e06e..3b214c4e6755 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -30,14 +30,14 @@ #define IRQ_ENABLE_BANK 0x10 #define IRQ_i_CFG 0x110 -#define PDC_NO_PARENT_IRQ ~0UL - struct pdc_pin_region { u32 pin_base; u32 parent_base; u32 cnt; }; +#define pin_to_hwirq(r, p) ((r)->parent_base + (p) - (r)->pin_base) + static DEFINE_RAW_SPINLOCK(pdc_lock); static void __iomem *pdc_base; static struct pdc_pin_region *pdc_region; @@ -186,19 +186,17 @@ static struct irq_chip qcom_pdc_gic_chip = { .irq_set_affinity = irq_chip_set_affinity_parent, }; -static irq_hw_number_t get_parent_hwirq(int pin) +static struct pdc_pin_region *get_pin_region(int pin) { int i; - struct pdc_pin_region *region; for (i = 0; i < pdc_region_cnt; i++) { - region = &pdc_region[i]; - if (pin >= region->pin_base && - pin < region->pin_base + region->cnt) - return (region->parent_base + pin - region->pin_base); + if (pin >= pdc_region[i].pin_base && + pin < pdc_region[i].pin_base + pdc_region[i].cnt) + return &pdc_region[i]; } - return PDC_NO_PARENT_IRQ; + return NULL; } static int qcom_pdc_translate(struct irq_domain *d, struct irq_fwspec *fwspec, @@ -221,7 +219,8 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq, { struct irq_fwspec *fwspec = data; struct irq_fwspec parent_fwspec; - irq_hw_number_t hwirq, parent_hwirq; + struct pdc_pin_region *region; + irq_hw_number_t hwirq; unsigned int type; int ret; @@ -234,8 +233,8 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq, if (ret) return ret; - parent_hwirq = get_parent_hwirq(hwirq); - if (parent_hwirq == PDC_NO_PARENT_IRQ) + region = get_pin_region(hwirq); + if (!region) return irq_domain_disconnect_hierarchy(domain->parent, virq); if (type & IRQ_TYPE_EDGE_BOTH) @@ -247,7 +246,7 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq, parent_fwspec.fwnode = domain->parent->fwnode; parent_fwspec.param_count = 3; parent_fwspec.param[0] = 0; - parent_fwspec.param[1] = parent_hwirq; + parent_fwspec.param[1] = pin_to_hwirq(region, hwirq); parent_fwspec.param[2] = type; return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, @@ -265,7 +264,8 @@ static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq, { struct irq_fwspec *fwspec = data; struct irq_fwspec parent_fwspec; - irq_hw_number_t hwirq, parent_hwirq; + struct pdc_pin_region *region; + irq_hw_number_t hwirq; unsigned int type; int ret; @@ -281,8 +281,8 @@ static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq, if (ret) return ret; - parent_hwirq = get_parent_hwirq(hwirq); - if (parent_hwirq == PDC_NO_PARENT_IRQ) + region = get_pin_region(hwirq); + if (!region) return irq_domain_disconnect_hierarchy(domain->parent, virq); if (type & IRQ_TYPE_EDGE_BOTH) @@ -294,7 +294,7 @@ static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq, parent_fwspec.fwnode = domain->parent->fwnode; parent_fwspec.param_count = 3; parent_fwspec.param[0] = 0; - parent_fwspec.param[1] = parent_hwirq; + parent_fwspec.param[1] = pin_to_hwirq(region, hwirq); parent_fwspec.param[2] = type; return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, From patchwork Thu Feb 24 10:12:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 12758300 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D646C4332F for ; Thu, 24 Feb 2022 10:12:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233325AbiBXKNF (ORCPT ); Thu, 24 Feb 2022 05:13:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233305AbiBXKNE (ORCPT ); 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Thu, 24 Feb 2022 10:12:29 +0000 From: Marc Zyngier To: linux-kernel@vger.kernel.org Cc: Andy Gross , Bjorn Andersson , Thomas Gleixner , linux-arm-msm@vger.kernel.org Subject: [PATCH 2/5] irqchip/qcom-pdc: Kill non-wakeup irqdomain Date: Thu, 24 Feb 2022 10:12:23 +0000 Message-Id: <20220224101226.88373-3-maz@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220224101226.88373-1-maz@kernel.org> References: <20220224101226.88373-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, tglx@linutronix.de, linux-arm-msm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org A careful look at the way the PDC driver works shows that: - all interrupts are in the same space - all interrupts are treated the same And yet the driver creates two domains based on whether the interrupt gets mapped directly or from the pinctrl code, which is obviously a waste of resources. Kill the non-wakeup domain and unify all the interrupt handling. Signed-off-by: Marc Zyngier --- drivers/irqchip/qcom-pdc.c | 84 +++++--------------------------------- 1 file changed, 10 insertions(+), 74 deletions(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 3b214c4e6755..5be531403f50 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -21,7 +21,6 @@ #include #include -#define PDC_MAX_IRQS 168 #define PDC_MAX_GPIO_IRQS 256 #define CLEAR_INTR(reg, intr) (reg & ~(1 << intr)) @@ -224,51 +223,6 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq, unsigned int type; int ret; - ret = qcom_pdc_translate(domain, fwspec, &hwirq, &type); - if (ret) - return ret; - - ret = irq_domain_set_hwirq_and_chip(domain, virq, hwirq, - &qcom_pdc_gic_chip, NULL); - if (ret) - return ret; - - region = get_pin_region(hwirq); - if (!region) - return irq_domain_disconnect_hierarchy(domain->parent, virq); - - if (type & IRQ_TYPE_EDGE_BOTH) - type = IRQ_TYPE_EDGE_RISING; - - if (type & IRQ_TYPE_LEVEL_MASK) - type = IRQ_TYPE_LEVEL_HIGH; - - parent_fwspec.fwnode = domain->parent->fwnode; - parent_fwspec.param_count = 3; - parent_fwspec.param[0] = 0; - parent_fwspec.param[1] = pin_to_hwirq(region, hwirq); - parent_fwspec.param[2] = type; - - return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, - &parent_fwspec); -} - -static const struct irq_domain_ops qcom_pdc_ops = { - .translate = qcom_pdc_translate, - .alloc = qcom_pdc_alloc, - .free = irq_domain_free_irqs_common, -}; - -static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq, - unsigned int nr_irqs, void *data) -{ - struct irq_fwspec *fwspec = data; - struct irq_fwspec parent_fwspec; - struct pdc_pin_region *region; - irq_hw_number_t hwirq; - unsigned int type; - int ret; - ret = qcom_pdc_translate(domain, fwspec, &hwirq, &type); if (ret) return ret; @@ -301,16 +255,9 @@ static int qcom_pdc_gpio_alloc(struct irq_domain *domain, unsigned int virq, &parent_fwspec); } -static int qcom_pdc_gpio_domain_select(struct irq_domain *d, - struct irq_fwspec *fwspec, - enum irq_domain_bus_token bus_token) -{ - return bus_token == DOMAIN_BUS_WAKEUP; -} - -static const struct irq_domain_ops qcom_pdc_gpio_ops = { - .select = qcom_pdc_gpio_domain_select, - .alloc = qcom_pdc_gpio_alloc, +static const struct irq_domain_ops qcom_pdc_ops = { + .translate = qcom_pdc_translate, + .alloc = qcom_pdc_alloc, .free = irq_domain_free_irqs_common, }; @@ -361,7 +308,7 @@ static int pdc_setup_pin_mapping(struct device_node *np) static int qcom_pdc_init(struct device_node *node, struct device_node *parent) { - struct irq_domain *parent_domain, *pdc_domain, *pdc_gpio_domain; + struct irq_domain *parent_domain, *pdc_domain; int ret; pdc_base = of_iomap(node, 0); @@ -383,32 +330,21 @@ static int qcom_pdc_init(struct device_node *node, struct device_node *parent) goto fail; } - pdc_domain = irq_domain_create_hierarchy(parent_domain, 0, PDC_MAX_IRQS, - of_fwnode_handle(node), - &qcom_pdc_ops, NULL); - if (!pdc_domain) { - pr_err("%pOF: GIC domain add failed\n", node); - ret = -ENOMEM; - goto fail; - } - - pdc_gpio_domain = irq_domain_create_hierarchy(parent_domain, + pdc_domain = irq_domain_create_hierarchy(parent_domain, IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP, PDC_MAX_GPIO_IRQS, of_fwnode_handle(node), - &qcom_pdc_gpio_ops, NULL); - if (!pdc_gpio_domain) { - pr_err("%pOF: PDC domain add failed for GPIO domain\n", node); + &qcom_pdc_ops, NULL); + if (!pdc_domain) { + pr_err("%pOF: PDC domain add failed\n", node); ret = -ENOMEM; - goto remove; + goto fail; } - irq_domain_update_bus_token(pdc_gpio_domain, DOMAIN_BUS_WAKEUP); + irq_domain_update_bus_token(pdc_domain, DOMAIN_BUS_WAKEUP); return 0; -remove: - irq_domain_remove(pdc_domain); fail: kfree(pdc_region); iounmap(pdc_base); From patchwork Thu Feb 24 10:12:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 12758302 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF47EC43217 for ; Thu, 24 Feb 2022 10:12:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233335AbiBXKNG (ORCPT ); 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b=chV/K20lZ6/kqvnMaAEE2pmx3jHbqACH6fdoyNLDqPWPjXvFR+d4qHslnQpKgL0gI /7bPzNwlDYksaayGjwUbnRaVQwrFzF0fmCcnDRN3Qua0C6VUd7teGYZ0qXy+YgW2EQ NcZglRuJ9v3SXya/P1C6g65E1GKu2xzAfyG+qqcn+i8W0hrXiBPS1WbWfCaF0u+6L3 kHcc3M+SSlh9FoWXg++sLN/XtGtPEdG4qQoQTMQ29da+iau4g+SMDXbAY6RumfGbd/ GzN5ZUU3VRIT137CqxpiMG8MplvwPLaf8IkZ6dt0iwVYjY+XvDqe8ylOuKliYiU1qx 1PkpnkS+2xIYw== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nNB6r-00A979-N6; Thu, 24 Feb 2022 10:12:29 +0000 From: Marc Zyngier To: linux-kernel@vger.kernel.org Cc: Andy Gross , Bjorn Andersson , Thomas Gleixner , linux-arm-msm@vger.kernel.org Subject: [PATCH 3/5] irqchip/qcom-pdc: Kill qcom_pdc_translate helper Date: Thu, 24 Feb 2022 10:12:24 +0000 Message-Id: <20220224101226.88373-4-maz@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220224101226.88373-1-maz@kernel.org> References: <20220224101226.88373-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, tglx@linutronix.de, linux-arm-msm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qcom_pdc_translate() really is nothing but an open coded version of irq_domain_translate_twocell(). Get rid of it and use the common version instead. Signed-off-by: Marc Zyngier Reviewed-by: Maulik Shah --- drivers/irqchip/qcom-pdc.c | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 5be531403f50..837ca6998f6a 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -198,21 +198,6 @@ static struct pdc_pin_region *get_pin_region(int pin) return NULL; } -static int qcom_pdc_translate(struct irq_domain *d, struct irq_fwspec *fwspec, - unsigned long *hwirq, unsigned int *type) -{ - if (is_of_node(fwspec->fwnode)) { - if (fwspec->param_count != 2) - return -EINVAL; - - *hwirq = fwspec->param[0]; - *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; - return 0; - } - - return -EINVAL; -} - static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *data) { @@ -223,7 +208,7 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq, unsigned int type; int ret; - ret = qcom_pdc_translate(domain, fwspec, &hwirq, &type); + ret = irq_domain_translate_twocell(domain, fwspec, &hwirq, &type); if (ret) return ret; @@ -256,7 +241,7 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq, } static const struct irq_domain_ops qcom_pdc_ops = { - .translate = qcom_pdc_translate, + .translate = irq_domain_translate_twocell, .alloc = qcom_pdc_alloc, .free = irq_domain_free_irqs_common, }; From patchwork Thu Feb 24 10:12:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 12758299 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47EAEC433FE for ; Thu, 24 Feb 2022 10:12:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233318AbiBXKNE (ORCPT ); Thu, 24 Feb 2022 05:13:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233014AbiBXKNC (ORCPT ); Thu, 24 Feb 2022 05:13:02 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 502DE139CF8; Thu, 24 Feb 2022 02:12:32 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8EE106130A; Thu, 24 Feb 2022 10:12:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 011ACC340F6; Thu, 24 Feb 2022 10:12:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645697552; bh=GvBeGbRM9lOucS8iJkQ3NSS2HPWOy7uTkLQW2AEW4BI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GzGhMGFyUvoyE+Yip5PuayyHm6OWDkFf1GI1lWlyz+jmb+c6CtOq8RNOEuC5Wfh1l atvVxbZOHMN6Xdart0Zt8x4cRfani+6UlxsVgeUVgtDjQvTKVLjtShoI2gdTmIvrOP jAJIY6idec6Cdps+gE4VV16Sgb25qrElXnNQhE98Wif6Db2wSsg4HJtEBJXSgE/VCJ Lo5TH8Pl+SOQSJcbP0BrLHHN0htZt3yYnNLKdVbKFzyYnPbq21MU2ePEuiSTkbtXd3 9wWkwVMrVo6DQK9KVrlsBnGKdg4YM1OUIpiXQQy0qZEZVUrM/QJ0Y3PrxJHbXLi7oZ GA8pavuitg+MA== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nNB6r-00A979-TI; Thu, 24 Feb 2022 10:12:29 +0000 From: Marc Zyngier To: linux-kernel@vger.kernel.org Cc: Andy Gross , Bjorn Andersson , Thomas Gleixner , linux-arm-msm@vger.kernel.org Subject: [PATCH 4/5] irqchip/qcom-pdc: Fix broken locking Date: Thu, 24 Feb 2022 10:12:25 +0000 Message-Id: <20220224101226.88373-5-maz@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220224101226.88373-1-maz@kernel.org> References: <20220224101226.88373-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, tglx@linutronix.de, linux-arm-msm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org pdc_enable_intr() serves as a primitive to qcom_pdc_gic_{en,dis}able, and has a raw spinlock for mutual exclusion, which is uses with interruptible primitives. This means that this critical section can itself be interrupted. Should the interrupt also be a PDC interrupt, and the endpoint driver perform an irq_disable() on that interrupt, we end-up in a deadlock. Fix this by using the irqsave/irqrestore variants of the locking primitives. Signed-off-by: Marc Zyngier Reviewed-by: Maulik Shah --- drivers/irqchip/qcom-pdc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 837ca6998f6a..0cd20ddfae2a 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -55,17 +55,18 @@ static u32 pdc_reg_read(int reg, u32 i) static void pdc_enable_intr(struct irq_data *d, bool on) { int pin_out = d->hwirq; + unsigned long flags; u32 index, mask; u32 enable; index = pin_out / 32; mask = pin_out % 32; - raw_spin_lock(&pdc_lock); + raw_spin_lock_irqsave(&pdc_lock, flags); enable = pdc_reg_read(IRQ_ENABLE_BANK, index); enable = on ? ENABLE_INTR(enable, mask) : CLEAR_INTR(enable, mask); pdc_reg_write(IRQ_ENABLE_BANK, index, enable); - raw_spin_unlock(&pdc_lock); + raw_spin_unlock_irqrestore(&pdc_lock, flags); } static void qcom_pdc_gic_disable(struct irq_data *d) From patchwork Thu Feb 24 10:12:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 12758301 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51CF7C433EF for ; Thu, 24 Feb 2022 10:12:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233340AbiBXKNH (ORCPT ); Thu, 24 Feb 2022 05:13:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233324AbiBXKNF (ORCPT ); Thu, 24 Feb 2022 05:13:05 -0500 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C80013AA30; Thu, 24 Feb 2022 02:12:35 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id C8A5ECE1E46; Thu, 24 Feb 2022 10:12:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3234CC340F8; Thu, 24 Feb 2022 10:12:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645697552; bh=ZtLfo26jT/bIFMFsWcHW86soigSIb26d5K3SfwTXhkQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=H+QWNOF+ofgTmOKYgx/thfjFiUUhd+MNt0sEeC7SaxpfKeBoVvOpySlw6nCNSZjNQ EDCMNHq9OuOwSh6Tgw9Kruc+StHKYHYvP2K1SmOtTTsoIBsKq1RvEZYyQhJkyYv3rs NxjTE3OjVLqI1cwNz6TGREht16z17Q8O9NE9vXESs4da4a/UFwpSyJcr6olB2GEZGS g97gxHiKRLbpwy8aZPjHPJBImTzix9eVi/w9DH+sblbmFNxJbCvN+X7MzXoGMc3xrC odFkzlqyROXLA7g6926LeSCgRVE1ddYrqjf2MWpdiMh9bS9wGWHIp92mXQFqQbYxNl /P2p+tYx7HQsw== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nNB6s-00A979-2T; Thu, 24 Feb 2022 10:12:30 +0000 From: Marc Zyngier To: linux-kernel@vger.kernel.org Cc: Andy Gross , Bjorn Andersson , Thomas Gleixner , linux-arm-msm@vger.kernel.org Subject: [PATCH 5/5] irqchip/qcom-pdc: Drop open coded version of __assign_bit() Date: Thu, 24 Feb 2022 10:12:26 +0000 Message-Id: <20220224101226.88373-6-maz@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220224101226.88373-1-maz@kernel.org> References: <20220224101226.88373-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, tglx@linutronix.de, linux-arm-msm@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The driver uses what looks like an open-coded version of __assign_bit(). Replace it with the real thing. Signed-off-by: Marc Zyngier Reviewed-by: Maulik Shah --- drivers/irqchip/qcom-pdc.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 0cd20ddfae2a..d96916cf6a41 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -23,9 +23,6 @@ #define PDC_MAX_GPIO_IRQS 256 -#define CLEAR_INTR(reg, intr) (reg & ~(1 << intr)) -#define ENABLE_INTR(reg, intr) (reg | (1 << intr)) - #define IRQ_ENABLE_BANK 0x10 #define IRQ_i_CFG 0x110 @@ -55,16 +52,16 @@ static u32 pdc_reg_read(int reg, u32 i) static void pdc_enable_intr(struct irq_data *d, bool on) { int pin_out = d->hwirq; + unsigned long enable; unsigned long flags; u32 index, mask; - u32 enable; index = pin_out / 32; mask = pin_out % 32; raw_spin_lock_irqsave(&pdc_lock, flags); enable = pdc_reg_read(IRQ_ENABLE_BANK, index); - enable = on ? ENABLE_INTR(enable, mask) : CLEAR_INTR(enable, mask); + __assign_bit(mask, &enable, on); pdc_reg_write(IRQ_ENABLE_BANK, index, enable); raw_spin_unlock_irqrestore(&pdc_lock, flags); }