From patchwork Thu Feb 24 15:43:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 12758784 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55BDEC4167B for ; Thu, 24 Feb 2022 15:43:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236586AbiBXPoW (ORCPT ); Thu, 24 Feb 2022 10:44:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236528AbiBXPoP (ORCPT ); Thu, 24 Feb 2022 10:44:15 -0500 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7ACE820A97C; Thu, 24 Feb 2022 07:43:43 -0800 (PST) Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 21OFF6x4017197; Thu, 24 Feb 2022 15:43:43 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : content-transfer-encoding : mime-version; s=pp1; bh=tz6ofkYhIVtff+g11LjbaNuKa2Z7qO+/bbkuk79suRM=; b=UatBuIPNYudDvM5oCcVwqBCJfOR0D1rOj27YYiuKSO+Pd4e2ZjjywJIes74CRBgX3T6S WbIK/qLuc4CQ4aAmblVQ/6Yg+Q/Y6AxOYj7SZ606kfhDAiKm0FgwqmjveQC/QjHxB9Q9 /NF8Am7RmQICpJIbc8DqAmyzBMo3qDdOYb/Za9fzzC/jctnnd/WCoWIEY+JfYh7itUnM IZAJAMqLfOwkwK88gkF8BhLQwNje0VePk3GWBw7EaaHz6FheyBLY5uUUMNoZRUKUWMLk RrI8Px052OOW8h1zUoNIbDH9dA55N2G4Ew/m2OItK1ludolBLW++g0hdVASxQ1Y0eE2g 2w== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 3edtyjfck1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Feb 2022 15:43:43 +0000 Received: from m0098396.ppops.net (m0098396.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.43/8.16.0.43) with SMTP id 21OFFg7A019678; Thu, 24 Feb 2022 15:43:42 GMT Received: from ppma05fra.de.ibm.com (6c.4a.5195.ip4.static.sl-reverse.com [149.81.74.108]) by mx0a-001b2d01.pphosted.com with ESMTP id 3edtyjfcjf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Feb 2022 15:43:42 +0000 Received: from pps.filterd (ppma05fra.de.ibm.com [127.0.0.1]) by ppma05fra.de.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 21OFcI31002228; Thu, 24 Feb 2022 15:43:40 GMT Received: from b06cxnps3075.portsmouth.uk.ibm.com (d06relay10.portsmouth.uk.ibm.com [9.149.109.195]) by ppma05fra.de.ibm.com with ESMTP id 3ear69rrhg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Feb 2022 15:43:40 +0000 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 21OFhbeu50725124 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 24 Feb 2022 15:43:37 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E65CC42047; Thu, 24 Feb 2022 15:43:36 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B014D4204D; Thu, 24 Feb 2022 15:43:36 +0000 (GMT) Received: from t46lp57.lnxne.boe (unknown [9.152.108.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Feb 2022 15:43:36 +0000 (GMT) From: Nico Boehr To: kvm@vger.kernel.org, linux-s390@vger.kernel.org Cc: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, david@redhat.com Subject: [kvm-unit-tests PATCH v4 1/8] s390x: Add more tests for MSCH Date: Thu, 24 Feb 2022 16:43:29 +0100 Message-Id: <20220224154336.3459839-2-nrb@linux.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220224154336.3459839-1-nrb@linux.ibm.com> References: <20220224154336.3459839-1-nrb@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: I6zkqlJfk2SC0EBtaEFM3Dzf4CcV7OQy X-Proofpoint-GUID: cMmKbfAk0eU9NXk7MDGq2n6TIS9QVq-Q X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-24_03,2022-02-24_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 clxscore=1015 phishscore=0 impostorscore=0 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202240092 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org We already have some coverage for MSCH, but there are more cases to test for: - invalid SCHIB structure. We cover that by setting reserved bits 0, 1, 6 and 7 in the flags of the PMCW. Older QEMU versions require this bit to always be zero on msch, which is why this test may fail. A fix is available in QEMU master commit 2df59b73e086 ("s390x/css: fix PMCW invalid mask"). - a pointer to an unaligned SCHIB. We cover misalignment by 1 and 2 bytes. Using pointer to valid memory avoids messing up random memory in case of test failures. Here's the QEMU PMCW invalid mask fix: https://lists.nongnu.org/archive/html/qemu-s390x/2021-12/msg00100.html Signed-off-by: Nico Boehr Reviewed-by: Janosch Frank Reviewed-by: Claudio Imbrenda Reviewed-by: Thomas Huth Reviewed-by: Pierre Morel --- s390x/css.c | 58 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/s390x/css.c b/s390x/css.c index 881206ba1cef..396007ed0074 100644 --- a/s390x/css.c +++ b/s390x/css.c @@ -27,6 +27,8 @@ static int test_device_sid; static struct senseid *senseid; struct ccw1 *ccw; +char alignment_test_page[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE))); + static void test_enumerate(void) { test_device_sid = css_enumerate(); @@ -331,6 +333,61 @@ static void test_schm_fmt1(void) free_io_mem(mb1, sizeof(struct measurement_block_format1)); } +static void test_msch(void) +{ + int invalid_pmcw_flags[] = {0, 1, 6, 7}; + struct schib test_schib; + uint16_t old_pmcw_flags; + const int align_to = 4; + int invalid_flag; + int cc; + + if (!test_device_sid) { + report_skip("No device"); + return; + } + + cc = stsch(test_device_sid, &schib); + if (cc) { + report_fail("stsch: sch %08x failed with cc=%d", test_device_sid, cc); + return; + } + + report_prefix_push("Unaligned"); + for (int i = 1; i < align_to; i *= 2) { + report_prefix_pushf("%d", i); + + expect_pgm_int(); + msch(test_device_sid, (struct schib *)(alignment_test_page + i)); + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); + + report_prefix_pop(); + } + report_prefix_pop(); + + report_prefix_push("Invalid SCHIB"); + old_pmcw_flags = schib.pmcw.flags; + for (int i = 0; i < ARRAY_SIZE(invalid_pmcw_flags); i++) { + invalid_flag = invalid_pmcw_flags[i]; + + report_prefix_pushf("PMCW flag bit %d set", invalid_flag); + + schib.pmcw.flags = old_pmcw_flags | BIT(15 - invalid_flag); + expect_pgm_int(); + msch(test_device_sid, &schib); + check_pgm_int_code(PGM_INT_CODE_OPERAND); + + cc = stsch(test_device_sid, &test_schib); + report(!cc, "STSCH succeeded"); + report(!(test_schib.pmcw.flags & BIT(15 - invalid_flag)), "Clear on STSCH"); + + report_prefix_pop(); + } + report_prefix_pop(); + + schib.pmcw.flags = old_pmcw_flags; +} + static struct { const char *name; void (*func)(void); @@ -343,6 +400,7 @@ static struct { { "measurement block (schm)", test_schm }, { "measurement block format0", test_schm_fmt0 }, { "measurement block format1", test_schm_fmt1 }, + { "msch", test_msch }, { NULL, NULL } }; From patchwork Thu Feb 24 15:43:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 12758785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2B37C41535 for ; Thu, 24 Feb 2022 15:43:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236601AbiBXPoX (ORCPT ); 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Thu, 24 Feb 2022 15:43:37 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 46CA442041; Thu, 24 Feb 2022 15:43:37 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 078134204C; Thu, 24 Feb 2022 15:43:37 +0000 (GMT) Received: from t46lp57.lnxne.boe (unknown [9.152.108.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Feb 2022 15:43:36 +0000 (GMT) From: Nico Boehr To: kvm@vger.kernel.org, linux-s390@vger.kernel.org Cc: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, david@redhat.com Subject: [kvm-unit-tests PATCH v4 2/8] s390x: Add test for PFMF low-address protection Date: Thu, 24 Feb 2022 16:43:30 +0100 Message-Id: <20220224154336.3459839-3-nrb@linux.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220224154336.3459839-1-nrb@linux.ibm.com> References: <20220224154336.3459839-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: npPhyNUvtMtRymUWK96ZXJKhNEvlNiNb X-Proofpoint-ORIG-GUID: NXILaSuPWsCSqaJBkPJZopDU5jfFkg8a X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-24_03,2022-02-24_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 clxscore=1015 bulkscore=0 adultscore=0 mlxscore=0 suspectscore=0 mlxlogscore=706 phishscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202240092 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org PFMF should respect the low-address protection when clearing pages, hence add some tests for it. When low-address protection fails, clearing frame 0 is a destructive operation. It messes up interrupts and thus printing test results won't work properly. Hence, we first attempt to clear frame 1 which is not as destructive. Doing it this way around increases the chances for the user to see a proper failure message instead of QEMU randomly quitting in the middle of the test run. Signed-off-by: Nico Boehr Reviewed-by: Claudio Imbrenda Reviewed-by: Janosch Frank Reviewed-by: Thomas Huth --- s390x/pfmf.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/s390x/pfmf.c b/s390x/pfmf.c index 2f3cb110dc4c..aa1305292ee8 100644 --- a/s390x/pfmf.c +++ b/s390x/pfmf.c @@ -113,6 +113,34 @@ static void test_1m_clear(void) report_prefix_pop(); } +static void test_low_addr_prot(void) +{ + union pfmf_r1 r1 = { + .reg.cf = 1, + .reg.fsc = PFMF_FSC_4K + }; + + report_prefix_push("low-address protection"); + + report_prefix_push("0x1000"); + expect_pgm_int(); + low_prot_enable(); + pfmf(r1.val, (void *)0x1000); + low_prot_disable(); + check_pgm_int_code(PGM_INT_CODE_PROTECTION); + report_prefix_pop(); + + report_prefix_push("0x0"); + expect_pgm_int(); + low_prot_enable(); + pfmf(r1.val, 0); + low_prot_disable(); + check_pgm_int_code(PGM_INT_CODE_PROTECTION); + report_prefix_pop(); + + report_prefix_pop(); +} + int main(void) { bool has_edat = test_facility(8); @@ -124,6 +152,7 @@ int main(void) } test_priv(); + test_low_addr_prot(); /* Force the buffer pages in */ memset(pagebuf, 0, PAGE_SIZE * 256); From patchwork Thu Feb 24 15:43:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 12758794 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED85EC433EF for ; Thu, 24 Feb 2022 15:44:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236628AbiBXPob (ORCPT ); Thu, 24 Feb 2022 10:44:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48330 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236563AbiBXPoP (ORCPT ); Thu, 24 Feb 2022 10:44:15 -0500 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 401D222A2BE; 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Thu, 24 Feb 2022 15:43:37 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5258842045; Thu, 24 Feb 2022 15:43:37 +0000 (GMT) Received: from t46lp57.lnxne.boe (unknown [9.152.108.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Feb 2022 15:43:37 +0000 (GMT) From: Nico Boehr To: kvm@vger.kernel.org, linux-s390@vger.kernel.org Cc: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, david@redhat.com Subject: [kvm-unit-tests PATCH v4 3/8] s390x: Add sck tests Date: Thu, 24 Feb 2022 16:43:31 +0100 Message-Id: <20220224154336.3459839-4-nrb@linux.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220224154336.3459839-1-nrb@linux.ibm.com> References: <20220224154336.3459839-1-nrb@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: AqY-o499_B2PmqxsxXgnz5wkiZaoL_wJ X-Proofpoint-ORIG-GUID: 2ivtlUkeyucldbJ9HU9GPSV8XbeVe33K X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-24_03,2022-02-24_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 impostorscore=0 spamscore=0 mlxlogscore=999 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202240092 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org SCK updates the guest's TOD clock. It needs to be intercepted, hence we should have some tests for it: - its operand must be 8-byte aligned. We test for 1, 2 and 4 byte misalignment. - it should actually update the clock value. As guests are unable to stop their clock, we can only check the clock value is at least higher than the value we set. - it is a privileged call, so expect it to fail when in problem state. We also test the clock value is not changed in this case. We do so by first adjusting it (privileged) to a high value. We then attempt, in nonprivileged mode, to set the clock to a comparatively small value. We can then store the clock value and test its value is strictly higher than the high value we set previously. SCK is currently broken in QEMU TCG. A fix was posted upstream ("s390x: sck: load into a temporary not into in1"): https://lore.kernel.org/qemu-devel/20220126084201.774457-1-nrb@linux.ibm.com/ Signed-off-by: Nico Boehr Reviewed-by: Claudio Imbrenda Reviewed-by: Pierre Morel --- s390x/Makefile | 1 + s390x/sck.c | 136 ++++++++++++++++++++++++++++++++++++++++++++ s390x/unittests.cfg | 3 + 3 files changed, 140 insertions(+) create mode 100644 s390x/sck.c diff --git a/s390x/Makefile b/s390x/Makefile index 53b0fe044fe7..a76b78e5a011 100644 --- a/s390x/Makefile +++ b/s390x/Makefile @@ -17,6 +17,7 @@ tests += $(TEST_DIR)/stsi.elf tests += $(TEST_DIR)/skrf.elf tests += $(TEST_DIR)/smp.elf tests += $(TEST_DIR)/sclp.elf +tests += $(TEST_DIR)/sck.elf tests += $(TEST_DIR)/css.elf tests += $(TEST_DIR)/uv-guest.elf tests += $(TEST_DIR)/sie.elf diff --git a/s390x/sck.c b/s390x/sck.c new file mode 100644 index 000000000000..88d52b74a586 --- /dev/null +++ b/s390x/sck.c @@ -0,0 +1,136 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Perform Set Clock tests + * + * Copyright IBM Corp. 2022 + * + * Authors: + * Nico Boehr + */ +#include +#include +#include +#include + +static inline int sck(uint64_t *time) +{ + int cc; + + asm volatile( + " sck %[time]\n" + " ipm %[cc]\n" + " srl %[cc],28\n" + : [cc] "=d"(cc) + : [time] "Q"(*time) + : "cc" + ); + + return cc; +} + +static inline int stck(uint64_t *time) +{ + int cc; + + asm volatile( + " stck %[time]\n" + " ipm %[cc]\n" + " srl %[cc],28\n" + : [cc] "=d" (cc), [time] "=Q" (*time) + : + : "cc", "memory" + ); + + return cc; +} + +static void test_priv(void) +{ + uint64_t time_to_set_privileged = 0xfacef00dcafe0000, + time_to_set_nonprivileged = 0xcafe0000, + time_verify; + int cc; + + report_prefix_push("privileged"); + cc = sck(&time_to_set_privileged); + report(!cc, "set clock cc=%d", cc); + + cc = stck(&time_verify); + report(!cc, "store clock cc=%d", cc); + report(time_verify > time_to_set_privileged, + "privileged set affected the clock"); + report_prefix_pop(); + + report_prefix_push("unprivileged"); + expect_pgm_int(); + enter_pstate(); + sck(&time_to_set_nonprivileged); + leave_pstate(); + check_pgm_int_code(PGM_INT_CODE_PRIVILEGED_OPERATION); + + cc = stck(&time_verify); + report(!cc, "store clock cc=%d", cc); + report(time_verify > time_to_set_privileged, + "unprivileged set did not affect the clock"); + report_prefix_pop(); +} + +static void test_align(void) +{ + const int align_to = 8; + char unalign[sizeof(uint64_t) + align_to] __attribute__((aligned(8))); + + report_prefix_push("Unaligned operand"); + for (int i = 1; i < align_to; i *= 2) { + report_prefix_pushf("%d", i); + expect_pgm_int(); + sck((uint64_t *)(unalign + i)); + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); + report_prefix_pop(); + } + report_prefix_pop(); +} + +static void test_set(void) +{ + uint64_t start = 0, end = 0, time = 0xcafef00dbeef; + const uint64_t ticks_per_ms = 1000 << 12, ms_to_wait = 5; + int cc; + + report_prefix_push("set"); + + cc = sck(&time); + report(!cc, "set clock cc=%d", cc); + + cc = stck(&start); + report(!cc, "store start clock cc=%d", cc); + report(start >= time, "start >= set value"); + + mdelay(ms_to_wait); + + cc = stck(&end); + report(!cc, "store end clock cc=%d", cc); + report(end > time, "end > set value"); + + report(end - start > (ticks_per_ms * ms_to_wait), "Advances"); + + report_prefix_pop(); +} + +int main(void) +{ + report_prefix_push("sck"); + + if (uv_os_is_guest()) { + report_skip("Test unsupported under PV"); + goto out; + } + + test_align(); + test_set(); + test_priv(); + +out: + report_prefix_pop(); + return report_summary(); +} diff --git a/s390x/unittests.cfg b/s390x/unittests.cfg index 1600e714c8b9..8b148fe31ac0 100644 --- a/s390x/unittests.cfg +++ b/s390x/unittests.cfg @@ -136,3 +136,6 @@ file = firq.elf timeout = 20 extra_params = -smp 1,maxcpus=3 -cpu qemu -device qemu-s390x-cpu,core-id=2 -device qemu-s390x-cpu,core-id=1 accel = tcg + +[sck] +file = sck.elf From patchwork Thu Feb 24 15:43:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 12758788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F318C433F5 for ; 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Thu, 24 Feb 2022 15:43:38 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DF8CC42041; Thu, 24 Feb 2022 15:43:37 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9F3A942049; Thu, 24 Feb 2022 15:43:37 +0000 (GMT) Received: from t46lp57.lnxne.boe (unknown [9.152.108.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Feb 2022 15:43:37 +0000 (GMT) From: Nico Boehr To: kvm@vger.kernel.org, linux-s390@vger.kernel.org Cc: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, david@redhat.com Subject: [kvm-unit-tests PATCH v4 4/8] s390x: Add tests for STCRW Date: Thu, 24 Feb 2022 16:43:32 +0100 Message-Id: <20220224154336.3459839-5-nrb@linux.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220224154336.3459839-1-nrb@linux.ibm.com> References: <20220224154336.3459839-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: xX6Ji5Hc-Jabq9ZpCww8EsVWYkKQsW_J X-Proofpoint-ORIG-GUID: V5uB6s_SPz3NSLF8IW8cY50jswywi2z4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-24_03,2022-02-24_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 clxscore=1015 bulkscore=0 adultscore=0 mlxscore=0 suspectscore=0 mlxlogscore=999 phishscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202240092 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The test consists of two parts: First a simple check to ensure we enforce an aligned address. We test misalignment by 1 and 2 bytes. The second part tests the handling of pending Channel Reports (CR). We first assume no CR is initally pending and check STCRW returns accordingly. Then, we generate a CR by resetting a Channel Path using RCHP and make sure this results in exactly one CRW being generated which has a Reporting-Source Code (RSC) corresponding to the Channel Path facility. Signed-off-by: Nico Boehr Reviewed-by: Claudio Imbrenda Reviewed-by: Pierre Morel --- lib/s390x/css.h | 17 ++++++++++ lib/s390x/css_lib.c | 60 +++++++++++++++++++++++++++++++++ s390x/css.c | 82 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 159 insertions(+) diff --git a/lib/s390x/css.h b/lib/s390x/css.h index 0db8a28166f6..a6a68577248b 100644 --- a/lib/s390x/css.h +++ b/lib/s390x/css.h @@ -266,6 +266,20 @@ static inline int rchp(unsigned long chpid) return cc; } +static inline int stcrw(uint32_t *crw) +{ + int cc; + + asm volatile( + " stcrw %[crw]\n" + " ipm %[cc]\n" + " srl %[cc],28" + : [cc] "=d" (cc) + : [crw] "Q" (*crw) + : "cc", "memory"); + return cc; +} + /* Debug functions */ char *dump_pmcw_flags(uint16_t f); char *dump_scsw_flags(uint32_t f); @@ -294,6 +308,9 @@ int css_residual_count(unsigned int schid); void enable_io_isc(uint8_t isc); int wait_and_check_io_completion(int schid); +int css_find_installed_chpid(int sid, uint8_t *chpid_out); +int css_generate_crw(int sid); + /* * CHSC definitions */ diff --git a/lib/s390x/css_lib.c b/lib/s390x/css_lib.c index 80e9e078b0f6..a9f5097f3486 100644 --- a/lib/s390x/css_lib.c +++ b/lib/s390x/css_lib.c @@ -504,3 +504,63 @@ void enable_io_isc(uint8_t isc) value = (uint64_t)isc << 24; lctlg(6, value); } + +static int is_path_installed(struct schib *schib, int chp_idx) +{ + return schib->pmcw.pim & BIT(7 - chp_idx); +} + +/* + * css_find_installed_chpid: find any installed CHPID + * @sid: subsystem-identification word + * @chpid_out: store the found chpid here, left alone if none found + * + * returns 0 on success, -1 if no chpid found any other value + * indicates the condition code of a failing STSCH instruction + */ +int css_find_installed_chpid(int sid, uint8_t *chpid_out) +{ + int cc; + + cc = stsch(sid, &schib); + if (cc) { + report_fail("%s: sch %08x failed with cc=%d", __func__, sid, cc); + return cc; + } + + for (int i = 0; i < ARRAY_SIZE(schib.pmcw.chpid); i++) { + if (is_path_installed(&schib, i)) { + *chpid_out = schib.pmcw.chpid[i]; + return 0; + } + } + + return -1; +} + +/* + * css_generate_crw: Generate a CRW by issuing RCHP on any channel path + * @sid: subsystem-identification word + * + * returns 0 when a CRW was generated, -1 if no chpid found. + */ +int css_generate_crw(int sid) +{ + int ret, cc; + uint8_t chpid; + + report_prefix_push("Generate CRW"); + + ret = css_find_installed_chpid(sid, &chpid); + if (ret) { + report_fail("No CHPID found: ret=%d", ret); + return -1; + } + + cc = rchp(chpid); + report(!cc, "rhcp cc != 0"); + + report_prefix_pop(); + + return 0; +} diff --git a/s390x/css.c b/s390x/css.c index 396007ed0074..fcc264eecd4b 100644 --- a/s390x/css.c +++ b/s390x/css.c @@ -388,6 +388,87 @@ static void test_msch(void) schib.pmcw.flags = old_pmcw_flags; } +static void check_stcrw_no_crw_available(void) +{ + uint32_t crw = 0xfeedc0fe; + int cc; + + report_prefix_push("No CRW available"); + cc = stcrw(&crw); + report(cc == 1, "cc == 1"); + report(!crw, "stored zeroes in crw"); + report_prefix_pop(); +} + +static int check_stcrw_crw_available(void) +{ + const uint32_t magic = 0xfeedc0fe; + uint32_t crw = magic; + int cc; + + report_prefix_push("CRW available"); + cc = stcrw(&crw); + report(!cc, "cc is zero"); + report(crw != magic, "stored crw"); + report_prefix_pop(); + + return crw; +} + +static uint32_t crw_get_rsc(uint32_t crw) +{ + const int rsc_begin = 4; + const int rsc_end = 8; + + return (crw & GENMASK(31 - rsc_begin, 31 - rsc_end)) >> 24; +} + +#define CRW_RSC_CHP 4 +static void test_stcrw(void) +{ + const int align_to = 4; + int res; + uint32_t crw; + + if (!test_device_sid) { + report_skip("No device"); + return; + } + + report_prefix_push("Unaligned"); + for (int i = 1; i < align_to; i *= 2) { + report_prefix_pushf("%d", i); + + expect_pgm_int(); + stcrw((uint32_t *)(alignment_test_page + i)); + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); + + report_prefix_pop(); + } + report_prefix_pop(); + + report_prefix_push("No CRW available initally"); + check_stcrw_no_crw_available(); + report_prefix_pop(); + + res = css_generate_crw(test_device_sid); + if (res) { + report_skip("Couldn't generate CRW"); + report_prefix_pop(); + return; + } + + crw = check_stcrw_crw_available(); + + report_prefix_push("CRW available"); + report(crw_get_rsc(crw) == CRW_RSC_CHP, "CRW has Channel Path RSC"); + report_prefix_pop(); + + report_prefix_push("No more CRWs pending"); + check_stcrw_no_crw_available(); + report_prefix_pop(); +} + static struct { const char *name; void (*func)(void); @@ -401,6 +482,7 @@ static struct { { "measurement block format0", test_schm_fmt0 }, { "measurement block format1", test_schm_fmt1 }, { "msch", test_msch }, + { "stcrw", test_stcrw }, { NULL, NULL } }; From patchwork Thu Feb 24 15:43:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 12758786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56614C433F5 for ; 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Thu, 24 Feb 2022 15:43:38 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 36E054204D; Thu, 24 Feb 2022 15:43:38 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EA59042042; Thu, 24 Feb 2022 15:43:37 +0000 (GMT) Received: from t46lp57.lnxne.boe (unknown [9.152.108.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Feb 2022 15:43:37 +0000 (GMT) From: Nico Boehr To: kvm@vger.kernel.org, linux-s390@vger.kernel.org Cc: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, david@redhat.com Subject: [kvm-unit-tests PATCH v4 5/8] s390x: Add more tests for SSCH Date: Thu, 24 Feb 2022 16:43:33 +0100 Message-Id: <20220224154336.3459839-6-nrb@linux.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220224154336.3459839-1-nrb@linux.ibm.com> References: <20220224154336.3459839-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: uG99Rsn7-U2IYiG9GZv9jJIuPPJbUJSa X-Proofpoint-ORIG-GUID: TSXzVLYaX8q8Q3GIpXI4vSeFQk7F2yhc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-24_03,2022-02-24_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 mlxscore=0 impostorscore=0 suspectscore=0 adultscore=0 malwarescore=0 spamscore=0 bulkscore=0 mlxlogscore=999 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202240092 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org We already have some coverage of SSCH due to its use in start_ccw1_chain() in css_lib, but two more cases deserve our attention: - unaligned operand address. We check for misalignment by 1 and 2 bytes. - an invalid ORB structure. Signed-off-by: Nico Boehr Reviewed-by: Claudio Imbrenda Reviewed-by: Pierre Morel --- s390x/css.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/s390x/css.c b/s390x/css.c index fcc264eecd4b..7fe5283c41d0 100644 --- a/s390x/css.c +++ b/s390x/css.c @@ -469,6 +469,38 @@ static void test_stcrw(void) report_prefix_pop(); } +static void test_ssch(void) +{ + const int align_to = 4; + struct orb orb; + + if (!test_device_sid) { + report_skip("No device"); + return; + } + + report_prefix_push("Unaligned"); + for (int i = 1; i < align_to; i *= 2) { + report_prefix_pushf("%d", i); + + expect_pgm_int(); + ssch(test_device_sid, (struct orb *)(alignment_test_page + i)); + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); + + report_prefix_pop(); + } + report_prefix_pop(); + + report_prefix_push("Invalid ORB"); + + memset(&orb, 0xff, sizeof(orb)); + expect_pgm_int(); + ssch(test_device_sid, &orb); + check_pgm_int_code(PGM_INT_CODE_OPERAND); + + report_prefix_pop(); +} + static struct { const char *name; void (*func)(void); @@ -483,6 +515,7 @@ static struct { { "measurement block format1", test_schm_fmt1 }, { "msch", test_msch }, { "stcrw", test_stcrw }, + { "ssch", test_ssch }, { NULL, NULL } }; From patchwork Thu Feb 24 15:43:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 12758795 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6AF98C433F5 for ; Thu, 24 Feb 2022 15:44:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236633AbiBXPod (ORCPT ); Thu, 24 Feb 2022 10:44:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236570AbiBXPoS (ORCPT ); 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Thu, 24 Feb 2022 15:43:38 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8207842045; Thu, 24 Feb 2022 15:43:38 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 41E3B42052; Thu, 24 Feb 2022 15:43:38 +0000 (GMT) Received: from t46lp57.lnxne.boe (unknown [9.152.108.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Feb 2022 15:43:38 +0000 (GMT) From: Nico Boehr To: kvm@vger.kernel.org, linux-s390@vger.kernel.org Cc: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, david@redhat.com Subject: [kvm-unit-tests PATCH v4 6/8] s390x: Add more tests for STSCH Date: Thu, 24 Feb 2022 16:43:34 +0100 Message-Id: <20220224154336.3459839-7-nrb@linux.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220224154336.3459839-1-nrb@linux.ibm.com> References: <20220224154336.3459839-1-nrb@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: cKABAUjr1baXMl0CLSiGNYCr4ml_P3Yn X-Proofpoint-GUID: BAlDl4L1e2FCH11wXnUBCVDEr_yybQNN X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-24_03,2022-02-24_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 adultscore=0 bulkscore=0 suspectscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 phishscore=0 lowpriorityscore=0 mlxlogscore=999 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202240092 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org css_lib extensively uses STSCH, but two more cases deserve their own tests: - unaligned address for SCHIB. We check for misalignment by 1 and 2 bytes. - channel not operational - bit 47 in SID not set - bit 5 of PMCW flags. As per the principles of operation, bit 5 of the PMCW flags shall be ignored by msch and always stored as zero by stsch. Older QEMU versions require this bit to always be zero on msch, which is why this test may fail. A fix is available in QEMU master commit 2df59b73e086 ("s390x/css: fix PMCW invalid mask"). Here's the QEMU PMCW invalid mask fix: https://lists.nongnu.org/archive/html/qemu-s390x/2021-12/msg00100.html Signed-off-by: Nico Boehr Reviewed-by: Claudio Imbrenda Acked-by: Janosch Frank Reviewed-by: Pierre Morel --- s390x/css.c | 82 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/s390x/css.c b/s390x/css.c index 7fe5283c41d0..dd84e670ce99 100644 --- a/s390x/css.c +++ b/s390x/css.c @@ -501,6 +501,86 @@ static void test_ssch(void) report_prefix_pop(); } +static void test_stsch(void) +{ + const int align_to = 4; + struct schib schib; + int cc; + + if (!test_device_sid) { + report_skip("No device"); + return; + } + + report_prefix_push("Unaligned"); + for (int i = 1; i < align_to; i *= 2) { + report_prefix_pushf("%d", i); + + expect_pgm_int(); + stsch(test_device_sid, (struct schib *)(alignment_test_page + i)); + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); + + report_prefix_pop(); + } + report_prefix_pop(); + + report_prefix_push("Invalid subchannel number"); + cc = stsch(0x0001ffff, &schib); + report(cc == 3, "Channel not operational"); + report_prefix_pop(); + + /* + * No matter if multiple-subchannel-set facility is installed, bit 47 + * always needs to be 1. + */ + report_prefix_push("Bit 47 in SID is zero"); + expect_pgm_int(); + stsch(0x0000ffff, &schib); + check_pgm_int_code(PGM_INT_CODE_OPERAND); + report_prefix_pop(); +} + +/* + * According to architecture MSCH does ignore bit 5 of the second word + * but STSCH will store bit 5 as zero. + */ +static void test_pmcw_bit5(void) +{ + int cc; + uint16_t old_pmcw_flags; + + cc = stsch(test_device_sid, &schib); + if (cc) { + report_fail("stsch: sch %08x failed with cc=%d", test_device_sid, cc); + return; + } + old_pmcw_flags = schib.pmcw.flags; + + report_prefix_push("Bit 5 set"); + + schib.pmcw.flags = old_pmcw_flags | BIT(15 - 5); + cc = msch(test_device_sid, &schib); + report(!cc, "MSCH cc == 0"); + + cc = stsch(test_device_sid, &schib); + report(!cc, "STSCH cc == 0"); + report(!(schib.pmcw.flags & BIT(15 - 5)), "STSCH PMCW Bit 5 is clear"); + + report_prefix_pop(); + + report_prefix_push("Bit 5 clear"); + + schib.pmcw.flags = old_pmcw_flags & ~BIT(15 - 5); + cc = msch(test_device_sid, &schib); + report(!cc, "MSCH cc == 0"); + + cc = stsch(test_device_sid, &schib); + report(!cc, "STSCH cc == 0"); + report(!(schib.pmcw.flags & BIT(15 - 5)), "STSCH PMCW Bit 5 is clear"); + + report_prefix_pop(); +} + static struct { const char *name; void (*func)(void); @@ -516,6 +596,8 @@ static struct { { "msch", test_msch }, { "stcrw", test_stcrw }, { "ssch", test_ssch }, + { "stsch", test_stsch }, + { "pmcw bit 5 ignored", test_pmcw_bit5 }, { NULL, NULL } }; From patchwork Thu Feb 24 15:43:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 12758796 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39EEEC433EF for ; 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Thu, 24 Feb 2022 15:43:39 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D54514204C; Thu, 24 Feb 2022 15:43:38 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8E79342049; Thu, 24 Feb 2022 15:43:38 +0000 (GMT) Received: from t46lp57.lnxne.boe (unknown [9.152.108.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Feb 2022 15:43:38 +0000 (GMT) From: Nico Boehr To: kvm@vger.kernel.org, linux-s390@vger.kernel.org Cc: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, david@redhat.com Subject: [kvm-unit-tests PATCH v4 7/8] s390x: Add tests for TSCH Date: Thu, 24 Feb 2022 16:43:35 +0100 Message-Id: <20220224154336.3459839-8-nrb@linux.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220224154336.3459839-1-nrb@linux.ibm.com> References: <20220224154336.3459839-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: b5RMUmW9QZrfVB8K6CryxC-ZvHiV_0Za X-Proofpoint-GUID: Cj1E2J3A7V4wz9S0aWyCumCjRD3LeUnQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-24_03,2022-02-24_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxscore=0 malwarescore=0 suspectscore=0 clxscore=1015 adultscore=0 phishscore=0 bulkscore=0 priorityscore=1501 mlxlogscore=999 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202240092 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org TSCH has two special cases which need to be tested: - unaligned address. We test for misalignment by 1 and 2 bytes. - channel not operational - bit 47 in SID not set Signed-off-by: Nico Boehr Reviewed-by: Claudio Imbrenda Reviewed-by: Pierre Morel --- s390x/css.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/s390x/css.c b/s390x/css.c index dd84e670ce99..a333e55a290d 100644 --- a/s390x/css.c +++ b/s390x/css.c @@ -581,6 +581,41 @@ static void test_pmcw_bit5(void) report_prefix_pop(); } +static void test_tsch(void) +{ + const int align_to = 4; + struct irb irb; + int cc; + + if (!test_device_sid) { + report_skip("No device"); + return; + } + + report_prefix_push("Unaligned"); + for (int i = 1; i < align_to; i *= 2) { + report_prefix_pushf("%d", i); + + expect_pgm_int(); + tsch(test_device_sid, (struct irb *)(alignment_test_page + i)); + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); + + report_prefix_pop(); + } + report_prefix_pop(); + + report_prefix_push("Invalid subchannel number"); + cc = tsch(0x0001ffff, &irb); + report(cc == 3, "Channel not operational"); + report_prefix_pop(); + + report_prefix_push("Bit 47 in SID is zero"); + expect_pgm_int(); + tsch(0x0000ffff, &irb); + check_pgm_int_code(PGM_INT_CODE_OPERAND); + report_prefix_pop(); +} + static struct { const char *name; void (*func)(void); @@ -598,6 +633,7 @@ static struct { { "ssch", test_ssch }, { "stsch", test_stsch }, { "pmcw bit 5 ignored", test_pmcw_bit5 }, + { "tsch", test_tsch }, { NULL, NULL } }; From patchwork Thu Feb 24 15:43:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Boehr X-Patchwork-Id: 12758787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 088A0C43217 for ; Thu, 24 Feb 2022 15:44:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236618AbiBXPo1 (ORCPT ); Thu, 24 Feb 2022 10:44:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236574AbiBXPoT (ORCPT ); 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Thu, 24 Feb 2022 15:43:39 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3406F42042; Thu, 24 Feb 2022 15:43:39 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E9AEC4203F; Thu, 24 Feb 2022 15:43:38 +0000 (GMT) Received: from t46lp57.lnxne.boe (unknown [9.152.108.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Feb 2022 15:43:38 +0000 (GMT) From: Nico Boehr To: kvm@vger.kernel.org, linux-s390@vger.kernel.org Cc: frankja@linux.ibm.com, imbrenda@linux.ibm.com, thuth@redhat.com, david@redhat.com Subject: [kvm-unit-tests PATCH v4 8/8] s390x: Add EPSW test Date: Thu, 24 Feb 2022 16:43:36 +0100 Message-Id: <20220224154336.3459839-9-nrb@linux.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220224154336.3459839-1-nrb@linux.ibm.com> References: <20220224154336.3459839-1-nrb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: HfTkeQ3MOLp947RtA33SAExE-2evzpyP X-Proofpoint-ORIG-GUID: rls4eah6NmmdzIvSXWu8LWT3D-gmWSqB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-24_03,2022-02-24_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 mlxscore=0 impostorscore=0 suspectscore=0 adultscore=0 malwarescore=0 spamscore=0 bulkscore=0 mlxlogscore=999 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2201110000 definitions=main-2202240092 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org EPSW is only intercepted in certain cases. One of these cases is if we have a CRW pending and machine check interrupts are masked. This can be achieved by issuing a RCHP on a valid channel path. This is why we need the CSS lib and an IO device in this test and hence need to skip it when not running under QEMU. Three special cases deserve our attention: - upper 32 bits of both operands are never modified, - second operand is not modified if it is zero. - when both operands are zero, bits 0-11 and 13-31 of the PSW are stored in r0. We also verify we get the correct contents when the second operand is zero. To do so, we save the data stored at the first operand in the first case as a reference. As we don't mess with the PSW, the only thing that might change is the Condition Code (CC) due to some instruction in between, so we zero it out using zero_out_cc_from_epsw_op1(). This test must be fenced when running in non-QEMU. Signed-off-by: Nico Boehr Reviewed-by: Claudio Imbrenda --- s390x/Makefile | 1 + s390x/epsw.c | 113 ++++++++++++++++++++++++++++++++++++++++++++ s390x/unittests.cfg | 4 ++ 3 files changed, 118 insertions(+) create mode 100644 s390x/epsw.c diff --git a/s390x/Makefile b/s390x/Makefile index a76b78e5a011..25449708da0d 100644 --- a/s390x/Makefile +++ b/s390x/Makefile @@ -27,6 +27,7 @@ tests += $(TEST_DIR)/edat.elf tests += $(TEST_DIR)/mvpg-sie.elf tests += $(TEST_DIR)/spec_ex-sie.elf tests += $(TEST_DIR)/firq.elf +tests += $(TEST_DIR)/epsw.elf pv-tests += $(TEST_DIR)/pv-diags.elf diff --git a/s390x/epsw.c b/s390x/epsw.c new file mode 100644 index 000000000000..192115cf2fac --- /dev/null +++ b/s390x/epsw.c @@ -0,0 +1,113 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * EPSW Interception Tests + * + * Copyright IBM Corp. 2022 + * + * Authors: + * Nico Boehr + */ +#include +#include +#include + +static uint32_t zero_out_cc_from_epsw_op1(uint32_t epsw_op1) +{ + return epsw_op1 & ~GENMASK(31 - 18, 31 - 20); +} + +static void generate_crw(void) +{ + int test_device_sid = css_enumerate(); + int cc, ret; + + if (!(test_device_sid & SCHID_ONE)) { + report_fail("No I/O device found"); + return; + } + + cc = css_enable(test_device_sid, IO_SCH_ISC); + report(cc == 0, "Enable subchannel %08x", test_device_sid); + + ret = css_generate_crw(test_device_sid); + if (ret) + report_fail("Couldn't generate CRW"); +} + +static void test_epsw(void) +{ + const uint64_t MAGIC1 = 0x1234567890abcdefUL; + const uint64_t MAGIC2 = 0xcafedeadbeeffaceUL; + + uint64_t op1 = MAGIC1; + uint64_t op2 = MAGIC2; + uint32_t prev_epsw_op1; + + /* + * having machine check interrupts masked and pending CRW ensures + * EPSW is intercepted under KVM + */ + generate_crw(); + + report_prefix_push("both operands given"); + asm volatile( + "epsw %0, %1\n" + : "+&d" (op1), "+&a" (op2)); + report(upper_32_bits(op1) == upper_32_bits(MAGIC1) && + upper_32_bits(op2) == upper_32_bits(MAGIC2), + "upper 32 bits unmodified"); + report(lower_32_bits(op1) != lower_32_bits(MAGIC1) && + lower_32_bits(op2) != lower_32_bits(MAGIC2), + "lower 32 bits modified"); + prev_epsw_op1 = zero_out_cc_from_epsw_op1(lower_32_bits(op1)); + report_prefix_pop(); + + report_prefix_push("second operand 0"); + op1 = MAGIC1; + op2 = MAGIC2; + asm volatile( + " lgr 0,%[op2]\n" + " epsw %[op1], 0\n" + " lgr %[op2],0\n" + : [op2] "+&d" (op2), [op1] "+&a" (op1) + : + : "0"); + report(upper_32_bits(op1) == upper_32_bits(MAGIC1), + "upper 32 bits of first operand unmodified"); + report(zero_out_cc_from_epsw_op1(lower_32_bits(op1)) == prev_epsw_op1, + "first operand matches previous reading"); + report(op2 == MAGIC2, "r0 unmodified"); + report_prefix_pop(); + + report_prefix_push("both operands 0"); + op1 = MAGIC1; + asm volatile( + " lgr 0,%[op1]\n" + " epsw 0, 0\n" + " lgr %[op1],0\n" + : [op1] "+&d" (op1) + : + : "0"); + report(upper_32_bits(op1) == upper_32_bits(MAGIC1), + "upper 32 bits of first operand unmodified"); + report(zero_out_cc_from_epsw_op1(lower_32_bits(op1)) == prev_epsw_op1, + "first operand matches previous reading"); + report_prefix_pop(); +} + +int main(int argc, char **argv) +{ + if (!vm_is_kvm() && !vm_is_tcg()) { + report_skip("Not running under QEMU"); + goto done; + } + + report_prefix_push("epsw"); + + test_epsw(); + +done: + report_prefix_pop(); + + return report_summary(); +} diff --git a/s390x/unittests.cfg b/s390x/unittests.cfg index 8b148fe31ac0..aeb82246dddf 100644 --- a/s390x/unittests.cfg +++ b/s390x/unittests.cfg @@ -139,3 +139,7 @@ accel = tcg [sck] file = sck.elf + +[epsw] +file = epsw.elf +extra_params = -device virtio-net-ccw