From patchwork Fri Mar 4 07:51:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 12768668 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9FD0C433F5 for ; Fri, 4 Mar 2022 07:53:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Tl8ssol/Tz5h5k5pL3BXDwVSu54ZIDkEfpTTfbV9M/o=; b=I0o6sbdNEFAd2j 7scq3BOC56wCuiFuSHN5bgQW4OeWg2ZgT3NdDqDNcxc6AWFQ+fEM8WJm4YzgizBf2L0gFopQ2B8/h otJrSVuSeGW0eGJP0LitDO6C0pJVFcIGO45KRuzfdsvdbjygkKJP/CVtxUxOaXWQmuHoTH/yhr4xE qeT8m5TgG4ofHwBpfizazLFl/BgM5990/BUsjn3qPk4PE79xGbUZTn9uYlzH4+hHoHyZz2ECnT71w +N7kDEVI7yiOfW1ppbvd8jbJo981paPhwcSfmRoNryLQ2l1kjYWUBsOP8isyThL6akvEkZlROzxOY R8NMjw4tNKDwhiGKLLKg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ2iy-008r2t-KD; Fri, 04 Mar 2022 07:51:40 +0000 Received: from mail-ej1-x636.google.com ([2a00:1450:4864:20::636]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ2iu-008r1j-Ln for linux-arm-kernel@lists.infradead.org; Fri, 04 Mar 2022 07:51:38 +0000 Received: by mail-ej1-x636.google.com with SMTP id hw13so15662037ejc.9 for ; Thu, 03 Mar 2022 23:51:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20210112.gappssmtp.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=vz7l809wHa5Fftg5BtJ8l6brERiXH+s22ojtiPizhug=; b=bqYgHQoJVx2jDn9ok2STWrbnLOKzeu5YSD/Wr+ohdqUidpzPjRNOl/y6jkSuDDct5Y WduNlOSq+WNDwPskdd1mMZXhD05/LC8rl+Y9+Fsi64SHbecWXeOqXgDM3F4k34e7rVHb TY+fUz9+MIvS48axBh9IRZze89cjs4kj5gDb+yGp6wJ9S9q+YUfsaSwjx32YOoGGrKap kJs209V9cJYtAuGt4SCEbTrfPg7HFfsqI37pG1nJt4zwuQu1xhVR8fBe8ruUfuQw3utw AZhs9BhjZxtchrI0P1s5UeJ474Rb065KgapWevvEKYwmMvIzCsSgKYp6XTMJZCYecfG5 QTjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=vz7l809wHa5Fftg5BtJ8l6brERiXH+s22ojtiPizhug=; b=AUR820nMKVkKNeJNx216GIRY0CsEhv68k9X8ztUkBqGfZZuFBeF4PczReU3MsVJGRj 1U2PwtgOJQPF8D+7D08BVqoCM/1m2bFribXd3PFkXvOTjovpvu7X0Evja35qf83snEeR jZ3CniYOD9t0rpIhVV//WnLSiIdd4LSkNftc+NM06BTY7o4tx+hTHVT4mNMVD9sgzow8 ZFX9OO3CT7NqsVT6RMPojUZWOioqUD2knqs+VAqYq0zUakkMivTaKxPimUi+SX7YOaMm clUCtYBJefo98bsYvKYNN0tDXWoXFl7we1FXKtKqKzrxpZDMBJdUTy8qMAeLh21KhTVY SDbw== X-Gm-Message-State: AOAM533MBnAbyh402MBJhuuG4SyBoSzhZl3kLtoWhnWf2EAbrqkBCO3/ XM87PMhqxBCPMxH6Ni6oE8w3dA== X-Google-Smtp-Source: ABdhPJx71Gte/J9uqyoORu4fghnzOUu7G/X5LmAlDLfQe1KP51rNEaq4zK2+USNa8RcA2g3Opg8YEg== X-Received: by 2002:a17:906:3ad3:b0:6cd:382b:86e5 with SMTP id z19-20020a1709063ad300b006cd382b86e5mr28762195ejd.145.1646380294245; Thu, 03 Mar 2022 23:51:34 -0800 (PST) Received: from localhost ([2a02:768:2307:40d6::f9e]) by smtp.gmail.com with ESMTPSA id qw18-20020a1709066a1200b006d6e5c56dd9sm1428638ejc.212.2022.03.03.23.51.33 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Mar 2022 23:51:33 -0800 (PST) From: Michal Simek To: linux-kernel@vger.kernel.org, monstr@monstr.eu, michal.simek@xilinx.com, git@xilinx.com Cc: Robert Hancock , Stefan Asserhall , Marc Zyngier , Thomas Gleixner , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2] irqchip: xilinx: Enable generic irq multi handler Date: Fri, 4 Mar 2022 08:51:29 +0100 Message-Id: X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220303_235136_783326_2541EB7F X-CRM114-Status: GOOD ( 19.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Register default arch handler via driver instead of directly pointing to xilinx intc controller. This patch makes architecture code more generic. Signed-off-by: Michal Simek Reviewed-by: Stefan Asserhall --- Changes in v2: - Remove concurrent_irq variable - Use generic_handle_domain_irq() - layout by Marc arch/microblaze/Kconfig | 2 ++ arch/microblaze/include/asm/irq.h | 3 --- arch/microblaze/kernel/irq.c | 16 +--------------- drivers/irqchip/irq-xilinx-intc.c | 30 ++++++++++++++++-------------- 4 files changed, 19 insertions(+), 32 deletions(-) diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 59798e43cdb0..da568e981604 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -45,6 +45,8 @@ config MICROBLAZE select SET_FS select ZONE_DMA select TRACE_IRQFLAGS_SUPPORT + select GENERIC_IRQ_MULTI_HANDLER + select HANDLE_DOMAIN_IRQ # Endianness selection choice diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h index 0a28e80bbab0..cb6ab55d1d01 100644 --- a/arch/microblaze/include/asm/irq.h +++ b/arch/microblaze/include/asm/irq.h @@ -11,7 +11,4 @@ struct pt_regs; extern void do_IRQ(struct pt_regs *regs); -/* should be defined in each interrupt controller driver */ -extern unsigned int xintc_get_irq(void); - #endif /* _ASM_MICROBLAZE_IRQ_H */ diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c index 903dad822fad..1f8cb4c4f74f 100644 --- a/arch/microblaze/kernel/irq.c +++ b/arch/microblaze/kernel/irq.c @@ -20,27 +20,13 @@ #include #include -static u32 concurrent_irq; - void __irq_entry do_IRQ(struct pt_regs *regs) { - unsigned int irq; struct pt_regs *old_regs = set_irq_regs(regs); trace_hardirqs_off(); irq_enter(); - irq = xintc_get_irq(); -next_irq: - BUG_ON(!irq); - generic_handle_irq(irq); - - irq = xintc_get_irq(); - if (irq != -1U) { - pr_debug("next irq: %d\n", irq); - ++concurrent_irq; - goto next_irq; - } - + handle_arch_irq(regs); irq_exit(); set_irq_regs(old_regs); trace_hardirqs_on(); diff --git a/drivers/irqchip/irq-xilinx-intc.c b/drivers/irqchip/irq-xilinx-intc.c index 356a59755d63..238d3d344949 100644 --- a/drivers/irqchip/irq-xilinx-intc.c +++ b/drivers/irqchip/irq-xilinx-intc.c @@ -32,6 +32,8 @@ #define MER_ME (1<<0) #define MER_HIE (1<<1) +#define SPURIOUS_IRQ (-1U) + static DEFINE_STATIC_KEY_FALSE(xintc_is_be); struct xintc_irq_chip { @@ -110,20 +112,6 @@ static struct irq_chip intc_dev = { .irq_mask_ack = intc_mask_ack, }; -unsigned int xintc_get_irq(void) -{ - unsigned int irq = -1; - u32 hwirq; - - hwirq = xintc_read(primary_intc, IVR); - if (hwirq != -1U) - irq = irq_find_mapping(primary_intc->root_domain, hwirq); - - pr_debug("irq-xilinx: hwirq=%d, irq=%d\n", hwirq, irq); - - return irq; -} - static int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) { struct xintc_irq_chip *irqc = d->host_data; @@ -164,6 +152,19 @@ static void xil_intc_irq_handler(struct irq_desc *desc) chained_irq_exit(chip, desc); } +static void xil_intc_handle_irq(struct pt_regs *regs) +{ + u32 hwirq; + + do { + hwirq = xintc_read(primary_intc, IVR); + if (unlikely(hwirq == SPURIOUS_IRQ)) + break; + + generic_handle_domain_irq(primary_intc->root_domain, hwirq); + } while (true); +} + static int __init xilinx_intc_of_init(struct device_node *intc, struct device_node *parent) { @@ -233,6 +234,7 @@ static int __init xilinx_intc_of_init(struct device_node *intc, } else { primary_intc = irqc; irq_set_default_host(primary_intc->root_domain); + set_handle_irq(xil_intc_handle_irq); } return 0;