From patchwork Tue Mar 15 23:23:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miles Chen X-Patchwork-Id: 12781986 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34925C433EF for ; Tue, 15 Mar 2022 23:33:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=dhVCKtOf9LyozzDvguFfgpiVMKiFQYU+A0wJkrFRkUQ=; b=BdEbVsjm95hAT0 IseiCqyIndk1cHYfteIPCCUseDsI71jhf2gNLYiX4Mc2SfNhOg6APj3reY0tVybvH1UeW/ZwLD/Vl jEnjPYZo4wRew3zn9y70mT6SW7Y5JDMlLDQC1VrPb7yUU5P3A/JcVJqAji3xY6bF53BQMtzwdUGJV SwS9f3C6U8D36gdG32cIfGXAdPfwOjJBrgZ1qTT3aAlFYq3e7xSjSKMI0y7++1tJDGp8wwDYScn1c dpVw3HF4wDMQnV6AdmL2xXVAfcw55jMiSpqnw78UY6Og9v+QuYKLypfWPLUdIsgKRNqzdHr68iYr3 f9SBLipCqBUSRP0BbV8A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUGfd-00Au8r-JK; Tue, 15 Mar 2022 23:33:41 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUGfP-00Au6S-CJ; Tue, 15 Mar 2022 23:33:30 +0000 X-UUID: 03f7ceb1b433495cb22e170770ddfe79-20220315 X-UUID: 03f7ceb1b433495cb22e170770ddfe79-20220315 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 438542943; Tue, 15 Mar 2022 16:33:18 -0700 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 15 Mar 2022 16:23:16 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 16 Mar 2022 07:23:02 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 16 Mar 2022 07:23:02 +0800 From: Miles Chen To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , Jie Qiu , Junzhi Zhao CC: Miles Chen , Zhiqiang Lin , CK Hu , "AngeloGioacchino Del Regno" , , , , Subject: [RESEND v4 PATCH] drm/mediatek: Fix mtk_cec_mask() Date: Wed, 16 Mar 2022 07:23:00 +0800 Message-ID: <20220315232301.2434-1-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220315_163327_431409_491E7533 X-CRM114-Status: GOOD ( 12.33 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org In current implementation, mtk_cec_mask() writes val into target register and ignores the mask. After talking to our hdmi experts, mtk_cec_mask() should read a register, clean only mask bits, and update (val | mask) bits to the register. Fixes: 8f83f26891e1 ("drm/mediatek: Add HDMI support") Signed-off-by: Miles Chen Reviewed-by: Chun-Kuang Hu Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Matthias Brugger Cc: Zhiqiang Lin Cc: CK Hu Cc: Matthias Brugger Cc: AngeloGioacchino Del Regno --- Change since v1: add Fixes tag Change since v2: add explanation of mtk_cec_mask() Change since v3: change misleading subject and modify the commit message since this is a bug fix patch --- drivers/gpu/drm/mediatek/mtk_cec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_cec.c b/drivers/gpu/drm/mediatek/mtk_cec.c index e9cef5c0c8f7..cdfa648910b2 100644 --- a/drivers/gpu/drm/mediatek/mtk_cec.c +++ b/drivers/gpu/drm/mediatek/mtk_cec.c @@ -85,7 +85,7 @@ static void mtk_cec_mask(struct mtk_cec *cec, unsigned int offset, u32 tmp = readl(cec->regs + offset) & ~mask; tmp |= val & mask; - writel(val, cec->regs + offset); + writel(tmp, cec->regs + offset); } void mtk_cec_set_hpd_event(struct device *dev,