From patchwork Wed Mar 23 16:45:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: kajoljain X-Patchwork-Id: 12789944 Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B64F6462 for ; Wed, 23 Mar 2022 16:46:20 +0000 (UTC) Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 22NGJKn4025581; Wed, 23 Mar 2022 16:46:10 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : content-transfer-encoding : mime-version; s=pp1; bh=dk8FCBmyhr8d985yyeKRz5mOH1J1N/kLnhzi+JyPdqY=; b=SY/xtDpBnRJSCQYFpJSmAclxShPml7RXzuBeXS0AdfvxdMKMX0eOMQum+Yauu/mv/zFB 8cEY9WkQEQMvowA21iRIE9iOgbcx3CaTOwc3Wxe9xOOE1CcmDM1APb0LpwLxoofid+Lh fnZlvS7/IoFPASLFZux3IffjXxuF110yiPsvW7dpW9GsKwE2C58JzMuLp2o3zp14jhK4 wcsPK2Gv7LAoWcRjsQ3lm5uXeuC6hAYOMup+B7bXKpYW6GbfPIHc3gLd//cMtTKEB+G+ ofk4/16a8etldw52NkJefhpcLvDxj0x2AJdSc9UiMRWMO0v2ajTrVs55f/BqE82CguJs CQ== Received: from ppma03ams.nl.ibm.com (62.31.33a9.ip4.static.sl-reverse.com [169.51.49.98]) by mx0b-001b2d01.pphosted.com with ESMTP id 3f06yfgkhq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Mar 2022 16:46:10 +0000 Received: from pps.filterd (ppma03ams.nl.ibm.com [127.0.0.1]) by ppma03ams.nl.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 22NGjMu9013945; Wed, 23 Mar 2022 16:46:08 GMT Received: from b06avi18878370.portsmouth.uk.ibm.com (b06avi18878370.portsmouth.uk.ibm.com [9.149.26.194]) by ppma03ams.nl.ibm.com with ESMTP id 3ew6t910s2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Mar 2022 16:46:08 +0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 22NGk99O42402122 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 23 Mar 2022 16:46:09 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4B8AE4C04E; Wed, 23 Mar 2022 16:46:05 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3D9FA4C044; Wed, 23 Mar 2022 16:46:00 +0000 (GMT) Received: from li-e8dccbcc-2adc-11b2-a85c-bc1f33b9b810.ibm.com.com (unknown [9.43.30.161]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 23 Mar 2022 16:45:59 +0000 (GMT) From: Kajol Jain To: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, peterz@infradead.org, dan.j.williams@intel.com, ira.weiny@intel.com, vishal.l.verma@intel.com Cc: santosh@fossix.org, maddy@linux.ibm.com, rnsastry@linux.ibm.com, aneesh.kumar@linux.ibm.com, atrajeev@linux.vnet.ibm.com, vaibhav@linux.ibm.com, tglx@linutronix.de, kjain@linux.ibm.com, kernel test robot Subject: [v2 PATCH 1/2] drivers/nvdimm: Fix build failure when CONFIG_PERF_EVENTS is not set Date: Wed, 23 Mar 2022 22:15:49 +0530 Message-Id: <20220323164550.109768-1-kjain@linux.ibm.com> X-Mailer: git-send-email 2.27.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 8nMy5r5dcVttaXPpbYzX4-wTgJQ3aAPo X-Proofpoint-ORIG-GUID: 8nMy5r5dcVttaXPpbYzX4-wTgJQ3aAPo X-Proofpoint-UnRewURL: 0 URL was un-rewritten Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-23_07,2022-03-23_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 bulkscore=0 mlxlogscore=999 impostorscore=0 clxscore=1015 mlxscore=0 malwarescore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2203230087 The following build failure occurs when CONFIG_PERF_EVENTS is not set as generic pmu functions are not visible in that scenario. |-- s390-randconfig-r044-20220313 | |-- nd_perf.c:(.text):undefined-reference-to-perf_pmu_migrate_context | |-- nd_perf.c:(.text):undefined-reference-to-perf_pmu_register | `-- nd_perf.c:(.text):undefined-reference-to-perf_pmu_unregister Similar build failure in nds32 architecture: nd_perf.c:(.text+0x21e): undefined reference to `perf_pmu_migrate_context' nd_perf.c:(.text+0x434): undefined reference to `perf_pmu_register' nd_perf.c:(.text+0x57c): undefined reference to `perf_pmu_unregister' Fix this issue by adding check for CONFIG_PERF_EVENTS config option and disabling the nvdimm perf interface incase this config is not set. Also remove function declaration of perf_pmu_migrate_context, perf_pmu_register, perf_pmu_unregister functions from nd.h as these are common pmu functions which are part of perf_event.h and since we are disabling nvdimm perf interface incase CONFIG_PERF_EVENTS option is not set, we not need to declare them in nd.h Also move the platform_device header file addition part from nd.h to nd_perf.c and add stub functions for register_nvdimm_pmu and unregister_nvdimm_pmu functions to handle CONFIG_PERF_EVENTS=n case. Fixes: 0fab1ba6ad6b ("drivers/nvdimm: Add perf interface to expose nvdimm performance stats") (Commit id based on libnvdimm-for-next tree) Signed-off-by: Kajol Jain Link: https://lore.kernel.org/all/62317124.YBQFU33+s%2FwdvWGj%25lkp@intel.com/ Reported-by: kernel test robot --- drivers/nvdimm/Makefile | 2 +- drivers/nvdimm/nd_perf.c | 1 + include/linux/nd.h | 16 ++++++++++++---- 3 files changed, 14 insertions(+), 5 deletions(-) --- Changelog: v1 -> v2 - Rebase and tested the fix patch changes on top of libnvdimm-for-next branch - Add stub functions for register_nvdimm_pmu and unregister_nvdimm_pmu functions to handle CONFIG_PERF_EVENTS=n case as suggested by Dan Williams - Move the platform_device header file addition part from nd.h to nd_perf.c and just forward declare struct platform_device in nd.h --- diff --git a/drivers/nvdimm/Makefile b/drivers/nvdimm/Makefile index 3fb806748716..ba0296dca9db 100644 --- a/drivers/nvdimm/Makefile +++ b/drivers/nvdimm/Makefile @@ -15,7 +15,7 @@ nd_e820-y := e820.o libnvdimm-y := core.o libnvdimm-y += bus.o libnvdimm-y += dimm_devs.o -libnvdimm-y += nd_perf.o +libnvdimm-$(CONFIG_PERF_EVENTS) += nd_perf.o libnvdimm-y += dimm.o libnvdimm-y += region_devs.o libnvdimm-y += region.o diff --git a/drivers/nvdimm/nd_perf.c b/drivers/nvdimm/nd_perf.c index 314415894acf..433bbb68ae64 100644 --- a/drivers/nvdimm/nd_perf.c +++ b/drivers/nvdimm/nd_perf.c @@ -10,6 +10,7 @@ #define pr_fmt(fmt) "nvdimm_pmu: " fmt #include +#include #define EVENT(_name, _code) enum{_name = _code} diff --git a/include/linux/nd.h b/include/linux/nd.h index 7b2ccbdc1cbc..f3e91c891cbc 100644 --- a/include/linux/nd.h +++ b/include/linux/nd.h @@ -9,7 +9,6 @@ #include #include #include -#include enum nvdimm_event { NVDIMM_REVALIDATE_POISON, @@ -57,15 +56,24 @@ struct nvdimm_pmu { struct cpumask arch_cpumask; }; +struct platform_device; + +#ifdef CONFIG_PERF_EVENTS extern ssize_t nvdimm_events_sysfs_show(struct device *dev, struct device_attribute *attr, char *page); int register_nvdimm_pmu(struct nvdimm_pmu *nvdimm, struct platform_device *pdev); void unregister_nvdimm_pmu(struct nvdimm_pmu *nd_pmu); -void perf_pmu_migrate_context(struct pmu *pmu, int src_cpu, int dst_cpu); -int perf_pmu_register(struct pmu *pmu, const char *name, int type); -void perf_pmu_unregister(struct pmu *pmu); + +#else +static inline int register_nvdimm_pmu(struct nvdimm_pmu *nvdimm, struct platform_device *pdev) +{ + return -ENXIO; +} + +static inline void unregister_nvdimm_pmu(struct nvdimm_pmu *nd_pmu) { } +#endif struct nd_device_driver { struct device_driver drv; From patchwork Wed Mar 23 16:45:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: kajoljain X-Patchwork-Id: 12789945 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5D095CAB for ; Wed, 23 Mar 2022 16:46:29 +0000 (UTC) Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 22NGcY8N000638; Wed, 23 Mar 2022 16:46:21 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=pp1; bh=nQUDxAWdnBxieEOrgt6Rjodl6BsNlSgJ11dryF09ZFU=; b=R206v4B1YR+CMIlxy+9iNJyPUWmQjekM/3AjQ0j17iOnRBPvju+CU8zBSMOWvCf3njVj Lvp4h9Z3OSQ+9/4FfxnxvzuMr4KX3hXuSSrb4GBi8L4le6Ou3dS4AKyCEEodDVNv8o01 d7DeLQ+rnoW0PhgzO0tFKgU/Emqsop4Qeiz4GMOdAvoi1hYMIkjVDkXzIkZV1HZu/RRo gA6A4k4XGJ+lJX1VWs34Wim3Mmv+9WUWsr2vsljH11NWiPivk6uGLjIm0nczRKr0l0Xf 9O5uM7Nlk4x84m7tIXa+RkdpjpITftTxECc6nKGtegYX8AtyaEKv0VXElnm37VIVquWJ tQ== Received: from ppma06ams.nl.ibm.com (66.31.33a9.ip4.static.sl-reverse.com [169.51.49.102]) by mx0a-001b2d01.pphosted.com with ESMTP id 3f000yu6hx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Mar 2022 16:46:20 +0000 Received: from pps.filterd (ppma06ams.nl.ibm.com [127.0.0.1]) by ppma06ams.nl.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 22NGjBlM031956; Wed, 23 Mar 2022 16:46:18 GMT Received: from b06cxnps4076.portsmouth.uk.ibm.com (d06relay13.portsmouth.uk.ibm.com [9.149.109.198]) by ppma06ams.nl.ibm.com with ESMTP id 3ew6ej12h6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Mar 2022 16:46:18 +0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 22NGkFDt49480104 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 23 Mar 2022 16:46:15 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2AC9E4C050; Wed, 23 Mar 2022 16:46:15 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A9D1F4C040; Wed, 23 Mar 2022 16:46:10 +0000 (GMT) Received: from li-e8dccbcc-2adc-11b2-a85c-bc1f33b9b810.ibm.com.com (unknown [9.43.30.161]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 23 Mar 2022 16:46:10 +0000 (GMT) From: Kajol Jain To: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, peterz@infradead.org, dan.j.williams@intel.com, ira.weiny@intel.com, vishal.l.verma@intel.com Cc: santosh@fossix.org, maddy@linux.ibm.com, rnsastry@linux.ibm.com, aneesh.kumar@linux.ibm.com, atrajeev@linux.vnet.ibm.com, vaibhav@linux.ibm.com, tglx@linutronix.de, kjain@linux.ibm.com Subject: [v2 PATCH 2/2] powerpc/papr_scm: Fix build failure when Date: Wed, 23 Mar 2022 22:15:50 +0530 Message-Id: <20220323164550.109768-2-kjain@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220323164550.109768-1-kjain@linux.ibm.com> References: <20220323164550.109768-1-kjain@linux.ibm.com> Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: xIEXUz4LB4lpWrkHGvS1F04dXex9Hqmk X-Proofpoint-GUID: xIEXUz4LB4lpWrkHGvS1F04dXex9Hqmk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-23_07,2022-03-23_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 malwarescore=0 phishscore=0 suspectscore=0 impostorscore=0 clxscore=1015 mlxlogscore=999 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2203230087 The following build failure occurs when CONFIG_PERF_EVENTS is not set as generic pmu functions are not visible in that scenario. arch/powerpc/platforms/pseries/papr_scm.c:372:35: error: ‘struct perf_event’ has no member named ‘attr’ p->nvdimm_events_map[event->attr.config], ^~ In file included from ./include/linux/list.h:5, from ./include/linux/kobject.h:19, from ./include/linux/of.h:17, from arch/powerpc/platforms/pseries/papr_scm.c:5: arch/powerpc/platforms/pseries/papr_scm.c: In function ‘papr_scm_pmu_event_init’: arch/powerpc/platforms/pseries/papr_scm.c:389:49: error: ‘struct perf_event’ has no member named ‘pmu’ struct nvdimm_pmu *nd_pmu = to_nvdimm_pmu(event->pmu); ^~ ./include/linux/container_of.h:18:26: note: in definition of macro ‘container_of’ void *__mptr = (void *)(ptr); \ ^~~ arch/powerpc/platforms/pseries/papr_scm.c:389:30: note: in expansion of macro ‘to_nvdimm_pmu’ struct nvdimm_pmu *nd_pmu = to_nvdimm_pmu(event->pmu); ^~~~~~~~~~~~~ In file included from ./include/linux/bits.h:22, from ./include/linux/bitops.h:6, from ./include/linux/of.h:15, from arch/powerpc/platforms/pseries/papr_scm.c:5: Fix the build issue by adding check for CONFIG_PERF_EVENTS config option and also add stub function for papr_scm_pmu_register to handle the CONFIG_PERF_EVENTS=n case. Also move the position of macro "to_nvdimm_pmu" inorder to merge it in CONFIG_PERF_EVENTS=y block. Fixes: 4c08d4bbc089 ("powerpc/papr_scm: Add perf interface support") (Commit id based on libnvdimm-for-next tree) Signed-off-by: Kajol Jain --- arch/powerpc/platforms/pseries/papr_scm.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) --- Changelog: v1 -> v2 - Rebase and tested the fix patch changes on top of libnvdimm-for-next branch - Add stub function for papr_scm_pmu_register function to handle the CONFIG_PERF_EVENTS=n case. - Move the position of macro "to_nvdimm_pmu" inorder to merge it in CONFIG_PERF_EVENTS=y block. - The initial part of arch/powerpc/platforms/pseries/papr_scm.c could be moved to a headerfile, will work on this in the follow up patchset. --- diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platforms/pseries/papr_scm.c index 4dd513d7c029..9dba9e71fde9 100644 --- a/arch/powerpc/platforms/pseries/papr_scm.c +++ b/arch/powerpc/platforms/pseries/papr_scm.c @@ -69,8 +69,6 @@ #define PAPR_SCM_PERF_STATS_EYECATCHER __stringify(SCMSTATS) #define PAPR_SCM_PERF_STATS_VERSION 0x1 -#define to_nvdimm_pmu(_pmu) container_of(_pmu, struct nvdimm_pmu, pmu) - /* Struct holding a single performance metric */ struct papr_scm_perf_stat { u8 stat_id[8]; @@ -346,6 +344,9 @@ static ssize_t drc_pmem_query_stats(struct papr_scm_priv *p, return 0; } +#ifdef CONFIG_PERF_EVENTS +#define to_nvdimm_pmu(_pmu) container_of(_pmu, struct nvdimm_pmu, pmu) + static int papr_scm_pmu_get_value(struct perf_event *event, struct device *dev, u64 *count) { struct papr_scm_perf_stat *stat; @@ -558,6 +559,10 @@ static void papr_scm_pmu_register(struct papr_scm_priv *p) dev_info(&p->pdev->dev, "nvdimm pmu didn't register rc=%d\n", rc); } +#else +static void papr_scm_pmu_register(struct papr_scm_priv *p) { } +#endif + /* * Issue hcall to retrieve dimm health info and populate papr_scm_priv with the * health information.