From patchwork Wed Mar 23 16:52:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Capper X-Patchwork-Id: 12789954 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 337C2C433F5 for ; Wed, 23 Mar 2022 16:52:42 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id B088F6B0072; Wed, 23 Mar 2022 12:52:41 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id AB8956B0073; Wed, 23 Mar 2022 12:52:41 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 9A7E56B0074; Wed, 23 Mar 2022 12:52:41 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (relay.hostedemail.com [64.99.140.28]) by kanga.kvack.org (Postfix) with ESMTP id 8CCAF6B0072 for ; Wed, 23 Mar 2022 12:52:41 -0400 (EDT) Received: from smtpin07.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay12.hostedemail.com (Postfix) with ESMTP id 42A2D1219C4 for ; Wed, 23 Mar 2022 16:52:41 +0000 (UTC) X-FDA: 79276244922.07.830EAA2 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf19.hostedemail.com (Postfix) with ESMTP id D96261A0030 for ; Wed, 23 Mar 2022 16:52:40 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1925ED6E; Wed, 23 Mar 2022 09:52:40 -0700 (PDT) Received: from localhost.localdomain (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 027283F73D; Wed, 23 Mar 2022 09:52:38 -0700 (PDT) From: Steve Capper To: linux-mm@kvack.org Cc: Steve Capper , David Hildenbrand , Anshuman Khandual , Catalin Marinas , Will Deacon , Peter Zijlstra Subject: [PATCH] tlb: hugetlb: Add arm64 contiguous hint awareness Date: Wed, 23 Mar 2022 16:52:18 +0000 Message-Id: <20220323165218.35499-1-steve.capper@arm.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Rspamd-Server: rspam09 X-Rspam-User: X-Stat-Signature: azgdkfg7zmjs9151zds1edh4od8u753a Authentication-Results: imf19.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf19.hostedemail.com: domain of steve.capper@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=steve.capper@arm.com X-Rspamd-Queue-Id: D96261A0030 X-HE-Tag: 1648054360-270454 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: tlb_remove_huge_tlb_entry only considers PMD_SIZE and PUD_SIZE when updating the mmu_gather structure. Unfortunately on arm64 there are two additional huge page sizes that need to be covered: CONT_PTE_SIZE and CONT_PMD_SIZE. Where an end-user attempts to employ contiguous huge pages, a VM_BUG_ON can be experienced due to the fact that the tlb structure hasn't been correctly updated by the relevant tlb_flush_p.._range() call from tlb_remove_huge_tlb_entry. This patch adds the ability to define per-arch implementations of tlb_remove_huge_tlb_entry and supplies an arm64 implementation that covers the contiguous hint sizes. Reported-by: David Hildenbrand Cc: Anshuman Khandual Cc: Catalin Marinas Cc: Will Deacon Cc: Peter Zijlstra (Intel) Link: https://lore.kernel.org/linux-mm/811c5c8e-b3a2-85d2-049c-717f17c3a03a@redhat.com/ Signed-off-by: Steve Capper Reviewed-by: Catalin Marinas --- arch/arm64/include/asm/tlb.h | 14 ++++++++++++++ include/asm-generic/tlb.h | 2 ++ 2 files changed, 16 insertions(+) diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h index c995d1f4594f..311d201d4e72 100644 --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -19,6 +19,20 @@ static inline void __tlb_remove_table(void *_table) #define tlb_flush tlb_flush static void tlb_flush(struct mmu_gather *tlb); +#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \ + do { \ + unsigned long _sz = huge_page_size(h); \ + if (_sz == CONT_PTE_SIZE) \ + tlb_flush_pte_range(tlb, address, _sz); \ + else if (_sz == PMD_SIZE) \ + tlb_flush_pmd_range(tlb, address, _sz); \ + else if (_sz == CONT_PMD_SIZE) \ + tlb_flush_pmd_range(tlb, address, _sz); \ + else if (_sz == PUD_SIZE) \ + tlb_flush_pud_range(tlb, address, _sz); \ + __tlb_remove_tlb_entry(tlb, ptep, address); \ + } while (0) + #include /* diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h index 2c68a545ffa7..4622ee45f739 100644 --- a/include/asm-generic/tlb.h +++ b/include/asm-generic/tlb.h @@ -562,6 +562,7 @@ static inline void tlb_flush_p4d_range(struct mmu_gather *tlb, __tlb_remove_tlb_entry(tlb, ptep, address); \ } while (0) +#ifndef tlb_remove_huge_tlb_entry #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \ do { \ unsigned long _sz = huge_page_size(h); \ @@ -571,6 +572,7 @@ static inline void tlb_flush_p4d_range(struct mmu_gather *tlb, tlb_flush_pud_range(tlb, address, _sz); \ __tlb_remove_tlb_entry(tlb, ptep, address); \ } while (0) +#endif /** * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation