From patchwork Sun Mar 27 14:40:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng <15330273260@189.cn> X-Patchwork-Id: 12792831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D03CC4332F for ; Sun, 27 Mar 2022 14:40:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235751AbiC0OmM (ORCPT ); Sun, 27 Mar 2022 10:42:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233306AbiC0OmL (ORCPT ); Sun, 27 Mar 2022 10:42:11 -0400 Received: from 189.cn (ptr.189.cn [183.61.185.102]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 9491236321; Sun, 27 Mar 2022 07:40:31 -0700 (PDT) HMM_SOURCE_IP: 10.64.8.31:50658.236060406 HMM_ATTACHE_NUM: 0000 HMM_SOURCE_TYPE: SMTP Received: from clientip-114.242.206.180 (unknown [10.64.8.31]) by 189.cn (HERMES) with SMTP id 6663E1002B1; Sun, 27 Mar 2022 22:40:28 +0800 (CST) Received: from ([114.242.206.180]) by gateway-151646-dep-b7fbf7d79-bwdqx with ESMTP id 83aaa1221a3143d3bd17cedeb5762a34 for mripard@kernel.org; Sun, 27 Mar 2022 22:40:30 CST X-Transaction-ID: 83aaa1221a3143d3bd17cedeb5762a34 X-Real-From: 15330273260@189.cn X-Receive-IP: 114.242.206.180 X-MEDUSA-Status: 0 Sender: 15330273260@189.cn From: Sui Jingfeng <15330273260@189.cn> To: Maxime Ripard , Thomas Zimmermann , Roland Scheidegger , Zack Rusin , Christian Gmeiner , David Airlie , Daniel Vetter , Rob Herring , Thomas Bogendoerfer , Dan Carpenter , Krzysztof Kozlowski , Andrey Zhizhikin , Sam Ravnborg , "David S . Miller" , Jiaxun Yang , Lucas Stach , Maarten Lankhorst , Ilia Mirkin , Qing Zhang , suijingfeng Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH v13 1/6] MIPS: Loongson64: dts: update the display controller device node Date: Sun, 27 Mar 2022 22:40:16 +0800 Message-Id: <20220327144021.2502082-2-15330273260@189.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220327144021.2502082-1-15330273260@189.cn> References: <20220327144021.2502082-1-15330273260@189.cn> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The display controller is a pci device, it is used in ls2k1000 SoC and LS7A1000 bridge. Its PCI vendor id is 0x0014, its PCI device id is 0x7a06. In order to let the driver to know which chip the DC is contained in, the compatible of the display controller is named according to the chip's name. For LS7A1000, there are 4 dedicated GPIOs whose control register is located at the DC register space. They are used to emulate i2c for reading edid from the monitor. One for DVO0, another for DVO1. LS2K1000 and LS2K0500 SoC don't have such GPIOs, they grab i2c adapter from other module, either general purpose GPIO emulated i2c or hardware i2c adapter. This patch add common part of the DC device node only, it does not contain ports device note. As it is for the generic, boards only with transparent encoders should works simply by inherit from this. Signed-off-by: Sui Jingfeng <15330273260@189.cn> --- .../boot/dts/loongson/loongson64-2k1000.dtsi | 8 +++++++ arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 24 +++++++++++++++---- 2 files changed, 27 insertions(+), 5 deletions(-) diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi index 8143a61111e3..2ecb5a232f22 100644 --- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi +++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi @@ -198,6 +198,14 @@ sata@8,0 { interrupt-parent = <&liointc0>; }; + lsdc: display-controller@6,0 { + compatible = "loongson,ls2k1000-dc"; + + reg = <0x3000 0x0 0x0 0x0 0x0>; + interrupts = <28 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&liointc0>; + }; + pci_bridge@9,0 { compatible = "pci0014,7a19.0", "pci0014,7a19", diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi index 2f45fce2cdc4..1d3fe73b31d5 100644 --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi @@ -160,15 +160,29 @@ gpu@6,0 { interrupt-parent = <&pic>; }; - dc@6,1 { - compatible = "pci0014,7a06.0", - "pci0014,7a06", - "pciclass030000", - "pciclass0300"; + lsdc: display-controller@6,1 { + compatible = "loongson,ls7a1000-dc"; reg = <0x3100 0x0 0x0 0x0 0x0>; interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pic>; + + #address-cells = <1>; + #size-cells = <0>; + + i2c6: i2c@6 { + compatible = "loongson,gpio-i2c"; + loongson,sda = <0>; + loongson,scl = <1>; + loongson,nr = <6>; + }; + + i2c7: i2c@7 { + compatible = "loongson,gpio-i2c"; + loongson,sda = <2>; + loongson,scl = <3>; + loongson,nr = <7>; + }; }; hda@7,0 { From patchwork Sun Mar 27 14:40:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng <15330273260@189.cn> X-Patchwork-Id: 12792833 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46325C4332F for ; Sun, 27 Mar 2022 14:40:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235763AbiC0OmV (ORCPT ); Sun, 27 Mar 2022 10:42:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35672 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235769AbiC0OmU (ORCPT ); Sun, 27 Mar 2022 10:42:20 -0400 Received: from 189.cn (ptr.189.cn [183.61.185.102]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7209836327; Sun, 27 Mar 2022 07:40:36 -0700 (PDT) HMM_SOURCE_IP: 10.64.8.31:50658.236060406 HMM_ATTACHE_NUM: 0000 HMM_SOURCE_TYPE: SMTP Received: from clientip-114.242.206.180 (unknown [10.64.8.31]) by 189.cn (HERMES) with SMTP id AA76B1001AE; Sun, 27 Mar 2022 22:40:30 +0800 (CST) Received: from ([114.242.206.180]) by gateway-151646-dep-b7fbf7d79-bwdqx with ESMTP id a588863b73bd4366a38ed9986430ec69 for mripard@kernel.org; Sun, 27 Mar 2022 22:40:35 CST X-Transaction-ID: a588863b73bd4366a38ed9986430ec69 X-Real-From: 15330273260@189.cn X-Receive-IP: 114.242.206.180 X-MEDUSA-Status: 0 Sender: 15330273260@189.cn From: Sui Jingfeng <15330273260@189.cn> To: Maxime Ripard , Thomas Zimmermann , Roland Scheidegger , Zack Rusin , Christian Gmeiner , David Airlie , Daniel Vetter , Rob Herring , Thomas Bogendoerfer , Dan Carpenter , Krzysztof Kozlowski , Andrey Zhizhikin , Sam Ravnborg , "David S . Miller" , Jiaxun Yang , Lucas Stach , Maarten Lankhorst , Ilia Mirkin , Qing Zhang , suijingfeng Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH v13 2/6] MIPS: Loongson64: introduce board specific dts and add model property Date: Sun, 27 Mar 2022 22:40:17 +0800 Message-Id: <20220327144021.2502082-3-15330273260@189.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220327144021.2502082-1-15330273260@189.cn> References: <20220327144021.2502082-1-15330273260@189.cn> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org This patch introduce three board specific dts and assign different model property to them according to the board name on the top overlay of the PCB. The model property added is used to provide board specific information, mips kernel use it as machine name. For example: $ cat /proc/cpuinfo system type : Generic Loongson64 System machine : LX-6901 <-------------------- notice here processor : 0 cpu model : ICT Loongson-3 V0.1 FPU V0.1 BogoMIPS : 3594.02 tlb_entries : 2112 isa : mips64r2 ASEs implemented : vz msa loongson-ext2 ... 1) ls3A4000 evaluation board The board name is LS3A4000_7A1000_EVB_BOARD_V1.4, it consist of 1.8Ghz mips64r5 4-core CPU and LS7A1000 bridge chip. It has PCIe GEN2 x8 slot, therefore can play with discrete graphics card. While the integrated display copntroller is equipped with a VGA output and a DVI output, the VGA is connect to the DVO0 output port of the display controller, the DVI is connected to DVO1 output port of the display controller. +------+ +-----------------------------------+ | DDR4 | | +-------------------+ | +------+ | | PCIe Root complex | LS7A1000 | || MC0 | +--++---------++----+ | +----------+ HT 3.0 | || || | | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+ | CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM | +----------+ | +--------+ +-+--+-+ +---------+ +------+ || MC1 +---------------|--|----------------+ +------+ | | | DDR4 | +-------+ DVO0 | | DVO1 +------+ +------+ VGA <--|ADV7125|<--------+ +-------->|TFP410|--> DVI/HDMI +-------+ +------+ 2) lemote A1901 motherboard This board is made by LEMOTE corporation, it has two name, one is LX-6901, another is A1901. This board has only one VGA output which is connected to the DVO1 of the display controller. +------+ +-----------------------------------+ | DDR4 | | +-------------------+ | +------+ | | PCIe Root complex | LS7A1000 | || MC0 | +--++---------++----+ | +----------+ HT 3.0 | || || | | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+ | CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM | +----------+ | +--------+ +-+--+-+ +---------+ +------+ || MC1 +---------------|--|----------------+ +------+ | | | DDR4 | DVO0 is not get used | | DVO1 +-------+ +------+ <--------------------+ +-------->|ADV7125|---> VGA +-------+ 3) ls2k1000 pai evaluation board ls2k1000 is a two core 1.0Ghz Mips64r2 compatible SoC, desprite very slow, lacking i2c driver support, various display dridge drivers can only be tested on it. We still try to provide a minimal support. ___________________ ____________________ | -------| | | | CRTC0 --> | DVO0 ------------------------> | 1024x600 DPI Panel | | _ _ -------| | Which panel to use |____________________| | | | | | | | with this board is a ___________________ | |_| |_| | | choice of the user | | | | +--------------------> | 800x480 DPI Panel | | DC In LS2K1000 | |___________________| | _ _ | +------+ | | | | | <---->| i2c1 |-----------+ | |_| |_| | +------+ | | | | <--- config | DDC _________ | -------| +---------+ | | | | CRTC1 --> | DVO1 ---> | sii9022 | --> HDMI connector --> | Monitor | | -------| +---------+ |_________| |___________________| The sii9022 HDMI transmitter working in transparent mode, because the PCB designer make the board working in this way. In this case the EDID is read from the monitor directly, not through sii9022's ddc channel. The i2c0 is not get used by lsdc driver for this board. Signed-off-by: Sui Jingfeng <15330273260@189.cn> --- arch/mips/boot/dts/loongson/Makefile | 4 + arch/mips/boot/dts/loongson/lemote_a1901.dts | 96 ++++++++++++ .../boot/dts/loongson/ls2k1000_pai_udb.dts | 107 ++++++++++++++ .../boot/dts/loongson/ls3a4000_7a1000_evb.dts | 138 ++++++++++++++++++ 4 files changed, 345 insertions(+) create mode 100644 arch/mips/boot/dts/loongson/lemote_a1901.dts create mode 100644 arch/mips/boot/dts/loongson/ls2k1000_pai_udb.dts create mode 100644 arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts diff --git a/arch/mips/boot/dts/loongson/Makefile b/arch/mips/boot/dts/loongson/Makefile index 5c6433e441ee..c60acbafbfce 100644 --- a/arch/mips/boot/dts/loongson/Makefile +++ b/arch/mips/boot/dts/loongson/Makefile @@ -6,4 +6,8 @@ dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_8core_rs780e.dtb dtb-$(CONFIG_MACH_LOONGSON64) += loongson64g_4core_ls7a.dtb dtb-$(CONFIG_MACH_LOONGSON64) += loongson64v_4core_virtio.dtb +dtb-$(CONFIG_MACH_LOONGSON64) += ls2k1000_pai_udb.dtb +dtb-$(CONFIG_MACH_LOONGSON64) += lemote_a1901.dtb +dtb-$(CONFIG_MACH_LOONGSON64) += ls3a4000_7a1000_evb.dtb + obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) diff --git a/arch/mips/boot/dts/loongson/lemote_a1901.dts b/arch/mips/boot/dts/loongson/lemote_a1901.dts new file mode 100644 index 000000000000..880bb9153c03 --- /dev/null +++ b/arch/mips/boot/dts/loongson/lemote_a1901.dts @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "loongson64g-package.dtsi" +#include "ls7a-pch.dtsi" + +/ { + model = "LX-6901"; + + vga-encoder { + compatible = "adi,adv7123", "dumb-vga-dac"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&dc_out_rgb1>; + }; + }; + + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_connector_in>; + }; + }; + }; + }; + + vga-connector { + compatible = "vga-connector"; + label = "vga"; + + ddc-i2c-bus = <&i2c7>; + + port { + vga_connector_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; +}; + +&package0 { + htvec: interrupt-controller@efdfb000080 { + compatible = "loongson,htvec-1.0"; + reg = <0xefd 0xfb000080 0x40>; + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&liointc>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <31 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&pch { + msi: msi-controller@2ff00000 { + compatible = "loongson,pch-msi-1.0"; + reg = <0 0x2ff00000 0 0x8>; + interrupt-controller; + msi-controller; + loongson,msi-base-vec = <64>; + loongson,msi-num-vecs = <192>; + interrupt-parent = <&htvec>; + }; +}; + +&lsdc { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + status = "disabled"; + }; + + port@1 { + reg = <1>; + status = "ok"; + dc_out_rgb1: endpoint { + remote-endpoint = <&adv7123_in>; + }; + }; + }; +}; diff --git a/arch/mips/boot/dts/loongson/ls2k1000_pai_udb.dts b/arch/mips/boot/dts/loongson/ls2k1000_pai_udb.dts new file mode 100644 index 000000000000..972987975ada --- /dev/null +++ b/arch/mips/boot/dts/loongson/ls2k1000_pai_udb.dts @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "loongson64-2k1000.dtsi" + +/ { + model = "LS2K1000_PAI_UDB_V1.5"; + + panel: display@0 { + compatible = "panel-dpi"; + label = "LCD070CG1024600+DC21"; + + rotation = <0>; + width-mm = <86>; + height-mm = <154>; + + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + + panel_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dc_out_rgb0>; + }; + }; + + panel-timing { + clock-frequency = <51200000>; + hactive = <1024>; + vactive = <600>; + hsync-len = <4>; + hfront-porch = <160>; + hback-porch = <156>; + vfront-porch = <11>; + vback-porch = <23>; + vsync-len = <1>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + }; + + monitor: display@1 { + compatible = "panel-dpi"; + + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + + monitor_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dc_out_rgb1>; + }; + }; + + panel-timing { + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hfront-porch = <24>; + hsync-len = <136>; + hback-porch = <160>; + vfront-porch = <3>; + vback-porch = <6>; + vsync-len = <29>; + + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + }; +}; + +&lsdc { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dc_out_rgb0: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + + port@1 { + reg = <1>; + dc_out_rgb1: endpoint { + remote-endpoint = <&monitor_in>; + }; + }; + }; +}; diff --git a/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts b/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts new file mode 100644 index 000000000000..e342eb9ea12e --- /dev/null +++ b/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "loongson64g-package.dtsi" +#include "ls7a-pch.dtsi" + +/ { + compatible = "loongson,loongson64g-4core-ls7a"; + model = "LS3A4000_7A1000_EVB_BOARD_V1.4"; + + vga-encoder { + compatible = "adi,adv7123", "dumb-vga-dac"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&dc_out_rgb0>; + }; + }; + + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_connector_in>; + }; + }; + }; + }; + + vga-connector { + compatible = "vga-connector"; + label = "vga"; + + ddc-i2c-bus = <&i2c6>; + + port { + vga_connector_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; + + tfp410: dvi-encoder { + compatible = "ti,tfp410"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + tfp410_in: endpoint { + pclk-sample = <1>; + bus-width = <24>; + remote-endpoint = <&dc_out_rgb1>; + }; + }; + + port@1 { + reg = <1>; + tfp410_out: endpoint { + remote-endpoint = <&dvi_connector_in>; + }; + }; + }; + }; + + dvi-connector { + compatible = "dvi-connector"; + label = "dvi"; + digital; + + ddc-i2c-bus = <&i2c7>; + + port { + dvi_connector_in: endpoint { + remote-endpoint = <&tfp410_out>; + }; + }; + }; +}; + +&package0 { + htvec: interrupt-controller@efdfb000080 { + compatible = "loongson,htvec-1.0"; + reg = <0xefd 0xfb000080 0x40>; + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&liointc>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>, + <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <31 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&pch { + msi: msi-controller@2ff00000 { + compatible = "loongson,pch-msi-1.0"; + reg = <0 0x2ff00000 0 0x8>; + interrupt-controller; + msi-controller; + loongson,msi-base-vec = <64>; + loongson,msi-num-vecs = <192>; + interrupt-parent = <&htvec>; + }; +}; + +&lsdc { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dc_out_rgb0: endpoint { + remote-endpoint = <&adv7123_in>; + }; + }; + + port@1 { + reg = <1>; + dc_out_rgb1: endpoint { + remote-endpoint = <&tfp410_in>; + }; + }; + }; +}; From patchwork Sun Mar 27 14:40:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng <15330273260@189.cn> X-Patchwork-Id: 12792832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D9E4C43219 for ; Sun, 27 Mar 2022 14:40:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235782AbiC0OmV (ORCPT ); Sun, 27 Mar 2022 10:42:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235771AbiC0OmU (ORCPT ); Sun, 27 Mar 2022 10:42:20 -0400 Received: from 189.cn (ptr.189.cn [183.61.185.102]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4B91B36329; Sun, 27 Mar 2022 07:40:38 -0700 (PDT) HMM_SOURCE_IP: 10.64.8.31:50658.236060406 HMM_ATTACHE_NUM: 0000 HMM_SOURCE_TYPE: SMTP Received: from clientip-114.242.206.180 (unknown [10.64.8.31]) by 189.cn (HERMES) with SMTP id 4A1011002B2; Sun, 27 Mar 2022 22:40:35 +0800 (CST) Received: from ([114.242.206.180]) by gateway-151646-dep-b7fbf7d79-bwdqx with ESMTP id eb7959b12def40ce83ca605c34c418c2 for mripard@kernel.org; Sun, 27 Mar 2022 22:40:37 CST X-Transaction-ID: eb7959b12def40ce83ca605c34c418c2 X-Real-From: 15330273260@189.cn X-Receive-IP: 114.242.206.180 X-MEDUSA-Status: 0 Sender: 15330273260@189.cn From: Sui Jingfeng <15330273260@189.cn> To: Maxime Ripard , Thomas Zimmermann , Roland Scheidegger , Zack Rusin , Christian Gmeiner , David Airlie , Daniel Vetter , Rob Herring , Thomas Bogendoerfer , Dan Carpenter , Krzysztof Kozlowski , Andrey Zhizhikin , Sam Ravnborg , "David S . Miller" , Jiaxun Yang , Lucas Stach , Maarten Lankhorst , Ilia Mirkin , Qing Zhang , suijingfeng Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH v13 3/6] dt-bindings: display: Add Loongson display controller Date: Sun, 27 Mar 2022 22:40:18 +0800 Message-Id: <20220327144021.2502082-4-15330273260@189.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220327144021.2502082-1-15330273260@189.cn> References: <20220327144021.2502082-1-15330273260@189.cn> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add DT bindings and simple usages for Loongson display controller found in LS7A1000 bridge chip and LS2k1000 SoC. Signed-off-by: Sui Jingfeng <15330273260@189.cn> --- .../loongson/loongson,display-controller.yaml | 321 ++++++++++++++++++ 1 file changed, 321 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml diff --git a/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml new file mode 100644 index 000000000000..34060ed55a25 --- /dev/null +++ b/Documentation/devicetree/bindings/display/loongson/loongson,display-controller.yaml @@ -0,0 +1,321 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/loongson/loongson,display-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson LS7A1000/LS2K1000/LS2K0500 Display Controller Device Tree Bindings + +maintainers: + - Sui Jingfeng + +description: |+ + + Loongson display controllers are simple which require scanout buffers + to be physically contiguous. LS2K1000/LS2K0500 is a SOC, only system + memory is available. LS7A1000/LS7A2000 is bridge chip which is equipped + with a dedicated video RAM which is 64MB or more, precise size can be + read from the PCI BAR 2 of the GPU device(0x0014:0x7A15) in the bridge + chip. + + LSDC has two display pipes, each way has a DVO interface which provide + RGB888 signals, vertical & horizontal synchronisations, data enable and + the pixel clock. LSDC has two CRTC, each CRTC is able to scanout from + 1920x1080 resolution at 60Hz. Each CRTC has two FB address registers. + + For LS7A1000, there are 4 dedicated GPIOs whose control register is + located at the DC register space. They are used to emulate two way i2c, + One for DVO0, another for DVO1. + + LS2K1000 and LS2K0500 SoC grab i2c adapter from other module, either + general purpose GPIO emulated i2c or hardware i2c in the SoC. + + LSDC's display pipeline have several components as below description, + + The display controller in LS7A1000: + ___________________ _________ + | -------| | | + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monitor | + | _ _ -------| ^ ^ |_________| + | | | | | -------| | | + | |_| |_| | i2c0 <--------+-------------+ + | -------| + | DC IN LS7A1000 | + | _ _ -------| + | | | | | | i2c1 <--------+-------------+ + | |_| |_| -------| | | _________ + | -------| | | | | + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel | + | -------| |_________| + |___________________| + + Simple usage of LS7A1000 with LS3A4000 CPU: + + +------+ +------------------------------------+ + | DDR4 | | +-------------------+ | + +------+ | | PCIe Root complex | LS7A1000 | + || MC0 | +--++---------++----+ | + +----------+ HT 3.0 | || || | + | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+ + | CPU |<-------->| | GC1000 | | LSDC |<--->| DDR3 MC |<->| VRAM | + +----------+ | +--------+ +-+--+-+ +---------+ +------+ + || MC1 +---------------|--|-----------------+ + +------+ | | + | DDR4 | +-------+ DVO0 | | DVO1 +------+ + +------+ VGA <--|ADV7125|<--------+ +-------->|TFP410|--> DVI/HDMI + +-------+ +------+ + + The display controller in LS2K1000/LS2K0500: + ___________________ _________ + | -------| | | + | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monitor | + | _ _ -------| ^ ^ |_________| + | | | | | | | | + | |_| |_| | +------+ | + | <---->| i2c0 |<---------+ + | DC IN LS2K1000 | +------+ + | _ _ | +------+ + | | | | | <---->| i2c1 |----------+ + | |_| |_| | +------+ | _________ + | -------| | | | | + | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel | + | -------| |_________| + |___________________| + +properties: + $nodename: + pattern: "^display-controller@[0-9a-f],[0-9a-f]$" + + compatible: + oneOf: + - items: + - enum: + - loongson,ls7a1000-dc + - loongson,ls2k1000-dc + - loongson,ls2k0500-dc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + i2c@6: + $ref: /schemas/i2c/i2c-controller.yaml# + description: | + Built-in GPIO emulate i2c exported for display bridge configuration, + monitor detection and edid read back etc, for ls7a1000 only. + + properties: + $nodename: + const: i2c + + compatible: + const: loongson,gpio-i2c + + reg: + minItems: 1 + description: address offset and range + + loongson,nr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Indicates the I2C bus number this DT node represents. + + loongson,sda: + $ref: /schemas/types.yaml#/definitions/uint32 + description: gpio pin used for the sda signal + + loongson,scl: + $ref: /schemas/types.yaml#/definitions/uint32 + description: gpio pin used for the scl signal + + loongson,udelay: + $ref: /schemas/types.yaml#/definitions/uint32 + description: delay between GPIO operations, unit is us. + + loongson,timeout: + $ref: /schemas/types.yaml#/definitions/uint32 + description: timeout to get data, unit is ms. + + required: + - compatible + - loongson,sda + - loongson,scl + - loongson,nr + + i2c@7: + $ref: /schemas/i2c/i2c-controller.yaml# + description: | + Built-in GPIO emulate i2c exported for display bridge configuration, + monitor detection and edid read back etc, for ls7a1000 only. + properties: + $nodename: + const: i2c + + compatible: + const: loongson,gpio-i2c + + reg: + minItems: 1 + description: address offset and range + + loongson,nr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Indicates the I2C bus number this DT node represents. + + loongson,sda: + $ref: /schemas/types.yaml#/definitions/uint32 + description: gpio pin used for the sda signal + + loongson,scl: + $ref: /schemas/types.yaml#/definitions/uint32 + description: gpio pin used for the scl signal + + loongson,udelay: + $ref: /schemas/types.yaml#/definitions/uint32 + description: delay between GPIO operations, unit is us. + + loongson,timeout: + $ref: /schemas/types.yaml#/definitions/uint32 + description: timeout to get data, unit is ms. + + required: + - compatible + - loongson,sda + - loongson,scl + - loongson,nr + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: output port node connected with DPI panels or external encoders, with only one endpoint. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: output port node connected with DPI panels or external encoders, with only one endpoint. + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + bus { + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <2>; + + display-controller@6,1 { + compatible = "loongson,ls7a1000-dc"; + reg = <0x3100 0x0 0x0 0x0 0x0>; + interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + - | + #include + bus { + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <2>; + + display-controller@6,1 { + compatible = "loongson,ls7a1000-dc"; + reg = <0x3100 0x0 0x0 0x0 0x0>; + interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + + i2c@6 { + compatible = "loongson,gpio-i2c"; + reg = <0x00001650 0x00000020>; + loongson,nr = <6>; + loongson,sda = <0>; + loongson,scl = <1>; + loongson,udelay = <5>; + loongson,timeout = <2200>; + }; + + i2c@7 { + compatible = "loongson,gpio-i2c"; + reg = <0x00001650 0x00000020>; + loongson,nr = <7>; + loongson,sda = <2>; + loongson,scl = <3>; + loongson,udelay = <5>; + loongson,timeout = <2200>; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&vga_encoder_in>; + }; + }; + + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&dvi_encoder_in>; + }; + }; + }; + }; + }; + + - | + #include + bus { + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <2>; + + display-controller@6,0 { + compatible = "loongson,ls2k1000-dc"; + reg = <0x3100 0x0 0x0 0x0 0x0>; + interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&panel_in>; + }; + }; + + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&hdmi_encoder_in>; + }; + }; + }; + }; + }; +... From patchwork Sun Mar 27 14:40:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng <15330273260@189.cn> X-Patchwork-Id: 12792834 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EA47C433F5 for ; Sun, 27 Mar 2022 14:40:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235807AbiC0Ome (ORCPT ); Sun, 27 Mar 2022 10:42:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235775AbiC0Om2 (ORCPT ); Sun, 27 Mar 2022 10:42:28 -0400 Received: from 189.cn (ptr.189.cn [183.61.185.103]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 0C95D366B8; Sun, 27 Mar 2022 07:40:46 -0700 (PDT) HMM_SOURCE_IP: 10.64.8.31:39862.48814928 HMM_ATTACHE_NUM: 0000 HMM_SOURCE_TYPE: SMTP Received: from clientip-114.242.206.180 (unknown [10.64.8.31]) by 189.cn (HERMES) with SMTP id BEE5310023D; Sun, 27 Mar 2022 22:40:43 +0800 (CST) Received: from ([114.242.206.180]) by gateway-151646-dep-b7fbf7d79-bwdqx with ESMTP id e20d497b614a4615aaff82e2c62715ce for mripard@kernel.org; Sun, 27 Mar 2022 22:40:45 CST X-Transaction-ID: e20d497b614a4615aaff82e2c62715ce X-Real-From: 15330273260@189.cn X-Receive-IP: 114.242.206.180 X-MEDUSA-Status: 0 Sender: 15330273260@189.cn From: Sui Jingfeng <15330273260@189.cn> To: Maxime Ripard , Thomas Zimmermann , Roland Scheidegger , Zack Rusin , Christian Gmeiner , David Airlie , Daniel Vetter , Rob Herring , Thomas Bogendoerfer , Dan Carpenter , Krzysztof Kozlowski , Andrey Zhizhikin , Sam Ravnborg , "David S . Miller" , Jiaxun Yang , Lucas Stach , Maarten Lankhorst , Ilia Mirkin , Qing Zhang , suijingfeng Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH v13 6/6] MAINTAINERS: add maintainers for DRM LSDC driver Date: Sun, 27 Mar 2022 22:40:21 +0800 Message-Id: <20220327144021.2502082-7-15330273260@189.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220327144021.2502082-1-15330273260@189.cn> References: <20220327144021.2502082-1-15330273260@189.cn> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org This patch add myself as maintainer My company email is my personal email is <15330273260@189.cn> Signed-off-by: Sui Jingfeng <15330273260@189.cn> --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 10476280acb8..21184d8577f4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6487,6 +6487,15 @@ T: git git://anongit.freedesktop.org/drm/drm-misc F: drivers/gpu/drm/lima/ F: include/uapi/drm/lima_drm.h +DRM DRIVERS FOR LOONGSON +M: suijingfeng +L: dri-devel@lists.freedesktop.org +S: Maintained +W: https://www.loongson.cn/ +T: git git://anongit.freedesktop.org/drm/drm-misc +F: Documentation/devicetree/bindings/display/loongson/ +F: drivers/gpu/drm/loongson/ + DRM DRIVERS FOR MEDIATEK M: Chun-Kuang Hu M: Philipp Zabel