From patchwork Mon Mar 28 07:20:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 12793257 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1A39C433EF for ; Mon, 28 Mar 2022 07:21:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EvOPz1XPFhQeu9IH+TeBlYKpvOzHDeo5VOkC1il8PUg=; b=az7Ny9HPHQbfiV lMo4GfDB0uS1Y4iLnPa7JM7oNjHSjzMR+nlxBl8zIIytjcAeC6lvWHCh7Z+QrOlohGOV+DEpHciEE RUClvPWJWSNruzoeSoH4McERXvXkA7Fs1Mk5uFPLMYbFTJx0pe+j31/cACoJvdpeMG0Fj3UYnNfOK FTx6Pefz27GNFsiflrdSFOCUL4NwVhVdppoaWtFwEIdyl4UQIZCBrpVM9MQ7eCT70sK9N+eMEUmHp Jvsoo/6VioMomIoS4D+mxXBvprIURSam/GVKK8JXhGkCX2HqSM54482TsRZZHbKxYz/sQktXlesJ4 O9mFwQWRDN6JeweRciIw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nYjg0-007a4W-8K; Mon, 28 Mar 2022 07:20:32 +0000 Received: from perceval.ideasonboard.com ([213.167.242.64]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nYjfn-007ZzO-P3 for linux-arm-kernel@lists.infradead.org; Mon, 28 Mar 2022 07:20:21 +0000 Received: from pendragon.lan (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 6485E9BC; Mon, 28 Mar 2022 09:20:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1648452018; bh=b7Eq+6mYMPOEyPggM5r2WZ1SFIMh6uTevI7zc23cLcY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QUkznDUBN3u2x5izxVQlQk3kQSMVnoEAh4V/F4oodSnE6DhBK1TCFyks6kMMPx6I/ QXhmYZHbypXWwYZpfls0LWmbm7uiRhDHhENm2Mu/68+qD7J77bGX0r1ZVXA5YLdb2W 2JMV/t82r8t8rZAULozUpGLNLrgSc2drt/8SzoHo= From: Laurent Pinchart To: linux-arm-kernel@lists.infradead.org, Shawn Guo , Sascha Hauer Cc: Pengutronix Kernel Team , NXP Linux Team , Fabio Estevam , Paul Elder , Lucas Stach , Marek Vasut , Alexander Stein Subject: [PATCH v4 1/4] dt-bindings: soc: Add i.MX8MP media block control DT bindings Date: Mon, 28 Mar 2022 10:20:06 +0300 Message-Id: <20220328072009.1441-2-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220328072009.1441-1-laurent.pinchart@ideasonboard.com> References: <20220328072009.1441-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_002019_996915_988AB08B X-CRM114-Status: GOOD ( 14.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Paul Elder The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral providing access to the NoC and ensuring proper power sequencing of the peripherals within the MEDIAMIX domain. Add DT bindings for it. There is already a driver for block controls of other SoCs in the i.MX8M family, so these bindings will expand upon that. Signed-off-by: Paul Elder Reviewed-by: Rob Herring Reviewed-by: Laurent Pinchart Signed-off-by: Laurent Pinchart Reviewed-by: Marek Vasut --- Changes since v3: - Drop ISP2 power domain, it turned out to be incorrect Changes since v1: - Lower reg size to 0x138 - Add ISP2 power domain and rename ISP to ISP1 --- .../soc/imx/fsl,imx8mp-media-blk-ctrl.yaml | 104 ++++++++++++++++++ include/dt-bindings/power/imx8mp-power.h | 10 ++ 2 files changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml new file mode 100644 index 000000000000..21d3ee486295 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8MP Media Block Control + +maintainers: + - Paul Elder + +description: + The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral + providing access to the NoC and ensuring proper power sequencing of the + peripherals within the MEDIAMIX domain. + +properties: + compatible: + items: + - const: fsl,imx8mp-media-blk-ctrl + - const: syscon + + reg: + maxItems: 1 + + '#power-domain-cells': + const: 1 + + power-domains: + maxItems: 10 + + power-domain-names: + items: + - const: bus + - const: mipi-dsi1 + - const: mipi-csi1 + - const: lcdif1 + - const: isi + - const: mipi-csi2 + - const: lcdif2 + - const: isp + - const: dwe + - const: mipi-dsi2 + + clocks: + items: + - description: The APB clock + - description: The AXI clock + - description: The pixel clock for the first CSI2 receiver (aclk) + - description: The pixel clock for the second CSI2 receiver (aclk) + - description: The pixel clock for the first LCDIF (pix_clk) + - description: The pixel clock for the second LCDIF (pix_clk) + - description: The core clock for the ISP (clk) + - description: The MIPI-PHY reference clock used by DSI + + clock-names: + items: + - const: apb + - const: axi + - const: cam1 + - const: cam2 + - const: disp1 + - const: disp2 + - const: isp + - const: phy + +required: + - compatible + - reg + - '#power-domain-cells' + - power-domains + - power-domain-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + + media_blk_ctl: blk-ctl@32ec0000 { + compatible = "fsl,imx8mp-media-blk-ctrl", "syscon"; + reg = <0x32ec0000 0x138>; + power-domains = <&mediamix_pd>, <&mipi_phy1_pd>, <&mipi_phy1_pd>, + <&mediamix_pd>, <&mediamix_pd>, <&mipi_phy2_pd>, + <&mediamix_pd>, <&ispdwp_pd>, <&ispdwp_pd>, + <&mipi_phy2_pd>; + power-domain-names = "bus", "mipi-dsi1", "mipi-csi1", "lcdif1", "isi", + "mipi-csi2", "lcdif2", "isp1", "dwe", "mipi-dsi2"; + clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>, + <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>, + <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>; + clock-names = "apb", "axi", "cam1", "cam2", "disp1", "disp2", + "isp", "phy"; + #power-domain-cells = <1>; + }; +... diff --git a/include/dt-bindings/power/imx8mp-power.h b/include/dt-bindings/power/imx8mp-power.h index 9f90c40a2c6c..bc8458f1e725 100644 --- a/include/dt-bindings/power/imx8mp-power.h +++ b/include/dt-bindings/power/imx8mp-power.h @@ -32,4 +32,14 @@ #define IMX8MP_HSIOBLK_PD_PCIE 3 #define IMX8MP_HSIOBLK_PD_PCIE_PHY 4 +#define IMX8MP_MEDIABLK_PD_MIPI_DSI_1 0 +#define IMX8MP_MEDIABLK_PD_MIPI_CSI2_1 1 +#define IMX8MP_MEDIABLK_PD_LCDIF_1 2 +#define IMX8MP_MEDIABLK_PD_ISI 3 +#define IMX8MP_MEDIABLK_PD_MIPI_CSI2_2 4 +#define IMX8MP_MEDIABLK_PD_LCDIF_2 5 +#define IMX8MP_MEDIABLK_PD_ISP 6 +#define IMX8MP_MEDIABLK_PD_DWE 7 +#define IMX8MP_MEDIABLK_PD_MIPI_DSI_2 8 + #endif From patchwork Mon Mar 28 07:20:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 12793258 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CED8DC433EF for ; Mon, 28 Mar 2022 07:21:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0bWPcQehmKHXrbCOZVSnCXU+rR9YTkFQE8FliwkXqOg=; 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s=mail; t=1648452019; bh=YdH/TIxNd2ETZvsvBL/mz9C5aFSvhMAVtoNbrxF1IpA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RHhTXbkUsuxYCQ9DWxBhga2nL9RNXpwG9RK5PRDmWXHO++byPmWH3X1DQJmk7DQwb JPbxpCOeBFLIjVBl/Za9pIDJqVKQhCrt8PVJJsnCK7/UW7P8nYhoxuSuQwGcB2HBcR XJypJNBkhLycU+p3O/jgVuWWYeIAoKwr8CnQMg6I= From: Laurent Pinchart To: linux-arm-kernel@lists.infradead.org, Shawn Guo , Sascha Hauer Cc: Pengutronix Kernel Team , NXP Linux Team , Fabio Estevam , Paul Elder , Lucas Stach , Marek Vasut , Alexander Stein Subject: [PATCH v4 2/4] soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl Date: Mon, 28 Mar 2022 10:20:07 +0300 Message-Id: <20220328072009.1441-3-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220328072009.1441-1-laurent.pinchart@ideasonboard.com> References: <20220328072009.1441-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_002021_270840_4254A158 X-CRM114-Status: GOOD ( 20.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Paul Elder Add the description for the i.MX8MP media blk-ctrl. Signed-off-by: Paul Elder Reviewed-by: Laurent Pinchart Signed-off-by: Laurent Pinchart Reviewed-by: Marek Vasut Tested-by: Marek Vasut # MX8MP LCDIF #1 and #2 --- Changes since v3: - Drop ISP2 power domain, it turned out to be incorrect - Rebase on top of Shawn's for-next branch Changes since v1: - Add ISP2 power domain and rename ISP to ISP1 --- drivers/soc/imx/imx8m-blk-ctrl.c | 123 ++++++++++++++++++++++++++++++- 1 file changed, 121 insertions(+), 2 deletions(-) diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c index 122f9c884b38..7061c69fd25c 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -15,11 +15,12 @@ #include #include +#include #include #define BLK_SFT_RSTN 0x0 #define BLK_CLK_EN 0x4 -#define BLK_MIPI_RESET_DIV 0x8 /* Mini/Nano DISPLAY_BLK_CTRL only */ +#define BLK_MIPI_RESET_DIV 0x8 /* Mini/Nano/Plus DISPLAY_BLK_CTRL only */ struct imx8m_blk_ctrl_domain; @@ -41,7 +42,7 @@ struct imx8m_blk_ctrl_domain_data { u32 clk_mask; /* - * i.MX8M Mini and Nano have a third DISPLAY_BLK_CTRL register + * i.MX8M Mini, Nano and Plus have a third DISPLAY_BLK_CTRL register * which is used to control the reset for the MIPI Phy. * Since it's only present in certain circumstances, * an if-statement should be used before setting and clearing this @@ -590,6 +591,121 @@ static const struct imx8m_blk_ctrl_data imx8mn_disp_blk_ctl_dev_data = { .num_domains = ARRAY_SIZE(imx8mn_disp_blk_ctl_domain_data), }; +static int imx8mp_media_power_notifier(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct imx8m_blk_ctrl *bc = container_of(nb, struct imx8m_blk_ctrl, + power_nb); + + if (action != GENPD_NOTIFY_ON && action != GENPD_NOTIFY_PRE_OFF) + return NOTIFY_OK; + + /* Enable bus clock and deassert bus reset */ + regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(8)); + regmap_set_bits(bc->regmap, BLK_SFT_RSTN, BIT(8)); + + /* + * On power up we have no software backchannel to the GPC to + * wait for the ADB handshake to happen, so we just delay for a + * bit. On power down the GPC driver waits for the handshake. + */ + if (action == GENPD_NOTIFY_ON) + udelay(5); + + return NOTIFY_OK; +} + +/* + * From i.MX 8M Plus Applications Processor Reference Manual, Rev. 1, + * section 13.2.2, 13.2.3 + * isp-ahb and dwe are not in Figure 13-5. Media BLK_CTRL Clocks + */ +static const struct imx8m_blk_ctrl_domain_data imx8mp_media_blk_ctl_domain_data[] = { + [IMX8MP_MEDIABLK_PD_MIPI_DSI_1] = { + .name = "mediablk-mipi-dsi-1", + .clk_names = (const char *[]){ "apb", "phy", }, + .num_clks = 2, + .gpc_name = "mipi-dsi1", + .rst_mask = BIT(0) | BIT(1), + .clk_mask = BIT(0) | BIT(1), + .mipi_phy_rst_mask = BIT(17), + }, + [IMX8MP_MEDIABLK_PD_MIPI_CSI2_1] = { + .name = "mediablk-mipi-csi2-1", + .clk_names = (const char *[]){ "apb", "cam1" }, + .num_clks = 2, + .gpc_name = "mipi-csi1", + .rst_mask = BIT(2) | BIT(3), + .clk_mask = BIT(2) | BIT(3), + .mipi_phy_rst_mask = BIT(16), + }, + [IMX8MP_MEDIABLK_PD_LCDIF_1] = { + .name = "mediablk-lcdif-1", + .clk_names = (const char *[]){ "disp1", "apb", "axi", }, + .num_clks = 3, + .gpc_name = "lcdif1", + .rst_mask = BIT(4) | BIT(5) | BIT(23), + .clk_mask = BIT(4) | BIT(5) | BIT(23), + }, + [IMX8MP_MEDIABLK_PD_ISI] = { + .name = "mediablk-isi", + .clk_names = (const char *[]){ "axi", "apb" }, + .num_clks = 2, + .gpc_name = "isi", + .rst_mask = BIT(6) | BIT(7), + .clk_mask = BIT(6) | BIT(7), + }, + [IMX8MP_MEDIABLK_PD_MIPI_CSI2_2] = { + .name = "mediablk-mipi-csi2-2", + .clk_names = (const char *[]){ "apb", "cam2" }, + .num_clks = 2, + .gpc_name = "mipi-csi2", + .rst_mask = BIT(9) | BIT(10), + .clk_mask = BIT(9) | BIT(10), + .mipi_phy_rst_mask = BIT(30), + }, + [IMX8MP_MEDIABLK_PD_LCDIF_2] = { + .name = "mediablk-lcdif-2", + .clk_names = (const char *[]){ "disp1", "apb", "axi", }, + .num_clks = 3, + .gpc_name = "lcdif2", + .rst_mask = BIT(11) | BIT(12) | BIT(24), + .clk_mask = BIT(11) | BIT(12) | BIT(24), + }, + [IMX8MP_MEDIABLK_PD_ISP] = { + .name = "mediablk-isp", + .clk_names = (const char *[]){ "isp", "axi", "apb" }, + .num_clks = 3, + .gpc_name = "isp", + .rst_mask = BIT(16) | BIT(17) | BIT(18), + .clk_mask = BIT(16) | BIT(17) | BIT(18), + }, + [IMX8MP_MEDIABLK_PD_DWE] = { + .name = "mediablk-dwe", + .clk_names = (const char *[]){ "axi", "apb" }, + .num_clks = 2, + .gpc_name = "dwe", + .rst_mask = BIT(19) | BIT(20) | BIT(21), + .clk_mask = BIT(19) | BIT(20) | BIT(21), + }, + [IMX8MP_MEDIABLK_PD_MIPI_DSI_2] = { + .name = "mediablk-mipi-dsi-2", + .clk_names = (const char *[]){ "phy", }, + .num_clks = 1, + .gpc_name = "mipi-dsi2", + .rst_mask = BIT(22), + .clk_mask = BIT(22), + .mipi_phy_rst_mask = BIT(29), + }, +}; + +static const struct imx8m_blk_ctrl_data imx8mp_media_blk_ctl_dev_data = { + .max_reg = 0x138, + .power_notifier_fn = imx8mp_media_power_notifier, + .domains = imx8mp_media_blk_ctl_domain_data, + .num_domains = ARRAY_SIZE(imx8mp_media_blk_ctl_domain_data), +}; + static int imx8mq_vpu_power_notifier(struct notifier_block *nb, unsigned long action, void *data) { @@ -662,6 +778,9 @@ static const struct of_device_id imx8m_blk_ctrl_of_match[] = { }, { .compatible = "fsl,imx8mn-disp-blk-ctrl", .data = &imx8mn_disp_blk_ctl_dev_data + }, { + .compatible = "fsl,imx8mp-media-blk-ctrl", + .data = &imx8mp_media_blk_ctl_dev_data }, { .compatible = "fsl,imx8mq-vpu-blk-ctrl", .data = &imx8mq_vpu_blk_ctl_dev_data From patchwork Mon Mar 28 07:20:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 12793259 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D5520C433EF for ; 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Mon, 28 Mar 2022 07:20:58 +0000 Received: from perceval.ideasonboard.com ([213.167.242.64]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nYjfq-007a0f-7N for linux-arm-kernel@lists.infradead.org; Mon, 28 Mar 2022 07:20:23 +0000 Received: from pendragon.lan (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id CB32BB9C; Mon, 28 Mar 2022 09:20:19 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1648452020; bh=u2aTuD0itUDaYWO2/Y2nO9sTtwziU+yseKg1oQSQkpY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RNxNFJuGOfObvRxtUTNpPSUii+EgEpxx/vpFDhqVi2YYUjoYuemx6NDsO6pvTc8h3 mkwTWAJ1YM8jmbQl+SXfbkWtDrqwTlO6n5dmym6aDHZ23mUeQeg8BSnszQB2dqaK+C I5PO8FqNkhjSnzkCEC/tbBB38FzSgq5Zr9JEaJzE= From: Laurent Pinchart To: linux-arm-kernel@lists.infradead.org, Shawn Guo , Sascha Hauer Cc: Pengutronix Kernel Team , NXP Linux Team , Fabio Estevam , Paul Elder , Lucas Stach , Marek Vasut , Alexander Stein Subject: [PATCH v4 3/4] arm64: dts: imx8mp: Add MEDIAMIX power domains Date: Mon, 28 Mar 2022 10:20:08 +0300 Message-Id: <20220328072009.1441-4-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220328072009.1441-1-laurent.pinchart@ideasonboard.com> References: <20220328072009.1441-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_002022_463219_CF4F6DE6 X-CRM114-Status: UNSURE ( 8.44 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the power domains related to the MEDIAMIX to the GPC. Signed-off-by: Laurent Pinchart Reviewed-by: Marek Vasut Reviewed-by: Paul Elder --- Changes since v2: - Drop assigned clocks, they moved to the media-blk-ctrl node --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 096139d7c365..55f2fa2a562d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -488,6 +488,11 @@ pgc { #address-cells = <1>; #size-cells = <0>; + pgc_mipi_phy1: power-domain@0 { + #power-domain-cells = <0>; + reg = ; + }; + pgc_pcie_phy: power-domain@1 { #power-domain-cells = <0>; reg = ; @@ -530,6 +535,18 @@ pgc_gpu3d: power-domain@9 { power-domains = <&pgc_gpumix>; }; + pgc_mediamix: power-domain@10 { + #power-domain-cells = <0>; + reg = ; + clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + }; + + pgc_mipi_phy2: power-domain@16 { + #power-domain-cells = <0>; + reg = ; + }; + pgc_hsiomix: power-domains@17 { #power-domain-cells = <0>; reg = ; @@ -539,6 +556,12 @@ pgc_hsiomix: power-domains@17 { assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; assigned-clock-rates = <500000000>; }; + + pgc_ispdwp: power-domain@18 { + #power-domain-cells = <0>; + reg = ; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_DIV>; + }; }; }; }; From patchwork Mon Mar 28 07:20:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 12793260 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7E62FC433F5 for ; Mon, 28 Mar 2022 07:22:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=VBPDo5XLURTz2dPPj8Msm+6Iai55ObR/oDrWLEDng0E=; b=UAFBDtChhtT7s+ lQv0gx5NdpH7pMlHZbdmFIBdq7YpCHJexkO8x64+8WBU4J6x2H1TgkS1W/wJ2vajWUp9MuT/xE3kF 4aAgf7/PLt2K7Uz1AfokTYNgzyAiwenoxEVqRbuR/ZWJ31MRrUdpOb0GU41KXMrYuY7npLZGy/P12 JNCEKTzRXJONs6nE8Fcj7tIpLfRUZqiQ2ic1Yk9j1BuR5VY9XnEKpQgw93MBZye6fxF8hvjYRCngf R6vc6boI0zqJrIoV7ha8Jwq/RPbm/mcr/3VRy9QvyqIEdQyOxapp7JscmI9UtNYSql9EM/Wlfss0U ZIMA2N2pp5n5mL4C+mgA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nYjgc-007aK2-Le; Mon, 28 Mar 2022 07:21:10 +0000 Received: from perceval.ideasonboard.com ([213.167.242.64]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nYjfr-007a1z-RN for linux-arm-kernel@lists.infradead.org; Mon, 28 Mar 2022 07:20:25 +0000 Received: from pendragon.lan (62-78-145-57.bb.dnainternet.fi [62.78.145.57]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 34B52E0A; Mon, 28 Mar 2022 09:20:21 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1648452022; bh=1MsHesWfS+NtHhPNelI9a3O0ZgMdBrQir4hSyWE6bi4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=epmRNqoTaDNb1D5nzi5nUpIJmLJbKJvGO9vDgzfFiM+XF/3t80aVi5YwNG1z3IIGr QqP3FLhgNs0NtobslFzTNgPiwXfDoP9OQym0XSTpKfbs/IJfeMx+cXlXQAkoSM12va 8McjxHxZStVligFGuuEavMs0Fe7rKe4sNUzqqzY4= From: Laurent Pinchart To: linux-arm-kernel@lists.infradead.org, Shawn Guo , Sascha Hauer Cc: Pengutronix Kernel Team , NXP Linux Team , Fabio Estevam , Paul Elder , Lucas Stach , Marek Vasut , Alexander Stein Subject: [PATCH v4 4/4] arm64: dts: imx8mp: Add MEDIA_BLK_CTRL Date: Mon, 28 Mar 2022 10:20:09 +0300 Message-Id: <20220328072009.1441-5-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220328072009.1441-1-laurent.pinchart@ideasonboard.com> References: <20220328072009.1441-1-laurent.pinchart@ideasonboard.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_002024_074221_DCBBC014 X-CRM114-Status: UNSURE ( 8.32 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Paul Elder Add a DT node for the MEDIA_BLK_CTRL, which provides power domains for the camera and display devices. Signed-off-by: Paul Elder Signed-off-by: Laurent Pinchart Reviewed-by: Marek Vasut --- Changes since v3: - Drop ISP2 power domain, it turned out to be incorrect Changes since v2: - Add assigned clocks --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 38 +++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 55f2fa2a562d..9e68e897d644 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -988,6 +988,44 @@ aips4: bus@32c00000 { #size-cells = <1>; ranges; + media_blk_ctrl: blk-ctrl@32ec0000 { + compatible = "fsl,imx8mp-media-blk-ctrl", + "syscon"; + reg = <0x32ec0000 0x10000>; + power-domains = <&pgc_mediamix>, + <&pgc_mipi_phy1>, + <&pgc_mipi_phy1>, + <&pgc_mediamix>, + <&pgc_mediamix>, + <&pgc_mipi_phy2>, + <&pgc_mediamix>, + <&pgc_ispdwp>, + <&pgc_ispdwp>, + <&pgc_mipi_phy2>; + power-domain-names = "bus", "mipi-dsi1", "mipi-csi1", + "lcdif1", "isi", "mipi-csi2", + "lcdif2", "isp", "dwe", + "mipi-dsi2"; + clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>, + <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>, + <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>, + <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>; + clock-names = "apb", "axi", "cam1", "cam2", + "disp1", "disp2", "isp", "phy"; + + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>, + <&clk IMX8MP_CLK_MEDIA_APB>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>, + <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <500000000>, <200000000>; + + #power-domain-cells = <1>; + }; + hsio_blk_ctrl: blk-ctrl@32f10000 { compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon"; reg = <0x32f10000 0x24>;