From patchwork Wed Mar 30 11:25:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Capper X-Patchwork-Id: 12795706 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EFABC433EF for ; Wed, 30 Mar 2022 11:26:08 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 3B1B18D0002; Wed, 30 Mar 2022 07:26:08 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 361AA8D0001; Wed, 30 Mar 2022 07:26:08 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 210938D0002; Wed, 30 Mar 2022 07:26:08 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (relay.hostedemail.com [64.99.140.25]) by kanga.kvack.org (Postfix) with ESMTP id 128CB8D0001 for ; Wed, 30 Mar 2022 07:26:08 -0400 (EDT) Received: from smtpin02.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay10.hostedemail.com (Postfix) with ESMTP id CDD3C1D78 for ; Wed, 30 Mar 2022 11:26:07 +0000 (UTC) X-FDA: 79300823574.02.54F8DDA Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf15.hostedemail.com (Postfix) with ESMTP id 1B4A9A0007 for ; Wed, 30 Mar 2022 11:26:06 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0556B23A; Wed, 30 Mar 2022 04:26:06 -0700 (PDT) Received: from localhost.localdomain (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DE82C3F66F; Wed, 30 Mar 2022 04:26:04 -0700 (PDT) From: Steve Capper To: linux-mm@kvack.org Cc: Steve Capper , David Hildenbrand , Peter Zijlstra , Anshuman Khandual , Catalin Marinas , Will Deacon Subject: [PATCH v2] tlb: hugetlb: Add more sizes to tlb_remove_huge_tlb_entry Date: Wed, 30 Mar 2022 12:25:43 +0100 Message-Id: <20220330112543.863-1-steve.capper@arm.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <8d5f53c2-2e67-66e4-6453-946a62d5ee98@arm.com> References: <8d5f53c2-2e67-66e4-6453-946a62d5ee98@arm.com> MIME-Version: 1.0 X-Stat-Signature: ns335sgt79ptyizr8dyp3tigc7jwaf4e Authentication-Results: imf15.hostedemail.com; dkim=none; spf=pass (imf15.hostedemail.com: domain of steve.capper@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=steve.capper@arm.com; dmarc=pass (policy=none) header.from=arm.com X-Rspam-User: X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 1B4A9A0007 X-HE-Tag: 1648639566-676091 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: tlb_remove_huge_tlb_entry only considers PMD_SIZE and PUD_SIZE when updating the mmu_gather structure. Unfortunately on arm64 there are two additional huge page sizes that need to be covered: CONT_PTE_SIZE and CONT_PMD_SIZE. Where an end-user attempts to employ contiguous huge pages, a VM_BUG_ON can be experienced due to the fact that the tlb structure hasn't been correctly updated by the relevant tlb_flush_p.._range() call from tlb_remove_huge_tlb_entry. This patch adds inequality logic to the generic implementation of tlb_remove_huge_tlb_entry s.t. CONT_PTE_SIZE and CONT_PMD_SIZE are effectively covered on arm64. Also, as well as ptes, pmds and puds; p4ds are now considered too. Reported-by: David Hildenbrand Suggested-by: Peter Zijlstra (Intel) Cc: Anshuman Khandual Cc: Catalin Marinas Cc: Will Deacon Link: https://lore.kernel.org/linux-mm/811c5c8e-b3a2-85d2-049c-717f17c3a03a@redhat.com/ Signed-off-by: Steve Capper Acked-by: David Hildenbrand Reviewed-by: Anshuman Khandual Reviewed-by: Catalin Marinas Acked-by: Peter Zijlstra (Intel) --- Changed in V2: instead of doing the per-arch implementation of tlb_remove_huge_tlb_entry we add to the generic implmentation, as suggested by PeterZ. This works well on arm64 with contiguous PTEs/PMDs. Does this look reasonable to the ppc folk? Cheers, -- Steve --- include/asm-generic/tlb.h | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h index 2c68a545ffa7..71942a1c642d 100644 --- a/include/asm-generic/tlb.h +++ b/include/asm-generic/tlb.h @@ -565,10 +565,14 @@ static inline void tlb_flush_p4d_range(struct mmu_gather *tlb, #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \ do { \ unsigned long _sz = huge_page_size(h); \ - if (_sz == PMD_SIZE) \ - tlb_flush_pmd_range(tlb, address, _sz); \ - else if (_sz == PUD_SIZE) \ + if (_sz >= P4D_SIZE) \ + tlb_flush_p4d_range(tlb, address, _sz); \ + else if (_sz >= PUD_SIZE) \ tlb_flush_pud_range(tlb, address, _sz); \ + else if (_sz >= PMD_SIZE) \ + tlb_flush_pmd_range(tlb, address, _sz); \ + else \ + tlb_flush_pte_range(tlb, address, _sz); \ __tlb_remove_tlb_entry(tlb, ptep, address); \ } while (0)