From patchwork Wed Mar 30 14:50:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795912 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 583AFC433F5 for ; Wed, 30 Mar 2022 14:50:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347347AbiC3OwM (ORCPT ); Wed, 30 Mar 2022 10:52:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347330AbiC3OwG (ORCPT ); Wed, 30 Mar 2022 10:52:06 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C460C49251; Wed, 30 Mar 2022 07:50:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648651819; x=1680187819; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=m3ZHKE2qreMdK9+hlgzfsg822h8hNwlohIi/nUeWDvU=; b=fTdk5OkuKXkTg/x87zaEO4+d8iVItCHYJ948YOWy8/N1fyk9xHRPc3US So9tkJJgu1FHyEUTyw3dtDYtarzop4SVtHeKR4djxx4vY6INFVe+K7axa DxFQ+F3G/8rsXqaVk4JF4imG2OabKx/1aeEBeXsx13mNZ5eqbl0DlcGcS y4T5fAveT6JVDw9T7zlMjEir24y0Yy/67Qis4e2yWS8UNDJQZmxsnw27R QLDYshFJqvQ9RuelE2IhTEOxVrmiWQgv23dtMJKimlseBOeATL9/Kr3Of wr/dDubRdTt2G5F7jGq5dWMmOrVK8paRgD+igT3g266nzHumATewhYM2M Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="258391396" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="258391396" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="837349185" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga005.fm.intel.com with ESMTP; 30 Mar 2022 07:50:11 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 244049B; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 01/13] gpiolib: Introduce for_each_gpiochip_node() loop helper Date: Wed, 30 Mar 2022 17:50:18 +0300 Message-Id: <20220330145030.1562-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Introduce for_each_gpiochip_node() loop helper which iterates over the GPIO controller child nodes of a given device. Signed-off-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven --- include/linux/gpio/driver.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index b0728c8ad90c..2142ffc7338c 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -3,13 +3,14 @@ #define __LINUX_GPIO_DRIVER_H #include -#include #include #include #include #include #include #include +#include +#include struct gpio_desc; struct of_phandle_args; @@ -747,4 +748,8 @@ static inline void gpiochip_unlock_as_irq(struct gpio_chip *gc, } #endif /* CONFIG_GPIOLIB */ +#define for_each_gpiochip_node(dev, child) \ + device_for_each_child_node(dev, child) \ + if (!fwnode_property_present(child, "gpio-controller")) {} else + #endif /* __LINUX_GPIO_DRIVER_H */ From patchwork Wed Mar 30 14:50:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795911 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4964DC43219 for ; Wed, 30 Mar 2022 14:50:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347335AbiC3OwK (ORCPT ); Wed, 30 Mar 2022 10:52:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347326AbiC3OwG (ORCPT ); Wed, 30 Mar 2022 10:52:06 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6741F4925E; Wed, 30 Mar 2022 07:50:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648651820; x=1680187820; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DFJ8vSWxdkQP5rCMWcqpqf0iMOqCrH1H7hLKYmjSIpU=; b=KT9uA43Quj97EQsS/34LBJUiti+KKxG2KtmHKYDBQQTFBKMuoufIYN5v HtX6K5xbKXegXJRtw4sooRh+8smFbfi1OYejjkcjgYbnK2smTVObdzCfS eKBYlhmNR6hRTg9OPs+HZWNyPWon3zuvKWr+Tv1z8laLZxQwjTTz1jKig /D+8uzVX5hwSNmehuWdaW3mwpunjWkQr2xaExA5XJDc9IV9Mh9CBNGKXe C2VqlsoA2cUN2nVWOgtFY4++TsKQUOBbi+q1Sd793ATzdgDS2QCqiK0/V kZ3cGJRoAFSzSNH67yIOE3LTU/jr0gjCPXqsj2b3PvtZPMGj3/5k8wEZf w==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="257139573" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="257139573" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="618556021" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga004.fm.intel.com with ESMTP; 30 Mar 2022 07:50:11 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 3232C1C3; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 02/13] gpiolib: Introduce gpiochip_node_count() helper Date: Wed, 30 Mar 2022 17:50:19 +0300 Message-Id: <20220330145030.1562-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The gpiochip_node_count() helper iterates over the device child nodes that have the "gpio-controller" property set. It returns the number of such nodes under a given device. Signed-off-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven --- include/linux/gpio/driver.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 2142ffc7338c..e38565a5056c 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -752,4 +752,15 @@ static inline void gpiochip_unlock_as_irq(struct gpio_chip *gc, device_for_each_child_node(dev, child) \ if (!fwnode_property_present(child, "gpio-controller")) {} else +static inline unsigned int gpiochip_node_count(struct device *dev) +{ + struct fwnode_handle *child; + unsigned int count = 0; + + for_each_gpiochip_node(dev, child) + count++; + + return count; +} + #endif /* __LINUX_GPIO_DRIVER_H */ From patchwork Wed Mar 30 14:50:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795910 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0F1CC433FE for ; Wed, 30 Mar 2022 14:50:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347307AbiC3OwJ (ORCPT ); Wed, 30 Mar 2022 10:52:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347279AbiC3OwH (ORCPT ); Wed, 30 Mar 2022 10:52:07 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA16D1CFEC; Wed, 30 Mar 2022 07:50:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648651822; x=1680187822; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i+XLNp2iVCE62baGP2Gp0lU65sQmnL0penjqJcUdxuU=; b=aKPyr84Lpy67IAP7miYKwlAEQJK1IGOoM54MSo3egt21U1aZBkJl8/wC xYe8TEi+4A5QVLjSOHvtMdYJbSKQ4k9XZaKDPGRRwA9rHdE3odOHe2AcW 5IEyneHS96uBBMitPTyXJNDLQopQpwy8fwINGMipkL8okWjeu4h25vCkD fEReFrtdiosWCPHbCqS91sFzZATZoueMQZsI/4vPeDbtTG1rMuWEbZLCj 31sbv8l3ixaqF04yGaPxA5dsrFc12it985WgtNv5tHeUFsyje1dtiS40B 2KNhLeZJ2rmiXXryuGeTVSX//I6mKNyuTxLSAt4CKKqmQkCBQ5SekOkXm Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="257139574" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="257139574" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="565571103" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga008.jf.intel.com with ESMTP; 30 Mar 2022 07:50:11 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 408CA1F5; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 03/13] pinctrl: stm32: Replace custom code by gpiochip_node_count() call Date: Wed, 30 Mar 2022 17:50:20 +0300 Message-Id: <20220330145030.1562-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko Reviewed-by: Fabien Dessenne --- drivers/pinctrl/stm32/pinctrl-stm32.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index 9ed764731570..91b9a64b649e 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -1423,7 +1423,8 @@ int stm32_pctl_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct stm32_pinctrl *pctl; struct pinctrl_pin_desc *pins; - int i, ret, hwlock_id, banks = 0; + int i, ret, hwlock_id; + unsigned int banks; if (!np) return -EINVAL; @@ -1513,10 +1514,7 @@ int stm32_pctl_probe(struct platform_device *pdev) return PTR_ERR(pctl->pctl_dev); } - for_each_available_child_of_node(np, child) - if (of_property_read_bool(child, "gpio-controller")) - banks++; - + banks = gpiochip_node_count(dev); if (!banks) { dev_err(dev, "at least one GPIO bank is required\n"); return -EINVAL; From patchwork Wed Mar 30 14:50:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795914 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54796C41535 for ; Wed, 30 Mar 2022 14:50:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347361AbiC3OwN (ORCPT ); Wed, 30 Mar 2022 10:52:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347328AbiC3OwG (ORCPT ); Wed, 30 Mar 2022 10:52:06 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 673314925B; Wed, 30 Mar 2022 07:50:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648651820; x=1680187820; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jQJeoHDjZLYzGmOrK+oBTqEppFS7ObLysie7MCABhco=; b=XVqnzcRpRh75CN7NjnGhhxN+9gLyqHafh5yRGLmy14velxDnTGpgPQBk rJcFexYLH0/FeHeqlLpFDLL8OEgNkDbeJ8viLHB4DpAxIaOAtOC1QZuwX xCVfujsmDLspl9iUGMWzhF3S9GG/jnKlpRqwSOiLTAudQvnHDKcRJfN21 Nh3DfjypV4KKi+fodgonmznrDF8Z0bfRnQpHBq/ieebeoh1Cr1VGls6Ix ycOhDZGPQyzNumxG9z7fIMDgs3jSZFkkjRf3zmhdWqkTHjHTcflYYZz6E dhAt2sqD+QLNqcqRMBlmIm9by6vL6kv0fZPy4CzOiYGT2HOWds1meuMal g==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="239490487" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="239490487" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="788030765" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga006.fm.intel.com with ESMTP; 30 Mar 2022 07:50:12 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 4FB5620B; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 04/13] pinctrl: stm32: Switch to use for_each_gpiochip_node() helper Date: Wed, 30 Mar 2022 17:50:21 +0300 Message-Id: <20220330145030.1562-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, switch to fwnode APIs where it makes sense. Signed-off-by: Andy Shevchenko Reviewed-by: Fabien Dessenne --- drivers/pinctrl/stm32/pinctrl-stm32.c | 72 ++++++++++++--------------- 1 file changed, 33 insertions(+), 39 deletions(-) diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index 91b9a64b649e..09952c463f67 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -1215,13 +1216,12 @@ static const struct pinconf_ops stm32_pconf_ops = { .pin_config_dbg_show = stm32_pconf_dbg_show, }; -static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, - struct device_node *np) +static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode_handle *fwnode) { struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks]; int bank_ioport_nr; struct pinctrl_gpio_range *range = &bank->range; - struct of_phandle_args args; + struct fwnode_reference_args args; struct device *dev = pctl->dev; struct resource res; int npins = STM32_GPIO_PINS_PER_BANK; @@ -1230,7 +1230,7 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, if (!IS_ERR(bank->rstc)) reset_control_deassert(bank->rstc); - if (of_address_to_resource(np, 0, &res)) + if (of_address_to_resource(to_of_node(fwnode), 0, &res)) return -ENODEV; bank->base = devm_ioremap_resource(dev, &res); @@ -1245,15 +1245,15 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, bank->gpio_chip = stm32_gpio_template; - of_property_read_string(np, "st,bank-name", &bank->gpio_chip.label); + fwnode_property_read_string(fwnode, "st,bank-name", &bank->gpio_chip.label); - if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, i, &args)) { + if (!fwnode_property_get_reference_args(fwnode, "gpio-ranges", NULL, 3, i, &args)) { bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK; bank->gpio_chip.base = args.args[1]; /* get the last defined gpio line (offset + nb of pins) */ npins = args.args[0] + args.args[2]; - while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, ++i, &args)) + while (!fwnode_property_get_reference_args(fwnode, "gpio-ranges", NULL, 3, ++i, &args)) npins = max(npins, (int)(args.args[0] + args.args[2])); } else { bank_nr = pctl->nbanks; @@ -1268,20 +1268,20 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, &pctl->banks[bank_nr].range); } - if (of_property_read_u32(np, "st,bank-ioport", &bank_ioport_nr)) + if (fwnode_property_read_u32(fwnode, "st,bank-ioport", &bank_ioport_nr)) bank_ioport_nr = bank_nr; bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK; bank->gpio_chip.ngpio = npins; - bank->gpio_chip.of_node = np; + bank->gpio_chip.fwnode = fwnode; bank->gpio_chip.parent = dev; bank->bank_nr = bank_nr; bank->bank_ioport_nr = bank_ioport_nr; spin_lock_init(&bank->lock); /* create irq hierarchical domain */ - bank->fwnode = of_node_to_fwnode(np); + bank->fwnode = fwnode; bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE, bank->fwnode, @@ -1418,7 +1418,7 @@ static int stm32_pctrl_create_pins_tab(struct stm32_pinctrl *pctl, int stm32_pctl_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; - struct device_node *child; + struct fwnode_handle *child; const struct of_device_id *match; struct device *dev = &pdev->dev; struct stm32_pinctrl *pctl; @@ -1525,40 +1525,34 @@ int stm32_pctl_probe(struct platform_device *pdev) return -ENOMEM; i = 0; - for_each_available_child_of_node(np, child) { + for_each_gpiochip_node(dev, child) { struct stm32_gpio_bank *bank = &pctl->banks[i]; + struct device_node *np = to_of_node(child); - if (of_property_read_bool(child, "gpio-controller")) { - bank->rstc = of_reset_control_get_exclusive(child, - NULL); - if (PTR_ERR(bank->rstc) == -EPROBE_DEFER) { - of_node_put(child); - return -EPROBE_DEFER; - } - - bank->clk = of_clk_get_by_name(child, NULL); - if (IS_ERR(bank->clk)) { - if (PTR_ERR(bank->clk) != -EPROBE_DEFER) - dev_err(dev, - "failed to get clk (%ld)\n", - PTR_ERR(bank->clk)); - of_node_put(child); - return PTR_ERR(bank->clk); - } - i++; + bank->rstc = of_reset_control_get_exclusive(np, NULL); + if (PTR_ERR(bank->rstc) == -EPROBE_DEFER) { + fwnode_handle_put(child); + return -EPROBE_DEFER; } - } - for_each_available_child_of_node(np, child) { - if (of_property_read_bool(child, "gpio-controller")) { - ret = stm32_gpiolib_register_bank(pctl, child); - if (ret) { - of_node_put(child); - return ret; - } + bank->clk = of_clk_get_by_name(np, NULL); + if (IS_ERR(bank->clk)) { + if (PTR_ERR(bank->clk) != -EPROBE_DEFER) + dev_err(dev, "failed to get clk (%ld)\n", PTR_ERR(bank->clk)); + fwnode_handle_put(child); + return PTR_ERR(bank->clk); + } + i++; + } - pctl->nbanks++; + for_each_gpiochip_node(dev, child) { + ret = stm32_gpiolib_register_bank(pctl, child); + if (ret) { + fwnode_handle_put(child); + return ret; } + + pctl->nbanks++; } dev_info(dev, "Pinctrl STM32 initialized\n"); From patchwork Wed Mar 30 14:50:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795919 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B05F0C433EF for ; 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X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="240156498" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="240156498" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="503338711" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga003.jf.intel.com with ESMTP; 30 Mar 2022 07:50:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5E85B323; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 05/13] pinctrl: samsung: Switch to use for_each_gpiochip_node() helper Date: Wed, 30 Mar 2022 17:50:22 +0300 Message-Id: <20220330145030.1562-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, switch to fwnode APIs where it makes sense. Signed-off-by: Andy Shevchenko Reported-by: kernel test robot Reported-by: kernel test robot Reported-by: kernel test robot Reported-by: kernel test robot Reported-by: kernel test robot --- drivers/pinctrl/samsung/pinctrl-samsung.c | 30 +++++++++++------------ drivers/pinctrl/samsung/pinctrl-samsung.h | 2 +- 2 files changed, 15 insertions(+), 17 deletions(-) diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index f610beab23a0..26d309d2516d 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -966,7 +967,7 @@ static int samsung_gpiolib_register(struct platform_device *pdev, gc->base = bank->grange.base; gc->ngpio = bank->nr_pins; gc->parent = &pdev->dev; - gc->of_node = bank->of_node; + gc->fwnode = bank->fwnode; gc->label = bank->name; ret = devm_gpiochip_add_data(&pdev->dev, gc, bank); @@ -1002,27 +1003,25 @@ samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev) return &(of_data->ctrl[id]); } -static void samsung_banks_of_node_put(struct samsung_pinctrl_drv_data *d) +static void samsung_banks_node_put(struct samsung_pinctrl_drv_data *d) { struct samsung_pin_bank *bank; unsigned int i; bank = d->pin_banks; for (i = 0; i < d->nr_banks; ++i, ++bank) - of_node_put(bank->of_node); + fwnode_handle_put(bank->fwnode); } /* * Iterate over all driver pin banks to find one matching the name of node, * skipping optional "-gpio" node suffix. When found, assign node to the bank. */ -static void samsung_banks_of_node_get(struct device *dev, - struct samsung_pinctrl_drv_data *d, - struct device_node *node) +static void samsung_banks_node_get(struct device *dev, struct samsung_pinctrl_drv_data *d) { const char *suffix = "-gpio-bank"; struct samsung_pin_bank *bank; - struct device_node *child; + struct fwnode_handle *child; /* Pin bank names are up to 4 characters */ char node_name[20]; unsigned int i; @@ -1038,17 +1037,17 @@ static void samsung_banks_of_node_get(struct device *dev, continue; } - for_each_child_of_node(node, child) { - if (!of_find_property(child, "gpio-controller", NULL)) - continue; - if (of_node_name_eq(child, node_name)) + for_each_gpiochip_node(dev, child) { + struct device_node *np = to_of_node(child); + + if (of_node_name_eq(np, node_name)) break; - else if (of_node_name_eq(child, bank->name)) + if (of_node_name_eq(np, bank->name)) break; } if (child) - bank->of_node = child; + bank->fwnode = child; else dev_warn(dev, "Missing node for bank %s - invalid DTB\n", bank->name); @@ -1061,7 +1060,6 @@ static const struct samsung_pin_ctrl * samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, struct platform_device *pdev) { - struct device_node *node = pdev->dev.of_node; const struct samsung_pin_bank_data *bdata; const struct samsung_pin_ctrl *ctrl; struct samsung_pin_bank *bank; @@ -1125,7 +1123,7 @@ samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, */ d->virt_base = virt_base[0]; - samsung_banks_of_node_get(&pdev->dev, d, node); + samsung_banks_node_get(&pdev->dev, d); d->pin_base = pin_base; pin_base += d->nr_pins; @@ -1186,7 +1184,7 @@ static int samsung_pinctrl_probe(struct platform_device *pdev) err_unregister: samsung_pinctrl_unregister(pdev, drvdata); err_put_banks: - samsung_banks_of_node_put(drvdata); + samsung_banks_node_put(drvdata); return ret; } diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 5b32d3f30fcd..fc6f5199c548 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -165,7 +165,7 @@ struct samsung_pin_bank { u32 pin_base; void *soc_priv; - struct device_node *of_node; + struct fwnode_handle *fwnode; struct samsung_pinctrl_drv_data *drvdata; struct irq_domain *irq_domain; struct gpio_chip gpio_chip; From patchwork Wed Mar 30 14:50:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795917 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACC45C4167D for ; Wed, 30 Mar 2022 14:50:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347276AbiC3Ow2 (ORCPT ); Wed, 30 Mar 2022 10:52:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347278AbiC3OwS (ORCPT ); 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30 Mar 2022 07:50:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="605459808" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 30 Mar 2022 07:50:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 6D5E05F2; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 06/13] pinctrl: renesas: rza1: Replace custom code by gpiochip_node_count() call Date: Wed, 30 Mar 2022 17:50:23 +0300 Message-Id: <20220330145030.1562-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven Acked-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pinctrl-rza1.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rza1.c b/drivers/pinctrl/renesas/pinctrl-rza1.c index c1d6e9512c7a..acc00b1a955d 100644 --- a/drivers/pinctrl/renesas/pinctrl-rza1.c +++ b/drivers/pinctrl/renesas/pinctrl-rza1.c @@ -1154,21 +1154,6 @@ static const struct pinmux_ops rza1_pinmux_ops = { * RZ/A1 pin controller driver operations */ -static unsigned int rza1_count_gpio_chips(struct device_node *np) -{ - struct device_node *child; - unsigned int count = 0; - - for_each_child_of_node(np, child) { - if (!of_property_read_bool(child, "gpio-controller")) - continue; - - count++; - } - - return count; -} - /** * rza1_parse_gpiochip() - parse and register a gpio chip and pin range * @@ -1255,7 +1240,7 @@ static int rza1_gpio_register(struct rza1_pinctrl *rza1_pctl) unsigned int i; int ret; - ngpiochips = rza1_count_gpio_chips(np); + ngpiochips = gpiochip_node_count(rza1_pctl->dev); if (ngpiochips == 0) { dev_dbg(rza1_pctl->dev, "No gpiochip registered\n"); return 0; From patchwork Wed Mar 30 14:50:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795918 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9343BC433F5 for ; Wed, 30 Mar 2022 14:50:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347298AbiC3Ow3 (ORCPT ); Wed, 30 Mar 2022 10:52:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347359AbiC3OwN (ORCPT ); Wed, 30 Mar 2022 10:52:13 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5118A2716A; Wed, 30 Mar 2022 07:50:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648651828; x=1680187828; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z1Wwebtp9mgYOoY8j5lm8osB9jE0USQeFWSvh/mZP9o=; b=lW4S5w4JSKLBvdiTxE2bD/WIQMnQXeVeEgriYf+bhYkB2mMdDGOrhDUQ GgZ5RqDsLuu+7nvYJmKoCMnvcXu59oUobffQOtiS8zRHIXFxHMdn+5lhv kj5WPBlKmQBD9Jmdu7H0tU9H3h5ihl/w/6bDYlDa6LX7MGc+8iKrdvcEj U/63sk5JRkwgM427kFcFWqtqAS8KTowN3mIGb64NszvGahrHCoUFALW6q nUF3Bl+9jj01XbMGMky2IRLGIcKw9MjcY6ZGJFGzFNmI1YIZjH9ucNNR3 K77h3Y4yG/kWzcaT1QNKiGJ8VM3SDcq29OeA1nT26amJ+Rs73ObLidx/j w==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="259533333" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="259533333" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="521916028" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 30 Mar 2022 07:50:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 7BD675F8; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 07/13] pinctrl: renesas: rza1: Switch to use for_each_gpiochip_node() helper Date: Wed, 30 Mar 2022 17:50:24 +0300 Message-Id: <20220330145030.1562-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, switch to fwnode APIs where it makes sense. Signed-off-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven Acked-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pinctrl-rza1.c | 30 +++++++++++--------------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rza1.c b/drivers/pinctrl/renesas/pinctrl-rza1.c index acc00b1a955d..529c0fc4ec06 100644 --- a/drivers/pinctrl/renesas/pinctrl-rza1.c +++ b/drivers/pinctrl/renesas/pinctrl-rza1.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include "../core.h" @@ -1161,22 +1162,22 @@ static const struct pinmux_ops rza1_pinmux_ops = { * defined by gpio device tree binding documentation. * * @rza1_pctl: RZ/A1 pin controller device - * @np: of gpio-controller node + * @fwnode: gpio-controller firmware node * @chip: gpio chip to register to gpiolib * @range: pin range to register to pinctrl core */ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl, - struct device_node *np, + struct fwnode_handle *fwnode, struct gpio_chip *chip, struct pinctrl_gpio_range *range) { const char *list_name = "gpio-ranges"; - struct of_phandle_args of_args; + struct fwnode_reference_args args; unsigned int gpioport; u32 pinctrl_base; int ret; - ret = of_parse_phandle_with_fixed_args(np, list_name, 3, 0, &of_args); + ret = fwnode_property_get_reference_args(fwnode, list_name, NULL, 3, 0, &args); if (ret) { dev_err(rza1_pctl->dev, "Unable to parse %s list property\n", list_name); @@ -1187,7 +1188,7 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl, * Find out on which port this gpio-chip maps to by inspecting the * second argument of the "gpio-ranges" property. */ - pinctrl_base = of_args.args[1]; + pinctrl_base = args.args[1]; gpioport = RZA1_PIN_ID_TO_PORT(pinctrl_base); if (gpioport >= RZA1_NPORTS) { dev_err(rza1_pctl->dev, @@ -1197,19 +1198,18 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl, *chip = rza1_gpiochip_template; chip->base = -1; - chip->label = devm_kasprintf(rza1_pctl->dev, GFP_KERNEL, "%pOFn", - np); + chip->ngpio = args.args[2]; + chip->label = devm_kasprintf(rza1_pctl->dev, GFP_KERNEL, "%pfwP", fwnode); if (!chip->label) return -ENOMEM; - chip->ngpio = of_args.args[2]; - chip->of_node = np; + chip->fwnode = fwnode; chip->parent = rza1_pctl->dev; range->id = gpioport; range->name = chip->label; range->pin_base = range->base = pinctrl_base; - range->npins = of_args.args[2]; + range->npins = args.args[2]; range->gc = chip; ret = devm_gpiochip_add_data(rza1_pctl->dev, chip, @@ -1232,10 +1232,9 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl, */ static int rza1_gpio_register(struct rza1_pinctrl *rza1_pctl) { - struct device_node *np = rza1_pctl->dev->of_node; struct pinctrl_gpio_range *gpio_ranges; struct gpio_chip *gpio_chips; - struct device_node *child; + struct fwnode_handle *child; unsigned int ngpiochips; unsigned int i; int ret; @@ -1254,14 +1253,11 @@ static int rza1_gpio_register(struct rza1_pinctrl *rza1_pctl) return -ENOMEM; i = 0; - for_each_child_of_node(np, child) { - if (!of_property_read_bool(child, "gpio-controller")) - continue; - + for_each_gpiochip_node(rza1_pctl->dev, child) { ret = rza1_parse_gpiochip(rza1_pctl, child, &gpio_chips[i], &gpio_ranges[i]); if (ret) { - of_node_put(child); + fwnode_handle_put(child); return ret; } From patchwork Wed Mar 30 14:50:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795916 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E495C43217 for ; Wed, 30 Mar 2022 14:50:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347393AbiC3Ow1 (ORCPT ); Wed, 30 Mar 2022 10:52:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347290AbiC3OwS (ORCPT ); Wed, 30 Mar 2022 10:52:18 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ECF054705D; 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d="scan'208";a="788030808" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga006.fm.intel.com with ESMTP; 30 Mar 2022 07:50:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 89975602; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 08/13] pinctrl: npcm7xx: Switch to use for_each_gpiochip_node() helper Date: Wed, 30 Mar 2022 17:50:25 +0300 Message-Id: <20220330145030.1562-9-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, do the following: - use a temporary variable for struct device pointer to shorten a few lines - get rid of a temporary variable for vIRQ number, assign it directly - switch to fwnode APIs where it makes sense Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 142 ++++++++++------------ 1 file changed, 62 insertions(+), 80 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 9557fac5d11c..90a184a28ae7 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -17,6 +17,7 @@ #include #include #include +#include #include /* GCR registers */ @@ -1862,88 +1863,69 @@ static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) { int ret = -ENXIO; struct resource res; - int id = 0, irq; - struct device_node *np; - struct of_phandle_args pinspec; - - for_each_available_child_of_node(pctrl->dev->of_node, np) - if (of_find_property(np, "gpio-controller", NULL)) { - ret = of_address_to_resource(np, 0, &res); - if (ret < 0) { - dev_err(pctrl->dev, - "Resource fail for GPIO bank %u\n", id); - return ret; - } - - pctrl->gpio_bank[id].base = - ioremap(res.start, resource_size(&res)); - - irq = irq_of_parse_and_map(np, 0); - if (irq < 0) { - dev_err(pctrl->dev, - "No IRQ for GPIO bank %u\n", id); - ret = irq; - return ret; - } - - ret = bgpio_init(&pctrl->gpio_bank[id].gc, - pctrl->dev, 4, - pctrl->gpio_bank[id].base + - NPCM7XX_GP_N_DIN, - pctrl->gpio_bank[id].base + - NPCM7XX_GP_N_DOUT, - NULL, - NULL, - pctrl->gpio_bank[id].base + - NPCM7XX_GP_N_IEM, - BGPIOF_READ_OUTPUT_REG_SET); - if (ret) { - dev_err(pctrl->dev, "bgpio_init() failed\n"); - return ret; - } - - ret = of_parse_phandle_with_fixed_args(np, - "gpio-ranges", 3, - 0, &pinspec); - if (ret < 0) { - dev_err(pctrl->dev, - "gpio-ranges fail for GPIO bank %u\n", - id); - return ret; - } - - pctrl->gpio_bank[id].irq = irq; - pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip; - pctrl->gpio_bank[id].gc.parent = pctrl->dev; - pctrl->gpio_bank[id].irqbase = - id * NPCM7XX_GPIO_PER_BANK; - pctrl->gpio_bank[id].pinctrl_id = pinspec.args[0]; - pctrl->gpio_bank[id].gc.base = pinspec.args[1]; - pctrl->gpio_bank[id].gc.ngpio = pinspec.args[2]; - pctrl->gpio_bank[id].gc.owner = THIS_MODULE; - pctrl->gpio_bank[id].gc.label = - devm_kasprintf(pctrl->dev, GFP_KERNEL, "%pOF", - np); - if (pctrl->gpio_bank[id].gc.label == NULL) - return -ENOMEM; - - pctrl->gpio_bank[id].gc.dbg_show = npcmgpio_dbg_show; - pctrl->gpio_bank[id].direction_input = - pctrl->gpio_bank[id].gc.direction_input; - pctrl->gpio_bank[id].gc.direction_input = - npcmgpio_direction_input; - pctrl->gpio_bank[id].direction_output = - pctrl->gpio_bank[id].gc.direction_output; - pctrl->gpio_bank[id].gc.direction_output = - npcmgpio_direction_output; - pctrl->gpio_bank[id].request = - pctrl->gpio_bank[id].gc.request; - pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request; - pctrl->gpio_bank[id].gc.free = npcmgpio_gpio_free; - pctrl->gpio_bank[id].gc.of_node = np; - id++; + struct device *dev = pctrl->dev; + struct fwnode_reference_args args; + struct fwnode_handle *child; + int id = 0; + + for_each_gpiochip_node(dev, child) { + struct device_node *np = to_of_node(child); + + ret = of_address_to_resource(np, 0, &res); + if (ret < 0) { + dev_err(dev, "Resource fail for GPIO bank %u\n", id); + return ret; + } + + pctrl->gpio_bank[id].base = ioremap(res.start, resource_size(&res)); + + ret = bgpio_init(&pctrl->gpio_bank[id].gc, dev, 4, + pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DIN, + pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DOUT, + NULL, + NULL, + pctrl->gpio_bank[id].base + NPCM7XX_GP_N_IEM, + BGPIOF_READ_OUTPUT_REG_SET); + if (ret) { + dev_err(dev, "bgpio_init() failed\n"); + return ret; } + ret = fwnode_property_get_reference_args(child, "gpio-ranges", NULL, 3, 0, &args); + if (ret < 0) { + dev_err(dev, "gpio-ranges fail for GPIO bank %u\n", id); + return ret; + } + + ret = irq_of_parse_and_map(np, 0); + if (ret < 0) { + dev_err(dev, "No IRQ for GPIO bank %u\n", id); + return ret; + } + pctrl->gpio_bank[id].irq = ret; + pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip; + pctrl->gpio_bank[id].irqbase = id * NPCM7XX_GPIO_PER_BANK; + pctrl->gpio_bank[id].pinctrl_id = args.args[0]; + pctrl->gpio_bank[id].gc.base = args.args[1]; + pctrl->gpio_bank[id].gc.ngpio = args.args[2]; + pctrl->gpio_bank[id].gc.owner = THIS_MODULE; + pctrl->gpio_bank[id].gc.parent = dev; + pctrl->gpio_bank[id].gc.label = devm_kasprintf(dev, GFP_KERNEL, "%pfw", child); + if (pctrl->gpio_bank[id].gc.label == NULL) + return -ENOMEM; + + pctrl->gpio_bank[id].gc.dbg_show = npcmgpio_dbg_show; + pctrl->gpio_bank[id].direction_input = pctrl->gpio_bank[id].gc.direction_input; + pctrl->gpio_bank[id].gc.direction_input = npcmgpio_direction_input; + pctrl->gpio_bank[id].direction_output = pctrl->gpio_bank[id].gc.direction_output; + pctrl->gpio_bank[id].gc.direction_output = npcmgpio_direction_output; + pctrl->gpio_bank[id].request = pctrl->gpio_bank[id].gc.request; + pctrl->gpio_bank[id].gc.request = npcmgpio_gpio_request; + pctrl->gpio_bank[id].gc.free = npcmgpio_gpio_free; + pctrl->gpio_bank[id].gc.fwnode = child; + id++; + } + pctrl->bank_num = id; return ret; } From patchwork Wed Mar 30 14:50:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795922 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA7F8C433EF for ; Wed, 30 Mar 2022 14:52:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346611AbiC3OyO (ORCPT ); Wed, 30 Mar 2022 10:54:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347549AbiC3Owq (ORCPT ); Wed, 30 Mar 2022 10:52:46 -0400 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4176F4BB8D; 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d="scan'208";a="546889513" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 30 Mar 2022 07:50:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 94D90612; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 09/13] pinctrl: meson: Rename REG_* to MESON_REG_* Date: Wed, 30 Mar 2022 17:50:26 +0300 Message-Id: <20220330145030.1562-10-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Rename REG_* to MESON_REG_* as a prerequisite for enabling COMPILE_TEST. Signed-off-by: Andy Shevchenko Reviewed-by: Neil Armstrong --- drivers/pinctrl/meson/pinctrl-meson.c | 24 ++++++++++++------------ drivers/pinctrl/meson/pinctrl-meson.h | 24 ++++++++++++------------ 2 files changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 49851444a6e3..5b46a0979db7 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -218,13 +218,13 @@ static int meson_pinconf_set_output(struct meson_pinctrl *pc, unsigned int pin, bool out) { - return meson_pinconf_set_gpio_bit(pc, pin, REG_DIR, !out); + return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_DIR, !out); } static int meson_pinconf_get_output(struct meson_pinctrl *pc, unsigned int pin) { - int ret = meson_pinconf_get_gpio_bit(pc, pin, REG_DIR); + int ret = meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_DIR); if (ret < 0) return ret; @@ -236,13 +236,13 @@ static int meson_pinconf_set_drive(struct meson_pinctrl *pc, unsigned int pin, bool high) { - return meson_pinconf_set_gpio_bit(pc, pin, REG_OUT, high); + return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_OUT, high); } static int meson_pinconf_get_drive(struct meson_pinctrl *pc, unsigned int pin) { - return meson_pinconf_get_gpio_bit(pc, pin, REG_OUT); + return meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_OUT); } static int meson_pinconf_set_output_drive(struct meson_pinctrl *pc, @@ -269,7 +269,7 @@ static int meson_pinconf_disable_bias(struct meson_pinctrl *pc, if (ret) return ret; - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit); ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), 0); if (ret) return ret; @@ -288,7 +288,7 @@ static int meson_pinconf_enable_bias(struct meson_pinctrl *pc, unsigned int pin, if (ret) return ret; - meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, ®, &bit); if (pull_up) val = BIT(bit); @@ -296,7 +296,7 @@ static int meson_pinconf_enable_bias(struct meson_pinctrl *pc, unsigned int pin, if (ret) return ret; - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit); ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), BIT(bit)); if (ret) return ret; @@ -321,7 +321,7 @@ static int meson_pinconf_set_drive_strength(struct meson_pinctrl *pc, if (ret) return ret; - meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, ®, &bit); if (drive_strength_ua <= 500) { ds_val = MESON_PINCONF_DRV_500UA; @@ -407,7 +407,7 @@ static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin) if (ret) return ret; - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit); ret = regmap_read(pc->reg_pullen, reg, &val); if (ret) @@ -416,7 +416,7 @@ static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin) if (!(val & BIT(bit))) { conf = PIN_CONFIG_BIAS_DISABLE; } else { - meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, ®, &bit); ret = regmap_read(pc->reg_pull, reg, &val); if (ret) @@ -447,7 +447,7 @@ static int meson_pinconf_get_drive_strength(struct meson_pinctrl *pc, if (ret) return ret; - meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, ®, &bit); ret = regmap_read(pc->reg_ds, reg, &val); if (ret) @@ -595,7 +595,7 @@ static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio) if (ret) return ret; - meson_calc_reg_and_bit(bank, gpio, REG_IN, ®, &bit); + meson_calc_reg_and_bit(bank, gpio, MESON_REG_IN, ®, &bit); regmap_read(pc->reg_gpio, reg, &val); return !!(val & BIT(bit)); diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index ff5372e0a475..fa042cd6a7ff 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -63,12 +63,12 @@ struct meson_reg_desc { * enum meson_reg_type - type of registers encoded in @meson_reg_desc */ enum meson_reg_type { - REG_PULLEN, - REG_PULL, - REG_DIR, - REG_OUT, - REG_IN, - REG_DS, + MESON_REG_PULLEN, + MESON_REG_PULL, + MESON_REG_DIR, + MESON_REG_OUT, + MESON_REG_IN, + MESON_REG_DS, NUM_REG, }; @@ -150,12 +150,12 @@ struct meson_pinctrl { .irq_first = fi, \ .irq_last = li, \ .regs = { \ - [REG_PULLEN] = { per, peb }, \ - [REG_PULL] = { pr, pb }, \ - [REG_DIR] = { dr, db }, \ - [REG_OUT] = { or, ob }, \ - [REG_IN] = { ir, ib }, \ - [REG_DS] = { dsr, dsb }, \ + [MESON_REG_PULLEN] = { per, peb }, \ + [MESON_REG_PULL] = { pr, pb }, \ + [MESON_REG_DIR] = { dr, db }, \ + [MESON_REG_OUT] = { or, ob }, \ + [MESON_REG_IN] = { ir, ib }, \ + [MESON_REG_DS] = { dsr, dsb }, \ }, \ } From patchwork Wed Mar 30 14:50:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795915 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA447C433FE for ; Wed, 30 Mar 2022 14:50:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347381AbiC3Ow0 (ORCPT ); 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X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="259745782" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="259745782" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="618556085" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga004.fm.intel.com with ESMTP; 30 Mar 2022 07:50:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 9FD49668; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 10/13] pinctrl: meson: Enable COMPILE_TEST Date: Wed, 30 Mar 2022 17:50:27 +0300 Message-Id: <20220330145030.1562-11-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Enable COMPILE_TEST for a better test coverage. Signed-off-by: Andy Shevchenko Reviewed-by: Neil Armstrong --- drivers/pinctrl/meson/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index d1955c65b4b6..64fb9e074ac6 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only menuconfig PINCTRL_MESON tristate "Amlogic SoC pinctrl drivers" - depends on ARCH_MESON + depends on ARCH_MESON || COMPILE_TEST depends on OF default y select PINMUX From patchwork Wed Mar 30 14:50:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795923 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7CF5C4167B for ; Wed, 30 Mar 2022 14:52:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347319AbiC3OyQ (ORCPT ); Wed, 30 Mar 2022 10:54:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347673AbiC3Owz (ORCPT ); Wed, 30 Mar 2022 10:52:55 -0400 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 40D9A4D9FA; Wed, 30 Mar 2022 07:50:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648651857; x=1680187857; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JTI2sWpV0UzE6IeL8l7wpen8kbwzDYKP8YDjk2kp5w4=; b=evgJUDjrHsT7ldTYR+yEkIMjrbcU8HcIeBQNQIO45NgKOrSRZLi+iAhq FMYkF8a2mXbnHbUvOE0D3mJDP0caMPtq0RU+8dvmQosOYtwlMADcxEmWq V1t9AXdjopmZ/UnXpu3stYP+3KSn3IWkEIIlvUeclZetkdJY63z3SVujH QHBP69d+zlGPH3Y2/Xlo3Q3hqeMx+p8I0KSzLvpF17rl57iapIlAxnYjI ivCBJp4TGjoNgVG1a+IA/mpiUPoTzYS1dwm8nIZcyL5D9ITg/ghfyWsC2 3ZKATIsiVOZUoFpojeDrN1Et1By6W4aabDGpC9Un7m3Oqfp3I4uoQtNCc g==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="320259365" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="320259365" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="546889516" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 30 Mar 2022 07:50:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id AAE0A698; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 11/13] pinctrl: meson: Replace custom code by gpiochip_node_count() call Date: Wed, 30 Mar 2022 17:50:28 +0300 Message-Id: <20220330145030.1562-12-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko Reviewed-by: Neil Armstrong --- drivers/pinctrl/meson/pinctrl-meson.c | 28 ++++++++++++--------------- 1 file changed, 12 insertions(+), 16 deletions(-) diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 5b46a0979db7..1b078da81523 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -49,6 +49,7 @@ #include #include #include +#include #include #include @@ -662,27 +663,22 @@ static struct regmap *meson_map_resource(struct meson_pinctrl *pc, return devm_regmap_init_mmio(pc->dev, base, &meson_regmap_config); } -static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc, - struct device_node *node) +static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc) { - struct device_node *np, *gpio_np = NULL; + struct device_node *gpio_np; + unsigned int chips; - for_each_child_of_node(node, np) { - if (!of_find_property(np, "gpio-controller", NULL)) - continue; - if (gpio_np) { - dev_err(pc->dev, "multiple gpio nodes\n"); - of_node_put(np); - return -EINVAL; - } - gpio_np = np; - } - - if (!gpio_np) { + chips = gpiochip_node_count(pc->dev); + if (!chips) { dev_err(pc->dev, "no gpio node found\n"); return -EINVAL; } + if (chips > 1) { + dev_err(pc->dev, "multiple gpio nodes\n"); + return -EINVAL; + } + gpio_np = to_of_node(device_get_named_child_node(pc->dev, "gpio-controller")); pc->of_node = gpio_np; pc->reg_mux = meson_map_resource(pc, gpio_np, "mux"); @@ -751,7 +747,7 @@ int meson_pinctrl_probe(struct platform_device *pdev) pc->dev = dev; pc->data = (struct meson_pinctrl_data *) of_device_get_match_data(dev); - ret = meson_pinctrl_parse_dt(pc, dev->of_node); + ret = meson_pinctrl_parse_dt(pc); if (ret) return ret; From patchwork Wed Mar 30 14:50:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795920 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87CA2C433FE for ; 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X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="257139618" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="257139618" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="586025529" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 30 Mar 2022 07:50:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id B62EB6A9; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 12/13] pinctrl: armada-37xx: Switch to use fwnode instead of of_node Date: Wed, 30 Mar 2022 17:50:29 +0300 Message-Id: <20220330145030.1562-13-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org GPIO library now accepts fwnode as a firmware node, so switch the driver to use it. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 08cad14042e2..1fef8a38f574 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -787,18 +788,13 @@ static int armada_37xx_gpiochip_register(struct platform_device *pdev, struct armada_37xx_pinctrl *info) { struct device *dev = &pdev->dev; - struct device_node *np; + struct fwnode_handle *fwnode; struct gpio_chip *gc; - int ret = -ENODEV; + int ret; - for_each_child_of_node(dev->of_node, np) { - if (of_find_property(np, "gpio-controller", NULL)) { - ret = 0; - break; - } - } - if (ret) - return ret; + fwnode = device_get_named_child_node(dev, "gpio-controller"); + if (!fwnode) + return -ENODEV; info->gpio_chip = armada_37xx_gpiolib_chip; @@ -806,7 +802,7 @@ static int armada_37xx_gpiochip_register(struct platform_device *pdev, gc->ngpio = info->data->nr_pins; gc->parent = dev; gc->base = -1; - gc->of_node = np; + gc->fwnode = fwnode; gc->label = info->data->name; ret = armada_37xx_irqchip_register(pdev, info); From patchwork Wed Mar 30 14:50:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 12795921 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFD21C433F5 for ; Wed, 30 Mar 2022 14:52:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345078AbiC3OyN (ORCPT ); Wed, 30 Mar 2022 10:54:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347455AbiC3Owq (ORCPT ); Wed, 30 Mar 2022 10:52:46 -0400 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82AC54BFE7; Wed, 30 Mar 2022 07:50:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648651845; x=1680187845; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KXLXc+19o0UubT6TkmoiDgHQv9YpGm9hY5Ydb16Dc5c=; b=Vl230+KJmGhvUa9aHd1jO1v6W23BPxglXfr/QMjYRvXRRMdFDOtUce6u Mi/MZWwhloc/GdW6n8MS3IMclurTaZBxb1m7iJyK3SXwaSlfbWaqbtjaH EgCfW06rRNO0r4uMzz0sDmg9Fxo+F1a5JXUFS5ZieCaam4e6LW9q4zAng QXp4v6vE0wYfJBOV6Su+Vwpzr5rKnMvBN9HJslek/lpDFQCs2/NS58V+I cKaSg+M8tGTwa3RCw3CwLHjWaw59zlEf3h7FxA2MXg8XFd2/AoGnly4Qy EO+Kpao4QZYpRz/vNnC1DW3yPOvtMmTlcc5wLb3FG1v8jM+pgKCj+4BOf g==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="320259360" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="320259360" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:50:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="565571163" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga008.jf.intel.com with ESMTP; 30 Mar 2022 07:50:20 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id C214B6C0; Wed, 30 Mar 2022 17:50:33 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v3 13/13] pinctrl: armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register() Date: Wed, 30 Mar 2022 17:50:30 +0300 Message-Id: <20220330145030.1562-14-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> References: <20220330145030.1562-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Since we have fwnode of the first found GPIO controller assigned to the struct gpio_chip, we may reuse it in the armada_37xx_irqchip_register(). Signed-off-by: Andy Shevchenko --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 1fef8a38f574..c0384661ea48 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -727,23 +727,13 @@ static int armada_37xx_irqchip_register(struct platform_device *pdev, struct gpio_chip *gc = &info->gpio_chip; struct irq_chip *irqchip = &info->irq_chip; struct gpio_irq_chip *girq = &gc->irq; + struct device_node *np = to_of_node(gc->fwnode); struct device *dev = &pdev->dev; - struct device_node *np; - int ret = -ENODEV, i, nr_irq_parent; - - /* Check if we have at least one gpio-controller child node */ - for_each_child_of_node(dev->of_node, np) { - if (of_property_read_bool(np, "gpio-controller")) { - ret = 0; - break; - } - } - if (ret) - return dev_err_probe(dev, ret, "no gpio-controller child node\n"); + unsigned int i, nr_irq_parent; - nr_irq_parent = of_irq_count(np); spin_lock_init(&info->irq_lock); + nr_irq_parent = of_irq_count(np); if (!nr_irq_parent) { dev_err(dev, "invalid or no IRQ\n"); return 0;