From patchwork Sat Apr 2 14:36:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799340 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48244C433EF for ; Sat, 2 Apr 2022 14:38:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RS49NCyiCRVtkz19C1aHqT2oXKQjF8PtGinvbN39780=; b=Ka0kDlQ7Nn7XXz SOFO6iHlNSpsJ/uEvVSxh081gXfFhUydSeKdsws5v6I6IgLC0BDzqaG3z+3SusugSMpOB4fWK3NKt 7cgKlgUAXE0LesrnfDI2lWwOPNls8GBUL8ppklZxYkxTKHr89TZlWHv8QAIBYWTHmwcHD8Es0FSMH S406dK+Raj8IWH62zfuDP90LBafDDy5L3j33T5qGPjuxBNyNKlSmEC2v/JVuDSVtT8ToBive5r7QO fWokoHbVY/SgQnY31kROai67LvLq9uK/CiBcbbCQ7U5hhzgdQbcL6AgWC1w2w+UXqT0XpZ4nBsC+i QeNtINs9LaOUasLwN9RA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesK-009JRS-Da; Sat, 02 Apr 2022 14:37:12 +0000 Received: from mail-ej1-x629.google.com ([2a00:1450:4864:20::629]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naerw-009JEb-Dh; Sat, 02 Apr 2022 14:36:51 +0000 Received: by mail-ej1-x629.google.com with SMTP id qh7so1398362ejb.11; Sat, 02 Apr 2022 07:36:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ay5bIkDMN0uWXFaucFOQ03lqhqXOzPmmv54m4o8auLE=; b=RvgbPEG3WIiL//B+ubI3vbRFJWsOVYJku3J9ODjBbgB1bLKL0HE6yHEpz7c0zAEFoN w7WiczXcCXezSPwFP5LqpDHoGG9De5viqdBAgEgAwa4apaYbR/mU093W6ZqzW6QZXbbM t8ch6M0V6mJsKJJo0+crOv8cGXYX7AOfq4sQYQsYhGmEn9qj05qYEK0OA1yz/01L1Dun U1Dw0nWZPGiSSWZ9wJNcGBci24sNtT1Ssyj4TQ42/d32seY0xLUMdSBUaAf9LY2Al6pv RS9XH11lyqWAD70gS/S22z5YUM9Vp6Jm7Do8nTPDYtnJfHD6SZN231AI1+Vm8KfFLg7h BZmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ay5bIkDMN0uWXFaucFOQ03lqhqXOzPmmv54m4o8auLE=; b=JNHjJyDnsyLDcoey9csBb7V3OT7Ei1YifyhGww3OC/VTpBJEngwCcd46Kk8My1eWU5 ayLy71QAckyIkHltgKV7qEWYbIYz/8rOhu0C9GXqm9m9mAsXO2LS1DxMt+ScGrwEvZOu Qy6h+gGxAqYL0//YiIdrQj9WFC3bN+meuSVt2SV4LGFR262MUEssmcUaqHXT0dxOEXEA e3rrqvgjmNdLS2qC6qshyayJEh8y4FYwxnIqPiCd9uRoOFWXH/tPp+97QzfOpfT98fUG ICRAJiybvYg36qbiPn7jLT8t7K7RHTcMrfkxpMn4AyJX3b4llrlFS9rayyNEoroYQZWy xP7w== X-Gm-Message-State: AOAM530UXsj+Mj8OSOCbLzg5yAv26bTSTalKEhTowAln3x0uCiHITUJz AxJ+4hf4JaSuDT+KooCaO6E= X-Google-Smtp-Source: ABdhPJxm4mqwNr+KeTDo/7qreofruqZueesSFWpUFtS4m+sFct+MNlyiLH22R+eW/XGiaHx72ivOSQ== X-Received: by 2002:a17:907:2cc3:b0:6e6:45fb:39fa with SMTP id hg3-20020a1709072cc300b006e645fb39famr2593392ejc.545.1648910204514; Sat, 02 Apr 2022 07:36:44 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:44 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 01/16] dt-bindings: clock: convert rockchip, px30-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:21 +0200 Message-Id: <20220402143636.15222-2-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073648_526751_3B962587 X-CRM114-Status: GOOD ( 20.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,px30-cru.txt to YAML. Changes against original bindings: Use compatible string: "rockchip,px30-pmucru" Signed-off-by: Johan Jonker --- Changed V4: add more clocks Changed V2: add allOf:if:then: constraining --- .../bindings/clock/rockchip,px30-cru.txt | 70 ---------- .../bindings/clock/rockchip,px30-cru.yaml | 120 ++++++++++++++++++ 2 files changed, 120 insertions(+), 70 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt deleted file mode 100644 index 55e78cdde..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt +++ /dev/null @@ -1,70 +0,0 @@ -* Rockchip PX30 Clock and Reset Unit - -The PX30 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: PMU for CRU should be "rockchip,px30-pmu-cru" -- compatible: CRU should be "rockchip,px30-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- clocks: A list of phandle + clock-specifier pairs for the clocks listed - in clock-names -- clock-names: Should contain the following: - - "xin24m" for both PMUCRU and CRU - - "gpll" for CRU (sourced from PMUCRU) -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing, pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "xin32k" - rtc clock - optional, - - "i2sx_clkin" - external I2S clock - optional, - - "gmac_clkin" - external GMAC clock - optional - -Example: Clock controller node: - - pmucru: clock-controller@ff2bc000 { - compatible = "rockchip,px30-pmucru"; - reg = <0x0 0xff2bc000 0x0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - cru: clock-controller@ff2b0000 { - compatible = "rockchip,px30-cru"; - reg = <0x0 0xff2b0000 0x0 0x1000>; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@ff030000 { - compatible = "rockchip,px30-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff030000 0x0 0x100>; - interrupts = ; - clocks = <&pmucru SCLK_UART0_PMU>, <&pmucru PCLK_UART0_PMU>; - clock-names = "baudclk", "apb_pclk"; - reg-shift = <2>; - reg-io-width = <4>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml new file mode 100644 index 000000000..c88e7e3db --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,px30-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip PX30 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The PX30 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,px30-cru + - rockchip,px30-pmucru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 5 + + clock-names: + minItems: 1 + maxItems: 5 + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,px30-cru + + then: + properties: + clocks: + minItems: 1 + maxItems: 5 + + clock-names: + minItems: 1 + maxItems: 5 + items: + enum: + - xin24m + - xin32k + - gpll + - gmac_clkin + - i2sx_clkin + + else: + properties: + clocks: + maxItems: 1 + + clock-names: + const: xin24m + +additionalProperties: false + +examples: + - | + #include + + pmucru: clock-controller@ff2bc000 { + compatible = "rockchip,px30-pmucru"; + reg = <0xff2bc000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + cru: clock-controller@ff2b0000 { + compatible = "rockchip,px30-cru"; + reg = <0xff2b0000 0x1000>; + clocks = <&xin24m>, <&pmucru PLL_GPLL>; + clock-names = "xin24m", "gpll"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Sat Apr 2 14:36:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799339 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 166E9C433EF for ; Sat, 2 Apr 2022 14:38:13 +0000 (UTC) DKIM-Signature: v=1; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:45 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 02/16] dt-bindings: clock: convert rockchip, rk3036-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:22 +0200 Message-Id: <20220402143636.15222-3-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073648_510907_E2EE4578 X-CRM114-Status: GOOD ( 20.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,rk3036-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: add more clocks add clocks to example add clocks requirement --- .../bindings/clock/rockchip,rk3036-cru.txt | 56 ------------- .../bindings/clock/rockchip,rk3036-cru.yaml | 80 +++++++++++++++++++ 2 files changed, 80 insertions(+), 56 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt deleted file mode 100644 index 20df350b9..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt +++ /dev/null @@ -1,56 +0,0 @@ -* Rockchip RK3036 Clock and Reset Unit - -The RK3036 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rk3036-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "ext_i2s" - external I2S clock - optional, - - "rmii_clkin" - external EMAC clock - optional - -Example: Clock controller node: - - cru: cru@20000000 { - compatible = "rockchip,rk3036-cru"; - reg = <0x20000000 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@20060000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20060000 0x100>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml new file mode 100644 index 000000000..121b298a6 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3036-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3036 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RK3036 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,rk3036-cru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + maxItems: 3 + items: + enum: + - xin24m + - ext_i2s + - rmii_clkin + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@20000000 { + compatible = "rockchip,rk3036-cru"; + reg = <0x20000000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Sat Apr 2 14:36:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77B36C433EF for ; Sat, 2 Apr 2022 14:38:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jCj0UnuB4x5V9uD5ZYGt5bUzKaCMwylytTd7cc9LAZk=; b=LpQjfQYUARqdlU 1dDmYQkYFvN1siKXpRdRLNItfTImg0Xo5M4xxvoS5Ic/5eCm3hbZ4OLEBOY5EnbU/vM/oFvc7pbP8 cEnPLEXPv1XHQFlG+eMir394oo5vIG3yE/3VzUizAqFE6KFrerrJcOobkxdieUCS8+HD7ogHOJ8sy mp5hTM8C3XsDLPbHqoYr/llKJx+8m3Oa7fVZBKbwg3nWO25wfUawl+wx5PTrWxsorO0L3cd8Szun/ KbCbpwQXZBKvf4S4JEmG4uUv70it6uo7bJ9sei5A5IjL5KNvH5wjIIdLMR8H+9eQ3UmsOkmjNHWzM A8YrEzgvvQBXJWIo5vvQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesj-009Jgg-Oh; Sat, 02 Apr 2022 14:37:37 +0000 Received: from mail-ej1-x632.google.com ([2a00:1450:4864:20::632]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naerx-009JEl-Ac; Sat, 02 Apr 2022 14:36:51 +0000 Received: by mail-ej1-x632.google.com with SMTP id dr20so11364659ejc.6; Sat, 02 Apr 2022 07:36:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QIVGUjs41+UBtdFf/mZgPvyrkZrSiMzhST++uwe+iNs=; b=IGuZEVR1bFfkZLH0sXRh90pKHTRRNW+084MuD3+cu+xCPq7RTGrtNw3tLoT2zl7sZM EFO02jQytaY4f1Ib7Qb46XSoN+k9aXQUHsSy3VSO00Dlr3MkT7v0X3MaFyei6TvNNx17 PghUn/aKObHAUxVd+ijKsB95beQTPQUinP0oKxwvvKNFSSt1kXJONRRZsCiwo1lEwCEi 1GSASPfAxpBTSbowHLyGrmMnXbXI66rVTQUwqGpS6kmvPkKHqmIh0PG9AAJukYt1cBGk K5Ogcve+0/GAHD+AwBhAK8Bq15Z55hNE+aXv2uJW/fle+avizL1bqapFmElhkeftp13W urWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QIVGUjs41+UBtdFf/mZgPvyrkZrSiMzhST++uwe+iNs=; b=fi++NpADnzn+RfajrwZbHwKdDvB/H9f9OqfS5m+1JrH/FwZ69vMdnnXRLCF3NG5UdB V37QLBImdO9Th+LoqfgezbQibC6YhKULQtjQa0qYGMKJSSYePRG1JbpCR0WETuFi+r1q XCSpyqDLRyEp1RPhEL/nnhJ1zS4TkdwV+J1EUsDXPG8Po2Tu3NxK8jMsAxucQUe+MD8y nfLgeBacv1Z9aQTNy1KenzvicGrQ4anbfaiNIU3qyYgYVhOQL6nh9Kq48fPXm1/bw8oK lltAIr51Ndbg/jtYQ4+Lxs/VQRI7TpsDyIB8qfMYN3aSyACPevQ6a4Fh/S/x9/ifghIw JOzg== X-Gm-Message-State: AOAM530sxnIfODfPJHocbjmQPOxDGUhkZQyfi157stxIMWbw6rmKwJ4K 7+cH47BjsnrLJLzLxYtM3u0= X-Google-Smtp-Source: ABdhPJwwbv2hW46fHq4psw3tyc9kpcHon8oxSjm3y1lmDhVixzxYpzsjl7IzWYUwvvIthjYoIrN/ag== X-Received: by 2002:a17:907:8a17:b0:6e7:28d2:ba51 with SMTP id sc23-20020a1709078a1700b006e728d2ba51mr883255ejc.614.1648910206412; Sat, 02 Apr 2022 07:36:46 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:46 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 03/16] dt-bindings: clock: convert rockchip, rk3188-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:23 +0200 Message-Id: <20220402143636.15222-4-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073649_428782_29E2A60D X-CRM114-Status: GOOD ( 20.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,rk3188-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: add more clocks add clocks to example add clocks requirement Changed V3: add Rockchip maintainer on her request fix yamllint line too long Changed V2: change clocks maxItems add clock-names use clock-controller node name remove assigned-xxx --- .../bindings/clock/rockchip,rk3188-cru.txt | 61 ------------- .../bindings/clock/rockchip,rk3188-cru.yaml | 86 +++++++++++++++++++ 2 files changed, 86 insertions(+), 61 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt deleted file mode 100644 index 7f368530a..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt +++ /dev/null @@ -1,61 +0,0 @@ -* Rockchip RK3188/RK3066 Clock and Reset Unit - -The RK3188/RK3066 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rk3188-cru", "rockchip,rk3188a-cru" or - "rockchip,rk3066a-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3188-cru.h and -dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources. -Similar macros exist for the reset sources in these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "xin32k" - rtc clock - optional, - - "xin27m" - 27mhz crystal input on rk3066 - optional, - - "ext_hsadc" - external HSADC clock - optional, - - "ext_cif0" - external camera clock - optional, - - "ext_rmii" - external RMII clock - optional, - - "ext_jtag" - externalJTAG clock - optional - -Example: Clock controller node: - - cru: cru@20000000 { - compatible = "rockchip,rk3188-cru"; - reg = <0x20000000 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@10124000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10124000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <1>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml new file mode 100644 index 000000000..ff849c729 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3188-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3188/RK3066 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RK3188/RK3066 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3188-cru.h and + dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources. + Similar macros exist for the reset sources in these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,rk3066a-cru + - rockchip,rk3188-cru + - rockchip,rk3188a-cru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 7 + + clock-names: + minItems: 1 + maxItems: 7 + items: + enum: + - xin24m + - xin27m + - xin32k + - ext_cif0 + - ext_hsadc + - ext_jtag + - ext_rmii + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@20000000 { + compatible = "rockchip,rk3188-cru"; + reg = <0x20000000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Sat Apr 2 14:36:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 90216C433F5 for ; Sat, 2 Apr 2022 14:38:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WlcDwTSfzk8yUmNfk71y9iVu4WjCSvQIOoBiJI0Uf/Y=; b=AZIMbyJ6B7KzGs MgVcayOyLICL/ys1OHcs0ca2AEdexGefWrxOAMwZwXELj5Nu8qONQgUoYqqYNC+sXYpiPW5WB09KP rG63c4yK8Fu4YsaA0mEToemXoY7g5ULVJhm/r/NVJA6ToVlMsidbURcUkVLnwHtB0Z8fyw7ku5gCA 4R338ggyeFmfNXcFYaJzr31u7HM1c8TvPnOSbjrnWwk/0b5Sl+PoV4z3CELDhDM2RKSRUNfL6Ebhe dneBsBruoxoh2FT44cmhrJsWEw/c8doT73TMKfVi6bUiz8eZDzJmYQhMoyiLbwEcFEfVGo43yzpNK JWiKSDcgD3IhBAjbhGXA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesU-009JXC-DR; Sat, 02 Apr 2022 14:37:22 +0000 Received: from mail-ej1-x629.google.com ([2a00:1450:4864:20::629]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naerw-009JF3-Gz; Sat, 02 Apr 2022 14:36:51 +0000 Received: by mail-ej1-x629.google.com with SMTP id ot30so1483541ejb.12; Sat, 02 Apr 2022 07:36:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5wuju+GcmYHRq1+g1VvLGc9DiGyJBre0gIrOt9rqobw=; b=avp5su2L7EX/jwg6lriJohP1j8I/Nq4bQNRYW5UFYMAwJX0cDeilOfV2oIgUGU5wd1 XafhySaun27VOslvjeenI95S+mBKD5O49ta0aUMMyf/G8j2P1zBtEE58K6Gz+YorWDeX QWeZ3FZnadj0RlUXzfkWNmycQWXpCkJtpKcSi42mc9yUwz8CgekkVJTGGf946pH3/xBF lI74l/c6KZUTxRq/FZGJZ4i22GCwb3geJBFfOetGH9o1vEWYJW4gBoyzyFt9Je5DkXuW gGpBhhvkI0Og4VqgPI3FQsYR9N9CM61TyE8MgmEr1mbSm1aK3f6GjiJty92QFXUreUf9 JkKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5wuju+GcmYHRq1+g1VvLGc9DiGyJBre0gIrOt9rqobw=; b=dinuBpxySNT6TnhhiClt0zqb+L+mC8S/8xNyQG0LJ5jx9bq0LBAROtByCm0GOUs1p7 Pbxha40iRFgUL4KP0Fxvc4GP7l/G2pfNSFeMX0vYCv1JsE2IktZWaZwmPVMeV70b9n20 YqV68hI7pYdXzMEnPK4hF+WrPBQT6uGn1B0ky/dHfbv6QuDAYox/07c6fXmASGfnyF5M CsjYowUGgPngN0wru2N/nx6ZmtIlN4hPPpZTUaLAbbB8pnHvvkHZ4YeDrQaZA1tO37l8 kIKbFhLeM+pF6tTGq7GsTEOhtGtNWltgYOf7MU2p++Qh2gs+maLRN0+ujATz/KIpgx6h 5Sbg== X-Gm-Message-State: AOAM5321PYQAY/11cgf60ZibLsHPMdxxOH/uWmNTIHFjp90F8fClBGdR 0B6fW3OrLvvfD7zhcRz7K0c= X-Google-Smtp-Source: ABdhPJy+WWzYHb7E1VcYub3CXzv5wWc1U+pq1/5Ev2buxP2+8x9LYC16fYRchAXleRmqyNxCKqTvJw== X-Received: by 2002:a17:907:7704:b0:6cf:48ac:b4a8 with SMTP id kw4-20020a170907770400b006cf48acb4a8mr3914724ejc.305.1648910207334; Sat, 02 Apr 2022 07:36:47 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:47 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 04/16] dt-bindings: clock: convert rockchip, rk3228-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:24 +0200 Message-Id: <20220402143636.15222-5-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073648_609622_346A13CE X-CRM114-Status: GOOD ( 20.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,rk3228-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: add more clocks add clocks to example add clocks requirement --- .../bindings/clock/rockchip,rk3228-cru.txt | 58 ------------- .../bindings/clock/rockchip,rk3228-cru.yaml | 82 +++++++++++++++++++ 2 files changed, 82 insertions(+), 58 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt deleted file mode 100644 index f32304812..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt +++ /dev/null @@ -1,58 +0,0 @@ -* Rockchip RK3228 Clock and Reset Unit - -The RK3228 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rk3228-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3228-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "ext_i2s" - external I2S clock - optional, - - "ext_gmac" - external GMAC clock - optional - - "ext_hsadc" - external HSADC clock - optional - - "phy_50m_out" - output clock of the pll in the mac phy - -Example: Clock controller node: - - cru: cru@20000000 { - compatible = "rockchip,rk3228-cru"; - reg = <0x20000000 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@10110000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10110000 0x100>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml new file mode 100644 index 000000000..0a91c5dc9 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3228-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3228 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RK3228 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3228-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,rk3228-cru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 5 + + clock-names: + minItems: 1 + maxItems: 5 + items: + enum: + - xin24m + - ext_i2s + - ext_gmac + - ext_hsadc + - phy_50m_out + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@20000000 { + compatible = "rockchip,rk3228-cru"; + reg = <0x20000000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Sat Apr 2 14:36:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CDC43C433F5 for ; Sat, 2 Apr 2022 14:39:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=11KDOXqewoSQjvZV9yX+ICKc8ENT9umvTqBH/SgSD4k=; b=bx5uNqCCIKs9Y/ xYOlnXbDkw3iWD0JvmCDOfA6Ob2GezKwegFWBsCowgjy0EWi/WPTSNoXG4u0JT+DbKBxKJB04sl0K 0vp6XZT2sdiQjSlR+F6F9W2z1STGwkadKgfnERfuXWmnQ5yDlJOUVqrMyUMtgQbSko+yPcs8jLtqS C8lxVYUoCxxy7m9IjfXDkJMuiE3Gx29kye8iJTHaXoy1jM/fg14MYUOfepFniWFKWGEJ30duzqhhj fFFNu9f6okqBh6sP+ioU8fD4ZduDXa4fqZ0RrpCsaLtkK+3y7teshs+gj4k+15cKEEoz+GTB9AIQ3 yzbYSuj6XrczK9O4ModQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naet7-009Jxt-Fn; Sat, 02 Apr 2022 14:38:01 +0000 Received: from mail-ej1-x62f.google.com ([2a00:1450:4864:20::62f]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naery-009JFj-Cr; Sat, 02 Apr 2022 14:36:53 +0000 Received: by mail-ej1-x62f.google.com with SMTP id yy13so11446388ejb.2; Sat, 02 Apr 2022 07:36:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4sJAGR00sQPyOa2NU6Kbyt+hZau/MXPRKhM5pgnXKBk=; b=nSX9fb1plzvZ8Fzbh6lDWAeF2413rghTIuHHV7jUMZEmWpfKljublWpjDg9xSVwPmU 5maN3DQhb1xh1LGSQRKfXUOvwnun1NLQTqIf86MH5vUqvKSV0XCzfFjdTJD3Gculn+qt kfR7+8cWZ7HpXAMeEjPfjJnuGjKXrNRDqnGRUEsiHgXqoRqOlEFKWSeh5Co+Ehw/sW9d akAsexFf5b2vD4OwgfrTTWgj9n3ScWe4MMvASNWVO3SpocPl8uky5WZMFqlEmjYo/Xlv 49igTm1MeW0W7oRKPrUX0t62lYwLPbuFDsPETsWqcAk446julRqLLIqxQmWpnATKlzqs 3BXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4sJAGR00sQPyOa2NU6Kbyt+hZau/MXPRKhM5pgnXKBk=; b=Duamh1T7DNsn7r90Vxf3G88htgiSr8UYwzNjmgCaUQNjj3WqmGubO+LWGPHr+OrIBh FZyEql5/ptserH6vMY+LTpbpe6QTsbTdcqoFgaJpsCFHn1SvaL4M5o3p3KesSe53gvxV mv3I5JmGmwq7rDmOfAI399NHto+pHpLQrO/LxVbsX0Uxygi3E7OJGWQm0oJlHfPKa2k4 V5f8b5VEXwiror8R+JMrxB/RYEAu+QUjatX+Z1q+3TlT5x4n7tu0/eHZpsSo2hxlqmap DpuhQkzrN7WSYwB7lotVNF+vzbFhBOTY8FQsi+VEVHnI+yydKLyr6je8zsCVt6fIilSH 8+Pw== X-Gm-Message-State: AOAM532WLxH5VI9E29dRw2238eoqxe+BvxUElqVFcXO67zem7D2XqBR3 95EasVc8Q8Uiq66ArAGhk/s= X-Google-Smtp-Source: ABdhPJwUDASQKnl3UVkOThXossDxGeZHDcmYNFHcd6uJ8J+iXty3WoVJI3QJE2Ya1Uh+nRCJNTJKEg== X-Received: by 2002:a17:907:7295:b0:6e6:d8c7:5b4b with SMTP id dt21-20020a170907729500b006e6d8c75b4bmr1651189ejc.606.1648910208241; Sat, 02 Apr 2022 07:36:48 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:47 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 05/16] dt-bindings: clock: convert rockchip, rk3288-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:25 +0200 Message-Id: <20220402143636.15222-6-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073650_541771_FFADFC1F X-CRM114-Status: GOOD ( 22.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,rk3288-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: add more clocks add clocks to example add clocks requirement Changed V2: add Rockchip maintainer on her request fix yamllint line too long restyle --- .../bindings/clock/rockchip,rk3288-cru.txt | 67 ------------- .../bindings/clock/rockchip,rk3288-cru.yaml | 93 +++++++++++++++++++ 2 files changed, 93 insertions(+), 67 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt deleted file mode 100644 index bf3a9ec19..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt +++ /dev/null @@ -1,67 +0,0 @@ -* Rockchip RK3288 Clock and Reset Unit - -The RK3288 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -A revision of this SoC is available: rk3288w. The clock tree is a bit -different so another dt-compatible is available. Noticed that it is only -setting the difference but there is no automatic revision detection. This -should be performed by bootloaders. - -Required Properties: - -- compatible: should be "rockchip,rk3288-cru" or "rockchip,rk3288w-cru" in - case of this revision of Rockchip rk3288. -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "xin32k" - rtc clock - optional, - - "ext_i2s" - external I2S clock - optional, - - "ext_hsadc" - external HSADC clock - optional, - - "ext_edp_24m" - external display port clock - optional, - - "ext_vip" - external VIP clock - optional, - - "ext_isp" - external ISP clock - optional, - - "ext_jtag" - external JTAG clock - optional - -Example: Clock controller node: - - cru: cru@20000000 { - compatible = "rockchip,rk3188-cru"; - reg = <0x20000000 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@10124000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10124000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <1>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml new file mode 100644 index 000000000..558e5a094 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3288-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3288 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RK3288 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + + A revision of this SoC is available: rk3288w. The clock tree is a bit + different so another dt-compatible is available. Noticed that it is only + setting the difference but there is no automatic revision detection. This + should be performed by boot loaders. + + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,rk3288-cru + - rockchip,rk3288w-cru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 8 + + clock-names: + minItems: 1 + maxItems: 8 + items: + enum: + - xin24m + - xin32k + - ext_i2s + - ext_hsadc + - ext_edp_24m + - ext_vip + - ext_isp + - ext_jtag + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@ff760000 { + compatible = "rockchip,rk3288-cru"; + reg = <0xff760000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Sat Apr 2 14:36:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799344 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 39856C433F5 for ; Sat, 2 Apr 2022 14:39:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=eHj7mLiG1+t2Ia8K5alBgU0ulU3id/bCb4OnDYG1Ub8=; b=OsCVQhIn6EJqkF wcvl5smGUBLBvGRyXbS4q9AXjJNnkEUZHgo2I21zPcMIdVhqooaoyWTj73d5FdydVqdtJm+rljOWn eCGCaGFNtykKMs7zCgJvQQYa2mnIWncvW4m/8fsgDkIp2OJC3Zq8ZY20hxXOuneV+dY4koit7AtcC 1qC7chPK8KFdjYcdf1gWfqhfovn1fBvNlnRyE9fXjnWgFhfGxWC6vtPQ4thNXWX68DcWHZ9s8Vj8E 9meBdUaZJ2Z0KyyKVlc3aESg91pnuylRHXfxjGvXAb4FfNe5k1xEwoJUBSV0qd2bXkgWFUNSt6D0u lzYMLpMrqnx61x5S4tRg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naeti-009KPW-ID; Sat, 02 Apr 2022 14:38:38 +0000 Received: from mail-ej1-x62b.google.com ([2a00:1450:4864:20::62b]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naerz-009JG3-Dp; Sat, 02 Apr 2022 14:36:53 +0000 Received: by mail-ej1-x62b.google.com with SMTP id a6so460684ejk.0; Sat, 02 Apr 2022 07:36:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=McFpQ5/hW4Zbu4Ht8+BLpCgdUXBbUIZ2u7Nful4GDGM=; b=CnkrWwg6ioIxsLmOZcg3Ae61uiEygQtLuvT17CHCUiEYmLqsKPLFhHKsNC5XJcLkC9 z9DBA+3MQg/zDKo9j3fAn6s7rPu06EZk0o9P8VH9UeBrABB5cGvmEb2JOtcBGUZixHGI y2URA+odVgsW/AB9CoqA3Z1dz5yo31ykqaP0Bav13LX+1IMC5z9Q03L2MU1I5e1qDxXL sD0e6ZLKUcWPlUwu0u7yXj+GQGDwfi4ukto2UZd6KOo/atEJAQO1GL/M1a9lIB8dAv7L hBqs7DnY/22R6Tdkmrmr5zbRpoTaYGaEGJNO4y8vCpMsfx5wkTBp9FBcOLJkom1Vi22j oQeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=McFpQ5/hW4Zbu4Ht8+BLpCgdUXBbUIZ2u7Nful4GDGM=; b=CqSncBEcdUhJdpkvQi/Pm7nzBCoi2Pbxs2yCMN/QO7EklLbfWXmAC63KNIvO53swMG Q9lniU7I6iaSzIrIPxQPqIPS2Ivapj/i9rIsjybRMk+NEzN/c0W2cO8YwEx3SXewprRK cJgBkO8yug7Tg+LtyqUtSulZQrMUJUU4NvvAVyyJPZ1emQmEmfURrYk7WmtlfrWdOVZx HbvL+Bmp4XtEMX4TEakF5MxHLxZEJA9WNrk7RWgldYku2yZwXUvN1NUjzZZSHjObCL2P 24YxYC3U8IBCZMh7N7acoJ/SiyF4RVV/lAn73bckiuVCdmIbrpj3CW9TElxZcIfNqNwq lSuw== X-Gm-Message-State: AOAM532Ni+biOCvW6/TCRY3a8o9WbHv4zcVip1TvOvG5f69GWSJQhRdb qjE3LmsYCX9IC/lMeJNQlfA= X-Google-Smtp-Source: ABdhPJzpTeP7eaTWHqyR4NNPQDqgajKijKBnn1fgmM99LPS0+oVSq68qsxMPcdcn+EUwY81sEQ1ufw== X-Received: by 2002:a17:907:2d8d:b0:6df:a06c:7c55 with SMTP id gt13-20020a1709072d8d00b006dfa06c7c55mr4054714ejc.325.1648910209152; Sat, 02 Apr 2022 07:36:49 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:48 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 06/16] dt-bindings: clock: convert rockchip, rk3308-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:26 +0200 Message-Id: <20220402143636.15222-7-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073651_539250_D33BB512 X-CRM114-Status: GOOD ( 19.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,rk3308-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: add more clocks add clocks to example add clocks requirement --- .../bindings/clock/rockchip,rk3308-cru.txt | 60 ------------- .../bindings/clock/rockchip,rk3308-cru.yaml | 86 +++++++++++++++++++ 2 files changed, 86 insertions(+), 60 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt deleted file mode 100644 index 9b151c5b0..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt +++ /dev/null @@ -1,60 +0,0 @@ -* Rockchip RK3308 Clock and Reset Unit - -The RK3308 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: CRU should be "rockchip,rk3308-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing, pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3308-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "xin32k" - rtc clock - optional, - - "mclk_i2s0_8ch_in", "mclk_i2s1_8ch_in", "mclk_i2s2_8ch_in", - "mclk_i2s3_8ch_in", "mclk_i2s0_2ch_in", - "mclk_i2s1_2ch_in" - external I2S or SPDIF clock - optional, - - "mac_clkin" - external MAC clock - optional - -Example: Clock controller node: - - cru: clock-controller@ff500000 { - compatible = "rockchip,rk3308-cru"; - reg = <0x0 0xff500000 0x0 0x1000>; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@ff0a0000 { - compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff0a0000 0x0 0x100>; - interrupts = ; - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - reg-shift = <2>; - reg-io-width = <4>; - status = "disabled"; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml new file mode 100644 index 000000000..01f2d1690 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3308-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3308 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RK3308 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3308-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,rk3308-cru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 9 + + clock-names: + minItems: 1 + maxItems: 9 + items: + enum: + - xin24m + - xin32k + - mac_clkin + - mclk_i2s0_2ch_in + - mclk_i2s1_2ch_in + - mclk_i2s0_8ch_in + - mclk_i2s1_8ch_in + - mclk_i2s2_8ch_in + - mclk_i2s3_8ch_in + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@ff500000 { + compatible = "rockchip,rk3308-cru"; + reg = <0xff500000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Sat Apr 2 14:36:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799358 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B0D4C433EF for ; Sat, 2 Apr 2022 14:43:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rdbzrwd498fbKti3/PEgrdTRA0e/klkIVrBUWDmZ68Y=; b=Do2ChYI1i+PRKA w3eMdXcVLE7ra+0RMxWTxmiWxIIGb5+i1D+APftPkH3zhRQVrF9I/J58X4nfX3w4wBYMrnmrVSY1K sO84f6y1irH6UectC2TZaxHId/McZYnv6Sw+eCkfiN6U7lZ43FnfrmQw0gcTdNnI5I4S0iVHUnOak G0SrcEcr2XG7sGD6Yb8gi8PRPiRzBuYDD+IW/buYHhbcqiu3aThx+7I/6hqVnIrn/uOSz5s2uGlAH 59YtfNXqSSwLH7tYp7osxYVv0iPMAksokaOlFRDVYVFFUxYsIsQnqANhZmLcRlTDtJewOP0UPCr5j Jl+3yGtAiigUn5uAdV4w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naex7-009MJj-4M; Sat, 02 Apr 2022 14:42:09 +0000 Received: from mail-ej1-x636.google.com ([2a00:1450:4864:20::636]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesE-009JGU-EB; Sat, 02 Apr 2022 14:37:09 +0000 Received: by mail-ej1-x636.google.com with SMTP id qh7so1398649ejb.11; Sat, 02 Apr 2022 07:36:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gDX6XR3jVDm9yWJ+XzR+YFdJXpUjQXrovXJ8YXoJ/eQ=; b=Gkcp8k95sTeZEk8ouc+Cz0NB5BQTPfw9R9dJ5Q1aGu6JQ4E+2wJuYyFT3PY9hcZcy1 HVvbItxziBvdTE95+7S+Z4pZ7EVz44W+pLxU4OTDCxqpNIEBZ+OpaGTQD1HNSpLI6P9K 1Zo7OY9F1u4i8U4TjwPZwsMrJ8cM9E2yKyba1siqaiw7T7WP5l0kt3v4+ZeQsLYiBqtX xF0ahmQsB6PMLPpxh6VYMBHIEC5UeKJ10JD3WcYU3Gbwbxc68L4HPcDvtKoxc3CmtoM9 lGhlD48L3rczzHKysiYUxi6yEZ5Q8doxOP9MNE773DBjePlQlq5iDvpCzpMvwe/l8OPk eR2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gDX6XR3jVDm9yWJ+XzR+YFdJXpUjQXrovXJ8YXoJ/eQ=; b=Gf1z03bdlptJPMN1yEE1bIJ8FlTwiKYP3nN6tJYkcmh/WJmLWeIFMclJZ5ehZ4UgMp cukV7+Lm3PozsKSHVLV6MxYRNwEiOlpFkXRQ7wQcPF0zo44vgJyeLl6HVkuDk4H1vIJf Udhl+moPR1XflCSSOtdLtMoDwO+kSWGqAy4sVbChPc6CxXM3+ezwfQtJIlO/fCLBfR+Q d1ayXlcOtJsVkhA7eKO8th/QSJ8hEgO2ec2cJHd2Alud2O9FRvK9kNIjAIlnyt5nkY9r q+kY6FzbIN1IUUT9xXQB0+TWXRYDDhI6J04OE30aMrlAUhXze5iDr62IS/XV0IfW1HTX sngg== X-Gm-Message-State: AOAM532r1qE8bOlHersLWkfFx37O1PQg0UlzQ/bqO6y0qGvkJvHhZvNU Y3MeTbLmt+vOYrNIFBEdW7M= X-Google-Smtp-Source: ABdhPJxDsZ0j8m7pCLEC+sxvbQOm35l111ofY5I/W40A9SpsH55KuoLgxiZNEbcTmIxdLc1g3Li69g== X-Received: by 2002:a17:907:6e03:b0:6e0:15ce:77ba with SMTP id sd3-20020a1709076e0300b006e015ce77bamr3988665ejc.67.1648910210153; Sat, 02 Apr 2022 07:36:50 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:49 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 07/16] dt-bindings: clock: convert rockchip, rk3328-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:27 +0200 Message-Id: <20220402143636.15222-8-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073706_564311_EE6F1F13 X-CRM114-Status: GOOD ( 19.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,rk3328-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: add more clocks add clocks to example add clocks requirement --- .../bindings/clock/rockchip,rk3328-cru.txt | 58 ------------- .../bindings/clock/rockchip,rk3328-cru.yaml | 82 +++++++++++++++++++ 2 files changed, 82 insertions(+), 58 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.txt deleted file mode 100644 index 904ae682e..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.txt +++ /dev/null @@ -1,58 +0,0 @@ -* Rockchip RK3328 Clock and Reset Unit - -The RK3328 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rk3328-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3328-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "clkin_i2s" - external I2S clock - optional, - - "gmac_clkin" - external GMAC clock - optional - - "phy_50m_out" - output clock of the pll in the mac phy - - "hdmi_phy" - output clock of the hdmi phy pll - optional - -Example: Clock controller node: - - cru: clock-controller@ff440000 { - compatible = "rockchip,rk3328-cru"; - reg = <0x0 0xff440000 0x0 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@ff120000 { - compatible = "snps,dw-apb-uart"; - reg = <0xff120000 0x100>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.yaml new file mode 100644 index 000000000..965f67be3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3328-cru.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3328-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3328 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RK3328 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3328-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,rk3328-cru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 5 + + clock-names: + minItems: 1 + maxItems: 5 + items: + enum: + - xin24m + - clkin_i2s + - gmac_clkin + - hdmi_phy + - phy_50m_out + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@ff440000 { + compatible = "rockchip,rk3328-cru"; + reg = <0xff440000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Sat Apr 2 14:36:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48AEBC433F5 for ; Sat, 2 Apr 2022 14:40:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bA2E7XEZCXt0y0ewMYvCHCKInGE6us6L+YXe6EZ4XZg=; b=NIxFE8B7cip8g/ PHOsCjmNXOc/RUDNny4wih7nAfaAy5n2//MQqHaOMXlnRumvQpy0CB44tb03NNgF266nAkdg4S57c EhG8L4TPDNFpYDXjS40eRpEL82VGIS91FjhtMyZvY/0NIv8M8KWsgA6i+iTT6DhMhudnxJjesVeIe jrsRO65e0ph5czEgfQD1dAF/sQi35dPppJ1Ye3X+KY/ECbHXOUrBVP29gyXCRcG2J1HgnAk1t709i QOHyeJtOCLD/za3g9g+gq2IZq/SV4Ti8hRIhp+GexmrCAK9aBZO5Fejr8cO8ANs3Te3DBV/I/LU3g XsE/DmYlpJYvvcie+WDg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naeu6-009Kdz-AL; Sat, 02 Apr 2022 14:39:03 +0000 Received: from mail-ej1-x629.google.com ([2a00:1450:4864:20::629]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naes0-009JHB-8m; Sat, 02 Apr 2022 14:36:54 +0000 Received: by mail-ej1-x629.google.com with SMTP id dr20so11364907ejc.6; Sat, 02 Apr 2022 07:36:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2aGoR+jxGDzn8cgNTtv9/Wz52MpH/aK9EVPCLp/ehIM=; b=ikSmNvyPeCmAtCK60FrPC5QI4QD8u3dzi7SFtTmYR496NfMiTk8b5Dl39Y0zvp/jC8 IM8bYf2NPzpzlihE4OBUu2VqwXhXtgbYJr2i+nhcHEy58gdLz1yI7NiDrc6Py+4IWi/J qCb4hvKBYmsPqijBuW9cuTQ0VkVoRI2l4tf2VIGskizoiNP6VY+C/7I3sJJwf6Mt6LHh C2EbJ2ea5OgCwEdIe73JzUmuHA0/c15H6hLK53wccqG+MUcuctoa4z0YBb+nyw32M04B Tf8r8pkvmUh75AcQGMB9P3Jn5Gql6rEJxwuzwzplrPjPK53waSKt+VbnEH3R/S2JK8PF lvpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2aGoR+jxGDzn8cgNTtv9/Wz52MpH/aK9EVPCLp/ehIM=; b=4Dw4pL+OsRDpVqjRHtAhObEe7NNZpGPoXv2r03b+TohmIIGo0CngHk+5rZpXX/5IEJ FlOsJ6EUl5EyitzdIGHCgtEq34Zgmi7TeQMpgJXBOxTPB/KgsQmrLznhJqHCAlxCN8Hq /+9lAEDRzwQ+YJyUND2NgRHWcdC1eje2ziG87uyKzU9Z/Fubr8R41FiSPvMucQp6xoSa /pMPdT3zPTEIFcDHti9jPXIoX/PpbKpL8ANtOAd1bx+sP/h7HCAt9bb2M1pmkm29AbO1 lCuQF7bKjh9SkhXqoP+QCCkOsfVD5XjTpit0fxkFmih5pELwRGNmQthCyA3Psa9/pjYJ O8ig== X-Gm-Message-State: AOAM530JjFJA7HfcJijnrQ/QMIUQPrFDrBm0ZtSZm0p+yQHIIJ3zvHc0 +jAEB4YhJDlNtGFXFSQ45VQ= X-Google-Smtp-Source: ABdhPJxi9Qq9lRX++GDHOv/U4QNe8vF8sPKa2MqR4wILfaeO88cZNIUGrkotlOQi22yA9u5y56mrBQ== X-Received: by 2002:a17:906:a398:b0:6ce:71b:deff with SMTP id k24-20020a170906a39800b006ce071bdeffmr3974682ejz.204.1648910211054; Sat, 02 Apr 2022 07:36:51 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:50 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 08/16] dt-bindings: clock: convert rockchip, rk3368-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:28 +0200 Message-Id: <20220402143636.15222-9-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073652_425848_C8915F92 X-CRM114-Status: GOOD ( 20.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,rk3368-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: add more clocks add clocks to example add clocks requirement --- .../bindings/clock/rockchip,rk3368-cru.txt | 61 ------------- .../bindings/clock/rockchip,rk3368-cru.yaml | 86 +++++++++++++++++++ 2 files changed, 86 insertions(+), 61 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt deleted file mode 100644 index 7c8bbcfed..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt +++ /dev/null @@ -1,61 +0,0 @@ -* Rockchip RK3368 Clock and Reset Unit - -The RK3368 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rk3368-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing, pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3368-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "xin32k" - rtc clock - optional, - - "ext_i2s" - external I2S clock - optional, - - "ext_gmac" - external GMAC clock - optional - - "ext_hsadc" - external HSADC clock - optional, - - "ext_isp" - external ISP clock - optional, - - "ext_jtag" - external JTAG clock - optional - - "ext_vip" - external VIP clock - optional, - - "usbotg_out" - output clock of the pll in the otg phy - -Example: Clock controller node: - - cru: clock-controller@ff760000 { - compatible = "rockchip,rk3368-cru"; - reg = <0x0 0xff760000 0x0 0x1000>; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@10124000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10124000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <1>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml new file mode 100644 index 000000000..b09d169c7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3368-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3368 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RK3368 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3368-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,rk3368-cru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 9 + + clock-names: + minItems: 1 + maxItems: 9 + items: + enum: + - xin24m + - xin32k + - ext_i2s + - ext_gmac + - ext_hsadc + - ext_isp + - ext_jtag + - ext_vip + - usbotg_out + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@ff760000 { + compatible = "rockchip,rk3368-cru"; + reg = <0xff760000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Sat Apr 2 14:36:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799348 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48748C433F5 for ; Sat, 2 Apr 2022 14:41:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YTBdhIkSfnN/Gr0O3AQg3iqI4zi/4IGX1hpwbXdMzmc=; b=FSAl9u6ASiO+JD wWgXB7ta3zEnJANjeHql7EJSETohtUsJtzuZdzicInoUGs9cy3HUrt8uHgXtf1/g8SMn7ZQCBvZ99 NCaNpTQyOwoRuLd8wm5AhXmQGnQQaHA5S5lI8pwo55nDnRpEJfdj+NTwJCLsuUqEmVrRCryPRoBt6 xY9PLbLDjRlQ54lc/gckt0FjOKF9Entt4M3w+GWSCo/kxOo6GuDI4zCYCWAk/6GiZubNrW8q4qFHi YhibBSdU5mdLpk2aMLwsp7yzolqfhr8O5BqvDl0uIM6AIICGA1dPBJJa0lREbKZyGe/WpLU6kg/zD l5sr4lWK0mr3Z0ZcHxKQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naevX-009LNn-2m; Sat, 02 Apr 2022 14:40:32 +0000 Received: from mail-ej1-x630.google.com ([2a00:1450:4864:20::630]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesD-009JHv-1V; Sat, 02 Apr 2022 14:37:06 +0000 Received: by mail-ej1-x630.google.com with SMTP id bq8so11357289ejb.10; Sat, 02 Apr 2022 07:36:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RI0GoRc5b1X0/vt9l1Smbq3N/ifsIvAYcPQbiupDesQ=; b=Fu/AyvztsYDGFE4E4SbHfWP3jdau9pB/RhNZtRTr4NEiw1+HpAsmxypnrgc3eRo3PN yxf7tfLd/8WleFomFsQAFVAY2P2s11ZRRnRrZDtw6JfaQX+dJG0N3l7Mg4jCkNX5Nh9f 7LNzDlVxDYDHMvD2pAAMU2aPPNEx2HFh9DuVW/ZkJsmpEnVmai2WkRHnGLOzt0AX2lSG sTc76KvIh0+DE/bEG3jQSnXA1hKyGlHzCu+17XZqm0ITfxmpJkyjHzjvswUCf1Qe9Rzh jnZChEKN2Gxe/yjqtbMXag8rAHfE7Tfq4IYhvSiWw4fDr75CM0UfpLlZ9vqJfcbLNBV3 nbTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RI0GoRc5b1X0/vt9l1Smbq3N/ifsIvAYcPQbiupDesQ=; b=eYBVpyvrh3P45X9sHR9v0sbJqtqczjf2RBoUDpHP6L5gbZ+yrJySQtNhk2U7Yh0TuL r7FqVwIsyh6uq2kZ6IAFowOOTsnx/MvsiltuvFCxFTMHLGbstvN/qv5xLlLRBvA9Uzlt FRpQGlN+EkRoKTmWCENVC3+AWcL5vstwoGL+Kk1uo0JIdqa6nkLxyBiDzOa2oDWYatnY ktAWmTObQB7cHExnbyAfbfxtfaoZDixXv94iBoVv1RauRTICprg1ltw8Ir/wFR4hBoR0 UooEcrfw3W8CMXND0buzWT84pniQn7CjeqriqotEREfoHMWDaz5XWgcQlWW9otWwcldk 8msA== X-Gm-Message-State: AOAM530vwVT86Mxz3FX6u3d/2+hXKNeTCXpuly9afMxtede4gXddSFaN +jKtGXk+1/V2+WMmF3e5P+U= X-Google-Smtp-Source: ABdhPJxjvkr5bVULkIKPFJH4QLeCWNip5rPSmhjzRxv3NkzjaHPu80dIevC+y3oKx/F/XxZBhky4fA== X-Received: by 2002:a17:907:60cf:b0:6db:f0a6:74af with SMTP id hv15-20020a17090760cf00b006dbf0a674afmr3927634ejc.317.1648910211938; Sat, 02 Apr 2022 07:36:51 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:51 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 09/16] dt-bindings: clock: convert rockchip, rv1108-cru.txt to YAML Date: Sat, 2 Apr 2022 16:36:29 +0200 Message-Id: <20220402143636.15222-10-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073705_130466_2130F902 X-CRM114-Status: GOOD ( 20.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert rockchip,rv1108-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: add more clocks add clocks to example add clocks requirement --- .../bindings/clock/rockchip,rv1108-cru.txt | 59 ------------- .../bindings/clock/rockchip,rv1108-cru.yaml | 83 +++++++++++++++++++ 2 files changed, 83 insertions(+), 59 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt deleted file mode 100644 index 161326a4f..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt +++ /dev/null @@ -1,59 +0,0 @@ -* Rockchip RV1108 Clock and Reset Unit - -The RV1108 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rv1108-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "ext_vip" - external VIP clock - optional - - "ext_i2s" - external I2S clock - optional - - "ext_gmac" - external GMAC clock - optional - - "hdmiphy" - external clock input derived from HDMI PHY - optional - - "usbphy" - external clock input derived from USB PHY - optional - -Example: Clock controller node: - - cru: cru@20200000 { - compatible = "rockchip,rv1108-cru"; - reg = <0x20200000 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@10230000 { - compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart"; - reg = <0x10230000 0x100>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml new file mode 100644 index 000000000..abbfdfae8 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rv1108-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RV1108 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RV1108 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. + +properties: + compatible: + enum: + - rockchip,rv1108-cru + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 6 + + clock-names: + minItems: 1 + maxItems: 6 + items: + enum: + - xin24m + - ext_gmac + - ext_i2s + - ext_vip + - hdmiphy + - usbphy + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@20200000 { + compatible = "rockchip,rv1108-cru"; + reg = <0x20200000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Sat Apr 2 14:36:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799360 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7FFC7C433F5 for ; Sat, 2 Apr 2022 14:45:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NY/WNmTnesKI+Wc77GULyxLKFuqOo65JaDmKyghYxR8=; b=xHB2T168K2lzVX MHkpDW8gTb+jef9qfjDwXKHGVVzyzRKXg88Pncwbt51Z2bdDA2mPAOTWNmYj/m0Y3dVbDEWAW/cBo QEYsYdbIICMk+PJLf8MNpp7i5XPb/w6R/jKOLGD4pzK5tgxTNf+j62HEEBVxxPdyHyOc9Vz56WMCd 04OsiNNASLckCOV3WaPvAPBYJRbO+rLWsDSyD3oLx5nqSc0eaewZXQ6fPyQJ1yeK9NW58n2o2eHzq bhCEOr0w45/4f3P/DIDd1Cq8CRX4Z/Kn50rARBtyfCbsqMLaU7KO/rlD7JqqMgo7oeRImivJL1Mz5 PyWrWLAd4OysLjLJWo5Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naeyH-009MsZ-3i; Sat, 02 Apr 2022 14:43:21 +0000 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesD-009JIU-LO; Sat, 02 Apr 2022 14:37:09 +0000 Received: by mail-ej1-x62c.google.com with SMTP id yy13so11446635ejb.2; Sat, 02 Apr 2022 07:36:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+72+q1Txcd0x+KfNjt3ACd6ZcebuPkaO0L/4gKOj9+0=; b=oTJu+xsN8ywcQNmH772d3KN5prhrg21w4+tEM+sA02t5NmTbGwRiJnlFt1GjR41pu7 DnepmW2CR8HUomcZmq1yHep8leDOECqj7dP3V5ATAhJLi0hypc7MiW8pFECHxM508nyI OSQnRw6h+g7LoFln3CjrgkW7S5+RNEf+MnF92OcXYMtrVyyiLlBaYDlRX4ngvBq+DvXz Tp1qWLpdQewlKa8wV8qqrQ5Ux4q5XjcFqiQGhIYfvrSTX8jVoMsU4h+TWrBi0yCdM+cs Bbg5zzyGgvmYUhFBVaLAjpYklcycSO83CHte7Vit2P+y4qCYaUs46rRwhX627KIqwXZ6 QnVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+72+q1Txcd0x+KfNjt3ACd6ZcebuPkaO0L/4gKOj9+0=; b=Za7pym+v/CIqOVj1GLj/bCw69h6GzMjIXqTEpxxgO5VrV4/bj+h4mOaaU9mszPX//s eCxqgvMDNzgGP1uvz8ztnC4w3OSR9uBPxiPhdfcER0qDxUtLicEqm43GFBDwzZA0ANuK YeDikWs+l9NyfNDQCF0EIFfg8BzrzB7lsGUXYui6Zjx+BjWVtLGmk9r3o7D0cp1+nB05 mKqmU7X0CqdVihSrAYXL4OodX++KXPWE5UB4NSLc0T3xRtxLAHzbEUU4mN+oyTQHiyuy 37P0FUbi2qXgPQzsxUVpDln5f3cnp9t/td84KgpF1RAP9F7sR2G/eTtCNjIpa3pAXBL5 L/Qg== X-Gm-Message-State: AOAM532w8muZjRPCdXSAtUGULFDWeGEufbiWow82m7hBsby8s46JQ5S/ 089sEufBNgHTlTcF56V6yh0= X-Google-Smtp-Source: ABdhPJx/A0xgRJhlO6BICgIqz9WDJ5poFGm4p0UJMsgf1vYVei9jL21VvAup7jxV53a7ohORvW2JLw== X-Received: by 2002:a17:906:dc90:b0:6e0:1ef7:638f with SMTP id cs16-20020a170906dc9000b006e01ef7638fmr4147584ejc.234.1648910212849; Sat, 02 Apr 2022 07:36:52 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:52 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 10/16] ARM: dts: rockchip: add clocks property to Rockchip cru nodes Date: Sat, 2 Apr 2022 16:36:30 +0200 Message-Id: <20220402143636.15222-11-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073705_755114_686ADF31 X-CRM114-Status: GOOD ( 11.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add clocks and clock-names to the Rockchip cru nodes, because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- Changed V4: combine patches --- arch/arm/boot/dts/rk3036.dtsi | 2 ++ arch/arm/boot/dts/rk3066a.dtsi | 3 ++- arch/arm/boot/dts/rk3188.dtsi | 3 ++- arch/arm/boot/dts/rk322x.dtsi | 2 ++ arch/arm/boot/dts/rk3288.dtsi | 2 ++ arch/arm/boot/dts/rv1108.dtsi | 2 ++ 6 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index ba2b8891b..3894b8d2e 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -330,6 +330,8 @@ cru: clock-controller@20000000 { compatible = "rockchip,rk3036-cru"; reg = <0x20000000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index c25b9695d..de9915d94 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -202,8 +202,9 @@ cru: clock-controller@20000000 { compatible = "rockchip,rk3066a-cru"; reg = <0x20000000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; - #clock-cells = <1>; #reset-cells = <1>; assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>, diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index a94321e90..cdd4a0bd5 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -195,8 +195,9 @@ cru: clock-controller@20000000 { compatible = "rockchip,rk3188-cru"; reg = <0x20000000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; - #clock-cells = <1>; #reset-cells = <1>; }; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 5868eb512..2547f46fe 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -484,6 +484,8 @@ cru: clock-controller@110e0000 { compatible = "rockchip,rk3228-cru"; reg = <0x110e0000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 26b9bbe31..487b0e03d 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -862,6 +862,8 @@ cru: clock-controller@ff760000 { compatible = "rockchip,rk3288-cru"; reg = <0x0 0xff760000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 448254906..eceaa940b 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -456,6 +456,8 @@ cru: clock-controller@20200000 { compatible = "rockchip,rv1108-cru"; reg = <0x20200000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; From patchwork Sat Apr 2 14:36:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84B52C433FE for ; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:53 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 11/16] arm64: dts: rockchip: add clocks property to Rockchip cru nodes Date: Sat, 2 Apr 2022 16:36:31 +0200 Message-Id: <20220402143636.15222-12-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073707_112125_8C3C8BC0 X-CRM114-Status: GOOD ( 12.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add clocks and clock-names to the Rockchip cru node, because the device has to have at least one input clock. With the addition of new properties also sort the node properties a little bit where needed. Signed-off-by: Johan Jonker --- Changed V4: combine patches --- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++-- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 2 ++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++++ 4 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 1cbe21261..2dfa67f1c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -745,10 +745,11 @@ cru: clock-controller@ff500000 { compatible = "rockchip,rk3308-cru"; reg = <0x0 0xff500000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; - rockchip,grf = <&grf>; - assigned-clocks = <&cru SCLK_RTC32K>; assigned-clock-rates = <32768>; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index b822533dc..9c76c288b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -758,6 +758,8 @@ cru: clock-controller@ff440000 { compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon"; reg = <0x0 0xff440000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index c99da9032..4f0b5feaa 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -747,6 +747,8 @@ cru: clock-controller@ff760000 { compatible = "rockchip,rk3368-cru"; reg = <0x0 0xff760000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 88f26d89e..ce1cc42ff 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1416,6 +1416,8 @@ pmucru: pmu-clock-controller@ff750000 { compatible = "rockchip,rk3399-pmucru"; reg = <0x0 0xff750000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&pmugrf>; #clock-cells = <1>; #reset-cells = <1>; @@ -1426,6 +1428,8 @@ cru: clock-controller@ff760000 { compatible = "rockchip,rk3399-cru"; reg = <0x0 0xff760000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; From patchwork Sat Apr 2 14:36:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799346 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B6D2C433F5 for ; Sat, 2 Apr 2022 14:40:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:54 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 12/16] arm64: dts: rockchip: rk3399: use generic node name for pmucru Date: Sat, 2 Apr 2022 16:36:32 +0200 Message-Id: <20220402143636.15222-13-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073655_807922_E6F2615D X-CRM114-Status: GOOD ( 12.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The node names should be generic, so fix this for the rk3399 pmucru node and rename it to "clock-controller". Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index ce1cc42ff..56af1a1d6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1413,7 +1413,7 @@ clock-names = "apb_pclk"; }; - pmucru: pmu-clock-controller@ff750000 { + pmucru: clock-controller@ff750000 { compatible = "rockchip,rk3399-pmucru"; reg = <0x0 0xff750000 0x0 0x1000>; clocks = <&xin24m>; From patchwork Sat Apr 2 14:36:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799361 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1AAE6C433EF for ; Sat, 2 Apr 2022 14:45:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ahyN2wwv7H27sm/SY0F1tqE0UeQXknotdp74ixtqvtk=; b=grJL+sX8vdyYtL iR1w3KrGm4p8YKCPmrXUWPYxJqc145DBg/d8PqgErKHc6ePmZWNQonRT4VU6SjWE/LOKwTxV/rcn3 DBTDiidQFLXiS43Mwo9UGUiwru5/CdLV9clQtfHfQu4bkEN1AB1o9yIuC7iR451skOrwF7ogaFigs U9roQLlD+RqKjS8XZrJrwW2g8iSxUTlqGuaVqpXbMoWH/W7axsb8ARGdb/PfqvzFNZ+LgTHBFrXby ouaFsryXdLGF8CCYuWGsv2EdR74pDaYH2Ud6cy/gxFXcrHONGa4eiCOqyRKvciTV6fgi6izVrpRdp G9W6G8WTXTCsk/j99qrQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naez9-009NSr-NK; Sat, 02 Apr 2022 14:44:16 +0000 Received: from mail-ed1-x52e.google.com ([2a00:1450:4864:20::52e]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesF-009JJY-1d; Sat, 02 Apr 2022 14:37:09 +0000 Received: by mail-ed1-x52e.google.com with SMTP id b24so6061496edu.10; Sat, 02 Apr 2022 07:36:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uTBoLKmFu3SudRrqJ18gR0Ex2iOqgaqOCTSIcXbzjD4=; b=d2XA5+lbzbqgUClSScxRzK8VZ4PkpUMVTN0uvEH/krKdNx4C1+rVGMAkjyjl5wk6F0 un/rwtokiCwsoqEMKy0SOwqTlDVOQz2srNSeZEd+IvowfEUexyuPGpU7CkIi/vcsK5P0 bk+WbRlafAay2+EHW94cNWP9r7Ym6QahwLQIlWO5ebpwEY5Nd3XKnBpdRXh56Kvk7Bhp 5JnXO/dTunO6BrD2H16p80mMYpj/FKFeE7qT8z6Tc2Xza4hNWlYUVG56ASU/cspgFqmD bE+fwB3TSUeFBbqgZzbFdt9JJRe4ONJFBg9jw21LAIrTQ15iHnU3WcIpSxb4IanrJEZo 0DtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uTBoLKmFu3SudRrqJ18gR0Ex2iOqgaqOCTSIcXbzjD4=; b=eEcQ++VK6hpeMlNQXLYop5o/f99cifBP4NFQ5T9zvW6o/+nDc4NAipLyZYYXltIYhc 1IytsthalEhNupeQwWbQwDeNVFe5hUW1KVGnyDYRmmFhCdQZoIR570r4cP/+lT71BlJx MTPRp4DbhVTduNYN+Sn7p4/WBAhm6dg/UtwFK4y5pn3blCavadZuAFy1rIK/g4O4bAoc sEkjs+ktOcBTCVmtn4g6xiQrVTcz+zi6+KD2dD7FCH3nCqOaKqTFdywv4UhDJjHYiWa/ zRCozUN+eZlQax2XK+QClVIbwfDNFcc0GSADAHKyr4iLczbMYveFUBODVC9UCj73dIvP kFcQ== X-Gm-Message-State: AOAM530yQjqTT0bNIH9iiby0YoxGrtly1X35UWsCvsXNUB+34VA92ChE U77VWmaKuGBIGTxTWdOszBw= X-Google-Smtp-Source: ABdhPJzZeLptWSIWN1DIeaKwHOX9srEUgHYaOuX/82OJK1wtowsFIw+5wYQxhBkNlts96i0VQfbncQ== X-Received: by 2002:aa7:db94:0:b0:410:f0e8:c39e with SMTP id u20-20020aa7db94000000b00410f0e8c39emr25102336edt.14.1648910215459; Sat, 02 Apr 2022 07:36:55 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:55 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 13/16] arm64: dts: rockchip: fix compatible string rk3328 cru node Date: Sat, 2 Apr 2022 16:36:33 +0200 Message-Id: <20220402143636.15222-14-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073707_168984_7E41AE69 X-CRM114-Status: GOOD ( 11.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The rockchip,rk3328-cru.txt file was converted to YAML. A DT test of the rk3328 cru node gives notifications regarding the compatible string. Bring it in line with the binding by removing some unused fall back strings. Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 9c76c288b..8ceac0388 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -756,7 +756,7 @@ }; cru: clock-controller@ff440000 { - compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon"; + compatible = "rockchip,rk3328-cru"; reg = <0x0 0xff440000 0x0 0x1000>; clocks = <&xin24m>; clock-names = "xin24m"; From patchwork Sat Apr 2 14:36:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B4727C433EF for ; Sat, 2 Apr 2022 14:41:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UoPQvA/fDEDNIyNg5oSEBFTqmMgeMo0UKFpOVs50LnU=; b=sZAGnlML1QCM2b FADwPh8s5uhulkeam9ug0EGnWWtB24LDwVOMKkHfK9Rs2dtyJeStj6tTYfO0T9EwgdDY45eo+nPb2 sIliwcAZSsZsiYhnFtP9v0vnFAdfvLv7rjeEUYw+hddk6U+04opOEkCqLvvs4FZAp+Hqc10AGtEsP 2DSFkHrx02ckkvBcPaXfCLhtt5qcefP4iizN2cYHTqySUOYX21TIBGtWyr1uepSSXaYUrYtrDddw7 P4zmKNL42bcynWyrz2J+SZC12e5lx/UhRzydT4vsu7h+lRpj1lqhEeNzj5xl33SLUDxU6IX75/d3V QojwQpIHovBXDOOLRlXQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naevA-009LDu-Nm; Sat, 02 Apr 2022 14:40:08 +0000 Received: from mail-ej1-x62b.google.com ([2a00:1450:4864:20::62b]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naes5-009JJr-Ib; Sat, 02 Apr 2022 14:36:59 +0000 Received: by mail-ej1-x62b.google.com with SMTP id p15so11376094ejc.7; Sat, 02 Apr 2022 07:36:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UMzMILXZOYBjEHWGG0NtpE3Gk3RKI6Zuc2PgcEOU4hk=; b=hKH+EKXwHDcVdeec4xKFrNDsZIRyknKca1Lf0IqDKfvplrYbVWQI6lg8AHp/WMaqRr 1kgMP/fsOjJzdh1R9iMh0f1MQiXtPIlKnwURS8zfHuVGs53qVd6QkmBmFKedyB0ww4Bv oQmK7d1B/fsghyO74h6dJXDYP8VlgjIP1ZpESFOCH0Vw1rZQz73TRX7U4kFGXv0YFoKv BYmrjQqzHEDS0Ij8SK1ZUJBNqEmZ7BiOqoo+USngfl6NFbFr+NhlHJ4r11zDNKebbIOR iPGrY8wAE4WBBO+z+iCJ5SLfPLygzHXWTdojFiw5VGi+WD9q0GKDRIXGs2xnO4fCial0 Rz9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UMzMILXZOYBjEHWGG0NtpE3Gk3RKI6Zuc2PgcEOU4hk=; b=qOdQWLa7jsjAs1qGuNpdT37+EjqHeVgQON0WYXC5wcfOll0R8ovNAPYp/xhDecaql9 pPUSmo6gOHtSc5X//27KoQ9Rz2pW35lpWdr67PGiHJmjt1fCAneEDZlzrx3gX/fmXW/g UTQk3tAAUrZZfKzG/8hRNzrJfosdPAObwSX42uarp6eiPWInsJyL7NHVXw1rfQhK3xUL q5c5TFwbF43waEp9xl68/6/QaRP8c7PzYLVxJeOuZRW4lw5gC77qTY3NIYmvmnQCol+e t7TDhYG1n/nU/DhvS0IteDVZ35ZpznrCtTD2/cRexpd6vKcitlLybL+TISlcGha+JY/e frkg== X-Gm-Message-State: AOAM533b/wa1Ir3c68ZYsy2RsdcW5A//4O/hjGTTDUhLEDanWJA08mXJ S9uLVsJp3nW8aUyX+s/d8lk= X-Google-Smtp-Source: ABdhPJzkt4WAyQJZ3jF1iMKFKicysCmRDS+tUpRwZXcfJmmMfXyM7C6JEmced06QohgpOIs1rpC2cQ== X-Received: by 2002:a17:907:1c0a:b0:6da:7ac4:5349 with SMTP id nc10-20020a1709071c0a00b006da7ac45349mr3992797ejc.596.1648910216420; Sat, 02 Apr 2022 07:36:56 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:56 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 14/16] dt-bindings: clock: replace a maintainer for rockchip, rk3399-cru.yaml Date: Sat, 2 Apr 2022 16:36:34 +0200 Message-Id: <20220402143636.15222-15-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073657_704853_1EF83837 X-CRM114-Status: GOOD ( 11.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org With the rk3399 cru YAML conversion the original text author was somehow added as a maintainer, but who's currently no longer involved on the subject. Replace this position with the Rockchip clock maintainer on her request. Signed-off-by: Johan Jonker --- .../devicetree/bindings/clock/rockchip,rk3399-cru.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml index 72b286a1b..5ee686938 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Rockchip RK3399 Clock and Reset Unit maintainers: - - Xing Zheng + - Elaine Zhang - Heiko Stuebner description: | From patchwork Sat Apr 2 14:36:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799357 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE62BC433F5 for ; Sat, 2 Apr 2022 14:43:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=j0WVkodfh+lfAILHEFgarhJacz17Uk2s2fP4FbCxTA8=; b=DZw2ISKuVJUA5o A/gx78dHDakyMt9QD1IcuAWC6cMvLuJkORJ1UBMrkQym4Hi+kZGJ2Ohtsq2g2MwLXq0gbhI1olO+/ l7g53bEHRC9MwTlk+MfVngS9krBahkoz80aUbBfEP30lPgRT8Gl0AclMaMh01s+Ps2IXaU9J20SsQ cAB/eb5XX5vCTwFPZ3MFwpl0b56dRcSONA/48EqOVsRqYtgaH4/t2oyEsAd+IAv3NEVcKZO4W4rNX L2JtaiT6tjTHL2EiyUQiFOyVJi1T3nfx1j+UsBQs5nfFdmy5u6pHvbC6k3Q7idphlv7MOcjTg3Yqr T1kfNHmcNwPUBBbRrqnA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naewl-009M7O-3s; Sat, 02 Apr 2022 14:41:47 +0000 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesD-009JK7-Jr; Sat, 02 Apr 2022 14:37:08 +0000 Received: by mail-ej1-x62c.google.com with SMTP id p15so11376127ejc.7; Sat, 02 Apr 2022 07:36:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mzmU0Dp6HwdkT8Z3OuirJmjfQNObHAqgJgTjMG47n0A=; b=aAJvmM6ItjEgWTXZGaCViiqDWjBz6+wHVzQdkA8YZcefaus3pcCVmi4hu/yGogWBMw NsOpU0o/vLInsxt50G/p7LyhyeTXAyCL7VE5KLYddZ+YFOjMgt6uENIlXUmDioFAATtU /oA6PV3nNuyQpf2qD8dO0hTlLwIoi6Gve0sFXpZf1B50xqKSFG3h/INH4EU9+EuSRTYw MNRtw5w0g7/FhQL5TS133sS7PxJsG7+NDwKAbTMuv8l9fSdLyeoLUd0hiyZvJTdooMre CuaQjr41QjhVOcQuxc7cVKqRgt+zisakKkkqHQtyVjK/lQV8iFZnnhGVgxLBuDNqAJEc zLzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mzmU0Dp6HwdkT8Z3OuirJmjfQNObHAqgJgTjMG47n0A=; b=lZNc4dtfjASsYbLnKs+e+aIirEa6FfJVJszaU+KvgyzNzcpAdIVqq+vAOciWDosPRT AHRQzH6YB/KjISK5NrZZj1TgF87VZDUdBzUOjOw+E3nf8I2Odpko6iBEPDrayPUJY7AF nkJ6nsVCuQhXGgLvw9DucAswy7RxA3nLEPoE6+pitfYn5SzjoojCNH2FR/8YAtRS/Nyc hmzFCgqgxzOuR9vSliQepLVzwPzegJq0bbUV4b2QQ4V1XA761NeDBB7Zu18eG4maF36K bIdF1jGVMuBBYv+ybSyoSfkPnWZOzXd4zrteJYT1VY6hnZJjC9lgpU4aFwumWrta2Hj/ o04w== X-Gm-Message-State: AOAM532ZD6DErqK+0POpgvnXtL+eFM1MMdqvS4aUZEmcnb3ruuEtCn1j NmatSNoxmimROcFhpW4sOsY= X-Google-Smtp-Source: ABdhPJy5vDCSDA33e1YaTBNZjVAxvQmIg2J1e3ERyi0Y8CcCnlsMLUqoBKYkj1aRKQ+EF8csYeOy3A== X-Received: by 2002:a17:906:3918:b0:6e0:5bbd:bf33 with SMTP id f24-20020a170906391800b006e05bbdbf33mr3920592eje.764.1648910217228; Sat, 02 Apr 2022 07:36:57 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:56 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 15/16] dt-bindings: clock: use generic node name for pmucru example in rockchip, rk3399-cru.yaml Date: Sat, 2 Apr 2022 16:36:35 +0200 Message-Id: <20220402143636.15222-16-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073705_724070_3044974C X-CRM114-Status: GOOD ( 12.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The node names should be generic, so fix this for the pmucru node example in the rockchip,rk3399-cru.yaml file and rename it to "clock-controller". Signed-off-by: Johan Jonker --- .../devicetree/bindings/clock/rockchip,rk3399-cru.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml index 5ee686938..e91147c84 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml @@ -77,7 +77,7 @@ additionalProperties: false examples: - | - pmucru: pmu-clock-controller@ff750000 { + pmucru: clock-controller@ff750000 { compatible = "rockchip,rk3399-pmucru"; reg = <0xff750000 0x1000>; #clock-cells = <1>; From patchwork Sat Apr 2 14:36:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12799359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2FFAC433EF for ; Sat, 2 Apr 2022 14:44:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=45vH8OWEfNrUWF9L8er1dP5PEKzHTcdcTyOy978owFk=; b=g+GdzGWs5/Wo9F UjM8QJw4rIuXTb4zHJ6SNJqVNuA8nz6bAZd9/A3amIMZWEfSmJHfi3Cgw89/t7+ckne4b3fq3nCkV +MShu22/FjmoulYsANkZhxWFwdtVV3YiFTBeUTdO1PZMhFhBeyh7ssPfS46vZ6zmptRlSY/SqL8+5 c7ijxBs11L9Hvggq7wrJj2PQ02fwfZkUb2FTR1h2Q9tyK0TEA5OeKTFweZeqLoxA+h+kbj/bsKhlC IfY6+/04FoRvefj19K+6V5nFVeJVsg7QawQoDwjwfL7DYQFim3taGy4EtT8Ys7ODUmivJzWmasBKm mtZCttjORUVEy10eEKbQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1naexe-009MYD-8E; Sat, 02 Apr 2022 14:42:42 +0000 Received: from mail-ej1-x631.google.com ([2a00:1450:4864:20::631]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1naesE-009JKn-U9; Sat, 02 Apr 2022 14:37:09 +0000 Received: by mail-ej1-x631.google.com with SMTP id bg10so11423507ejb.4; Sat, 02 Apr 2022 07:36:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=A5SAjUnYFQM9w8TOLgtiKBk9tPwBKnHPcAhw0POhc3g=; b=b+K26tGd8dmMu+pIRWuwIMbEAih1Gm5KNPQz4TaxkahLVAIXTDQOYilQfs8RntMuHl z1o/m88jL57/PMesvniiC8uNJH9XM91PY50+Fe6sr9+CKQM6os9BZO+0TpyKt16jRTTD ViQt0MTtubQNJJf2rVHYmbgOIQxVgCbd4upIBjEWLKJNuxtrXiVkFucspBDYOq46Nmkg puOsAJgpI3321euHAjQ3Twa2TebnTGPh8WPtifqk9tP5a3En2kcYWMnA8BE7Z/mtCPer xADC7oCqHspz098E2cckQ6A2UFWwMhNgZvfFbeVvQba6yXlE4y6EZFiGjPf10ntrc4Cv p4HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=A5SAjUnYFQM9w8TOLgtiKBk9tPwBKnHPcAhw0POhc3g=; b=O1QwzeHhs1P4Za0TkU/w6AOYMga988x1li2wk8M2QHoU/mO2KkE7nkkHlAxWORdRYH ssrydmD8GfXddfxJk3JG1J1io2xjenrqLmlD9uuaTdmQBy+Psc8m6GRetvVFsOfdV3G5 uftxTUVXrxVkg5mDdFaapo6d08OMkoVarBq2mHb4nXaW7Jfq0h53U1RAm1O6xbPHJO3l BlJNFfGGF6LcJuzcAirZAayzAIpTHH+rl7kusrOXsibzkpT/tiX7Z86j5l/BXyW3Zgmz 0C+PXhPT4kCfKabDF91KUtxDWQR3uV/95b8BAIh5AMXVm7k+RJ777OXEf8+nudPQFyAe QtWQ== X-Gm-Message-State: AOAM533lad4elUHNj04ufABE8k0WnXf0+dZZ8tesL4XXjOmxzV+WXXdY LfmE/UgFLlN3/C6jvn3QNb8= X-Google-Smtp-Source: ABdhPJxKiB5huzHM1gmRf9jZL2520dkuPbe0wyAiByFM551Ipm7AyngjKLm0atJYVdkKEmHblocIHg== X-Received: by 2002:a17:906:4fc4:b0:6da:b4c6:fadb with SMTP id i4-20020a1709064fc400b006dab4c6fadbmr4195430ejw.282.1648910218049; Sat, 02 Apr 2022 07:36:58 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id bp8-20020a170907918800b006e0daaa63ddsm2169557ejb.60.2022.04.02.07.36.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 07:36:57 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 16/16] dt-bindings: clock: fix some conversion clock issues for rockchip, rk3399-cru.yaml Date: Sat, 2 Apr 2022 16:36:36 +0200 Message-Id: <20220402143636.15222-17-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220402143636.15222-1-jbx6244@gmail.com> References: <20220402143636.15222-1-jbx6244@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220402_073707_045688_57DB4E7A X-CRM114-Status: GOOD ( 15.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org With the YAML conversion somehow "assigned-xxx" properties where added. If a proper clock is added to the cru node these properties are no longer needed, so removed them. With the conversion of rockchip,rk3399-cru.txt a table with external clocks was copied. Include these clocks into the schema. Add clocks and clocks-names to example and make them a requirement. Reorder/restyle so that this file is line with the other Rockchip CRU bindings. Signed-off-by: Johan Jonker --- .../bindings/clock/rockchip,rk3399-cru.yaml | 55 ++++++++++--------- 1 file changed, 28 insertions(+), 27 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml index e91147c84..4574727da 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml @@ -20,15 +20,8 @@ description: | used in device tree sources. Similar macros exist for the reset sources in these files. There are several clocks that are generated outside the SoC. It is expected - that they are defined using standard clock bindings with following - clock-output-names: - - "xin24m" - crystal input - required, - - "xin32k" - rtc clock - optional, - - "clkin_gmac" - external GMAC clock - optional, - - "clkin_i2s" - external I2S clock - optional, - - "pclkin_cif" - external ISP clock - optional, - - "clk_usbphy0_480m" - output clock of the pll in the usbphy0 - - "clk_usbphy1_480m" - output clock of the pll in the usbphy1 + that they are defined using standard clock bindings with the + clock-output-names defined in this schema. properties: compatible: @@ -39,37 +32,41 @@ properties: reg: maxItems: 1 - "#clock-cells": - const: 1 - - "#reset-cells": - const: 1 - clocks: minItems: 1 + maxItems: 7 - assigned-clocks: - minItems: 1 - maxItems: 64 - - assigned-clock-parents: + clock-names: minItems: 1 - maxItems: 64 - - assigned-clock-rates: - minItems: 1 - maxItems: 64 + maxItems: 7 + items: + enum: + - xin24m + - xin32k + - clkin_gmac + - clkin_i2s + - clk_usbphy0_480m + - clk_usbphy1_480m + - pclkin_cif rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle - description: > - phandle to the syscon managing the "general register files". It is used + description: + Phandle to the syscon managing the "general register files". It is used for GRF muxes, if missing any muxes present in the GRF will not be available. + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + required: - compatible - reg + - clocks + - clock-names - "#clock-cells" - "#reset-cells" @@ -80,6 +77,8 @@ examples: pmucru: clock-controller@ff750000 { compatible = "rockchip,rk3399-pmucru"; reg = <0xff750000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -87,6 +86,8 @@ examples: cru: clock-controller@ff760000 { compatible = "rockchip,rk3399-cru"; reg = <0xff760000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; #clock-cells = <1>; #reset-cells = <1>; };