From patchwork Tue Apr 5 08:19:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12801251 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 918D9C433F5 for ; Tue, 5 Apr 2022 08:24:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234702AbiDEI0G (ORCPT ); Tue, 5 Apr 2022 04:26:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235683AbiDEIVe (ORCPT ); Tue, 5 Apr 2022 04:21:34 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF3DF625C; Tue, 5 Apr 2022 01:19:18 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 06B5440012; Tue, 5 Apr 2022 08:19:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649146757; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wNpjgkUaNWn1Mm4Df5e8ycR/tOrOcvbl1JoeRb1Ktqk=; b=VWOvJUv57KfPUNd4/7pjJolyj0apnRjPWls37Dp1giQhXTHORTFH+rhgFL0RbX58YLmPUK 6BDTvizcvg437CTA8S+iieBMbYAs1/WoToemKbhBVYbZlQgRxNDksKnW2/0LSQs/RfMw3w mPLl7w/7IMoUAHk6LKPH7ZH8bKRaQD9ZLPEGWqzJWYZxmaFRcp6Gbu0AkvemsT8gMB0sUm EJp+FOmRzajzmlpBjYzI7VJrKNAN3eEGjKtmJUfXv3xyALCOvA3WYA9KelGyxsQ4UnADNf QqMAOWelXU4p2eN9cZeEOc70PGckbCWoGS+F28TQQplMQQ8PfZWICpWVQGf9Qw== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Geert Uytterhoeven , Rob Herring Subject: [PATCH v7 1/9] dt-bindings: dmaengine: Introduce RZN1 dmamux bindings Date: Tue, 5 Apr 2022 10:19:03 +0200 Message-Id: <20220405081911.1349563-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220405081911.1349563-1-miquel.raynal@bootlin.com> References: <20220405081911.1349563-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring --- .../bindings/dma/renesas,rzn1-dmamux.yaml | 51 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml diff --git a/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml new file mode 100644 index 000000000000..d83013b0dd74 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 DMA mux + +maintainers: + - Miquel Raynal + +allOf: + - $ref: "dma-router.yaml#" + +properties: + compatible: + const: renesas,rzn1-dmamux + + reg: + maxItems: 1 + description: DMA mux first register offset within the system control parent. + + '#dma-cells': + const: 6 + description: + The first four cells are dedicated to the master DMA controller. The fifth + cell gives the DMA mux bit index that must be set starting from 0. The + sixth cell gives the binary value that must be written there, ie. 0 or 1. + + dma-masters: + minItems: 1 + maxItems: 2 + + dma-requests: + const: 32 + +required: + - reg + - dma-requests + +additionalProperties: false + +examples: + - | + dma-router@a0 { + compatible = "renesas,rzn1-dmamux"; + reg = <0xa0 4>; + #dma-cells = <6>; + dma-masters = <&dma0 &dma1>; + dma-requests = <32>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index fd768d43e048..120d3ae57a4b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19040,6 +19040,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER M: Viresh Kumar R: Andy Shevchenko S: Maintained +F: Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml F: Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml F: drivers/dma/dw/ F: include/dt-bindings/dma/dw-dmac.h From patchwork Tue Apr 5 08:19:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12801274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1944BC3527B for ; Tue, 5 Apr 2022 08:32:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235114AbiDEI0h (ORCPT ); Tue, 5 Apr 2022 04:26:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235682AbiDEIVe (ORCPT ); Tue, 5 Apr 2022 04:21:34 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E99A462F9; Tue, 5 Apr 2022 01:19:19 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 275B14000D; Tue, 5 Apr 2022 08:19:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649146758; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ufacyo2BIZ8ell+Qh9P+IyEHIkAIPJ9lkLf9WuXjjMM=; b=L2wKbRaixSiV7iOpPF9bZwPJ+lmkoEesTUzBI7hg9YXUeEGHRNf0zcu3l/EVM3emlAmDbH 5elhFyjKEKbatDiUXMtAGx30e1nA0qUlwm/JypIP8A2ix+55gPCUmh4QDp/Ya/TuMH/uqV 03ynAtIFN3jSr3ZVVCeDaxflYHWT7YsIEo5Q7Wkh+MuMcdCMmoKBVfXcXFtinzn6pOu91h WhfNPhJpmG6B/5rbQ4mbkm8BS7To55qdjfz1dgwXKGkk9+k/MhHSGS3qQB3LI4g7w4xhy8 EA64z8eNY4Nv+WfZCZ8lX8F4qJocSWhXExacZuH1cguhfGYJro+Is/eeInevtg== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring Subject: [PATCH v7 2/9] dt-bindings: clock: r9a06g032-sysctrl: Reference the DMAMUX subnode Date: Tue, 5 Apr 2022 10:19:04 +0200 Message-Id: <20220405081911.1349563-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220405081911.1349563-1-miquel.raynal@bootlin.com> References: <20220405081911.1349563-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org This system controller contains several registers that have nothing to do with the clock handling, like the DMA mux register. Describe this part of the system controller as a subnode. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring Acked-by: Stephen Boyd --- .../bindings/clock/renesas,r9a06g032-sysctrl.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml index 25dbb0fac065..95bf485c6cec 100644 --- a/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml @@ -39,6 +39,17 @@ properties: '#power-domain-cells': const: 0 + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + "^dma-router@[a-f0-9]+$": + type: object + $ref: "../dma/renesas,rzn1-dmamux.yaml#" + required: - compatible - reg From patchwork Tue Apr 5 08:19:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12801267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B54CC433FE for ; Tue, 5 Apr 2022 08:31:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234777AbiDEI0S (ORCPT ); Tue, 5 Apr 2022 04:26:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239883AbiDEIVo (ORCPT ); Tue, 5 Apr 2022 04:21:44 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::222]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 236542AE2; Tue, 5 Apr 2022 01:19:21 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id BE1A74000F; Tue, 5 Apr 2022 08:19:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649146760; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=psSRZJhAOXsPUtZ0dZbzo0PztnR1Q8vauZShn+Y/BqQ=; b=ErW22Sr5/714P2xbxHEmvZ151D2k4+B/cMd7kIpWrdqheRaWwE1ezKy78tFea34WkxZtdB voHuIlHmzPiKixFunA4XbcWUIa1/9ZF3yegRT5fqt4+2k4qTHT6eu+Z5G/65/UDh4gpMO0 aEz2/+/O4vY3oh+XLIZKBGSXCqUMUANaFJ0fVB0JrqUJZesVQnHy+FRJ2ZRsobA8kDYwtK 8BmmSfEI7LspAxVbDOynmT7afqrNgZ+Cvfa3x1JGZHnsUZFW4mCuYxx1qsXTpVSvHZiGh+ IuI8ZOKb3UNkuCA7RLQiW7KP2Xkda5xzB+WpK2FafokI6P9LCu5biIu6awpkSA== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Geert Uytterhoeven , Rob Herring Subject: [PATCH v7 3/9] dt-bindings: dmaengine: Introduce RZN1 DMA compatible Date: Tue, 5 Apr 2022 10:19:05 +0200 Message-Id: <20220405081911.1349563-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220405081911.1349563-1-miquel.raynal@bootlin.com> References: <20220405081911.1349563-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Just like for the NAND controller that is also on this SoC, let's provide a SoC generic and a more specific couple of compatibles for the DMA controller. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring --- .../devicetree/bindings/dma/snps,dma-spear1340.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index 6b35089ac017..c13649bf7f19 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -15,7 +15,13 @@ allOf: properties: compatible: - const: snps,dma-spear1340 + oneOf: + - const: snps,dma-spear1340 + - items: + - enum: + - renesas,r9a06g032-dma + - const: renesas,rzn1-dma + "#dma-cells": minimum: 3 From patchwork Tue Apr 5 08:19:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12801270 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11F9AC43219 for ; Tue, 5 Apr 2022 08:32:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234838AbiDEI00 (ORCPT ); Tue, 5 Apr 2022 04:26:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239897AbiDEIVu (ORCPT ); Tue, 5 Apr 2022 04:21:50 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 604BD64F2; Tue, 5 Apr 2022 01:19:23 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 8350340005; Tue, 5 Apr 2022 08:19:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649146762; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XZQwq9EVWiu0S9glnJx6yd3klQequgPHgMCbo1b5VzU=; b=e4WJZ5CkGxTlYY2WFkeyQqbBhFVeOqrEAWOHEWOuIEbBA3wX8HOli3cqRACvhPoZ7el1uG Tc8fN9x7Mgw4IrNta1Oz7y4zvhNjrgqFuqDtYEdBV8q99r3dppGND2m4oVJxv5f3+GX+Ri 7nxLm72hMxU9yGX58+TFBThEtNtbQeUoM8x9h60NdgbEW7/pYCm2sc1w9fp1PSZeMM0Iid EV48u3E5GgaUQZqyKmvVQKGMsH5lrQByxQnJANGS01wIPkLv2MiJ9tKBHIAXWzDcIWkK+X E6CtUAKnN0EBYu3fJ+VDfbd1qea/tn/8m/Zwc8VaMGsJ4V9Ku5ARiyRKrwPQwQ== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen Subject: [PATCH v7 4/9] soc: renesas: rzn1-sysc: Export function to set dmamux Date: Tue, 5 Apr 2022 10:19:06 +0200 Message-Id: <20220405081911.1349563-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220405081911.1349563-1-miquel.raynal@bootlin.com> References: <20220405081911.1349563-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The dmamux register is located within the system controller. Without syscon, we need an extra helper in order to give write access to this register to a dmamux driver. Signed-off-by: Miquel Raynal Acked-by: Stephen Boyd --- drivers/clk/renesas/r9a06g032-clocks.c | 35 ++++++++++++++++++- include/linux/soc/renesas/r9a06g032-sysctrl.h | 11 ++++++ 2 files changed, 45 insertions(+), 1 deletion(-) create mode 100644 include/linux/soc/renesas/r9a06g032-sysctrl.h diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index c99942f0e4d4..052d99059981 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -20,9 +20,12 @@ #include #include #include +#include #include #include +#define R9A06G032_SYSCTRL_DMAMUX 0xA0 + struct r9a06g032_gate { u16 gate, reset, ready, midle, scon, mirack, mistat; @@ -315,6 +318,30 @@ struct r9a06g032_priv { void __iomem *reg; }; +static struct r9a06g032_priv *sysctrl_priv; + +/* Exported helper to access the DMAMUX register */ +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) +{ + unsigned long flags; + u32 dmamux; + + if (!sysctrl_priv) + return -EPROBE_DEFER; + + spin_lock_irqsave(&sysctrl_priv->lock, flags); + + dmamux = readl(sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + dmamux &= ~mask; + dmamux |= val & mask; + writel(dmamux, sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + + spin_unlock_irqrestore(&sysctrl_priv->lock, flags); + + return 0; +} +EXPORT_SYMBOL_GPL(r9a06g032_sysctrl_set_dmamux); + /* register/bit pairs are encoded as an uint16_t */ static void clk_rdesc_set(struct r9a06g032_priv *clocks, @@ -963,7 +990,13 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) if (error) return error; - return r9a06g032_add_clk_domain(dev); + error = r9a06g032_add_clk_domain(dev); + if (error) + return error; + + sysctrl_priv = clocks; + + return 0; } static const struct of_device_id r9a06g032_match[] = { diff --git a/include/linux/soc/renesas/r9a06g032-sysctrl.h b/include/linux/soc/renesas/r9a06g032-sysctrl.h new file mode 100644 index 000000000000..066dfb15cbdd --- /dev/null +++ b/include/linux/soc/renesas/r9a06g032-sysctrl.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ +#define __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ + +#ifdef CONFIG_CLK_R9A06G032 +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val); +#else +static inline int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) { return -ENODEV; } +#endif + +#endif /* __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ */ From patchwork Tue Apr 5 08:19:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12801266 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76845C4167B for ; Tue, 5 Apr 2022 08:31:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234736AbiDEI0N (ORCPT ); Tue, 5 Apr 2022 04:26:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239942AbiDEIV5 (ORCPT ); Tue, 5 Apr 2022 04:21:57 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::222]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DB9D9FE4; Tue, 5 Apr 2022 01:19:26 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id B8A9840006; Tue, 5 Apr 2022 08:19:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649146764; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WRjdN6jkq9fkRNwYc/qNyJa5NsyQhrDu5GFQ+EKb2uc=; b=OwnS4DLQ924l7Fx0OGPTBgVpejmxQb0YQUuaCx/MbpFnrhEsy0t5Em8UOStNyelRKtAp+g 0K6ezauRzLIFAj4+Lw2LM+/jIaXd9bv58Ry8zOBUFab6BUNlqSyxnFyww3iG+aYZJoXvRg 5UPqAF91CGyZYRVjskmYuXk0jd/kBokZ5bb6xzLc4WkyzCmgwXSIBstb8IM2QKmDQgwVxn pvqB+slQApna60HSEPvF8lGRfFVuP0NY/dUYchaq3pyR2RW1Cnt4ww29kvDjGxmOrq20no sAA+iUpL+23C4RA7KPWtoa7u7ZIGXzadVTAzvcPstO7t2YQIwCh8xM7xGfb+/Q== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen Subject: [PATCH v7 5/9] dmaengine: dw: dmamux: Introduce RZN1 DMA router support Date: Tue, 5 Apr 2022 10:19:07 +0200 Message-Id: <20220405081911.1349563-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220405081911.1349563-1-miquel.raynal@bootlin.com> References: <20220405081911.1349563-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. We need two additional information from the 'dmas' property: the channel (bit in the dmamux register) that must be accessed and the value of the mux for this channel. Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko --- drivers/dma/dw/Kconfig | 9 ++ drivers/dma/dw/Makefile | 2 + drivers/dma/dw/rzn1-dmamux.c | 157 +++++++++++++++++++++++++++++++++++ 3 files changed, 168 insertions(+) create mode 100644 drivers/dma/dw/rzn1-dmamux.c diff --git a/drivers/dma/dw/Kconfig b/drivers/dma/dw/Kconfig index db25f9b7778c..a9828ddd6d06 100644 --- a/drivers/dma/dw/Kconfig +++ b/drivers/dma/dw/Kconfig @@ -16,6 +16,15 @@ config DW_DMAC Support the Synopsys DesignWare AHB DMA controller. This can be integrated in chips such as the Intel Cherrytrail. +config RZN1_DMAMUX + tristate "Renesas RZ/N1 DMAMUX driver" + depends on DW_DMAC + depends on ARCH_RZN1 || COMPILE_TEST + help + Support the Renesas RZ/N1 DMAMUX which is located in front of + the Synopsys DesignWare AHB DMA controller located on Renesas + SoCs. + config DW_DMAC_PCI tristate "Synopsys DesignWare AHB DMA PCI driver" depends on PCI diff --git a/drivers/dma/dw/Makefile b/drivers/dma/dw/Makefile index a6f358ad8591..8025f75e589c 100644 --- a/drivers/dma/dw/Makefile +++ b/drivers/dma/dw/Makefile @@ -7,5 +7,7 @@ obj-$(CONFIG_DW_DMAC) += dw_dmac.o dw_dmac-y := platform.o dw_dmac-$(CONFIG_OF) += of.o +obj-$(CONFIG_RZN1_DMAMUX) += rzn1-dmamux.o + obj-$(CONFIG_DW_DMAC_PCI) += dw_dmac_pci.o dw_dmac_pci-y := pci.o diff --git a/drivers/dma/dw/rzn1-dmamux.c b/drivers/dma/dw/rzn1-dmamux.c new file mode 100644 index 000000000000..a3313f268275 --- /dev/null +++ b/drivers/dma/dw/rzn1-dmamux.c @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Schneider-Electric + * Author: Miquel Raynal + */ +#include +#include +#include +#include + +#define RZN1_DMAMUX_LINES 64 +#define RZN1_DMAMUX_SPLIT 16 + +struct rzn1_dmamux_data { + struct dma_router dmarouter; + u32 used_chans; + struct mutex lock; +}; + +struct rzn1_dmamux_map { + unsigned int req_idx; +}; + +static void rzn1_dmamux_free(struct device *dev, void *route_data) +{ + struct rzn1_dmamux_data *dmamux = dev_get_drvdata(dev); + struct rzn1_dmamux_map *map = route_data; + + dev_dbg(dev, "Unmapping DMAMUX request %u\n", map->req_idx); + + mutex_lock(&dmamux->lock); + dmamux->used_chans &= ~BIT(map->req_idx); + mutex_unlock(&dmamux->lock); + + kfree(map); +} + +static void *rzn1_dmamux_route_allocate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); + struct rzn1_dmamux_data *dmamux = platform_get_drvdata(pdev); + struct rzn1_dmamux_map *map; + unsigned int dmac_idx, chan, val; + u32 mask; + int ret; + + if (dma_spec->args_count != 6) + return ERR_PTR(-EINVAL); + + map = kzalloc(sizeof(*map), GFP_KERNEL); + if (!map) + return ERR_PTR(-ENOMEM); + + chan = dma_spec->args[0]; + map->req_idx = dma_spec->args[4]; + val = dma_spec->args[5]; + dma_spec->args_count -= 2; + + if (chan >= RZN1_DMAMUX_SPLIT) { + dev_err(&pdev->dev, "Invalid DMA request line: %u\n", chan); + ret = -EINVAL; + goto free_map; + } + + if (map->req_idx >= RZN1_DMAMUX_LINES || + (map->req_idx % RZN1_DMAMUX_SPLIT) != chan) { + dev_err(&pdev->dev, "Invalid MUX request line: %u\n", map->req_idx); + ret = -EINVAL; + goto free_map; + } + + dmac_idx = map->req_idx < RZN1_DMAMUX_SPLIT ? 0 : 1; + dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", dmac_idx); + if (!dma_spec->np) { + dev_err(&pdev->dev, "Can't get DMA master\n"); + ret = -EINVAL; + goto free_map; + } + + dev_dbg(&pdev->dev, "Mapping DMAMUX request %u to DMAC%u request %u\n", + map->req_idx, dmac_idx, chan); + + mask = BIT(map->req_idx); + mutex_lock(&dmamux->lock); + dmamux->used_chans |= mask; + ret = r9a06g032_sysctrl_set_dmamux(mask, val ? mask : 0); + if (ret) + goto release_chan_and_unlock; + + mutex_unlock(&dmamux->lock); + + return map; + +release_chan_and_unlock: + dmamux->used_chans &= ~mask; + mutex_unlock(&dmamux->lock); +free_map: + kfree(map); + + return ERR_PTR(ret); +} + +static const struct of_device_id rzn1_dmac_match[] = { + { .compatible = "renesas,rzn1-dma" }, + {} +}; + +static int rzn1_dmamux_probe(struct platform_device *pdev) +{ + struct device_node *mux_node = pdev->dev.of_node; + const struct of_device_id *match; + struct device_node *dmac_node; + struct rzn1_dmamux_data *dmamux; + + dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL); + if (!dmamux) + return -ENOMEM; + + mutex_init(&dmamux->lock); + + dmac_node = of_parse_phandle(mux_node, "dma-masters", 0); + if (!dmac_node) + return dev_err_probe(&pdev->dev, -ENODEV, "Can't get DMA master node\n"); + + match = of_match_node(rzn1_dmac_match, dmac_node); + of_node_put(dmac_node); + if (!match) + return dev_err_probe(&pdev->dev, -EINVAL, "DMA master is not supported\n"); + + dmamux->dmarouter.dev = &pdev->dev; + dmamux->dmarouter.route_free = rzn1_dmamux_free; + + platform_set_drvdata(pdev, dmamux); + + return of_dma_router_register(mux_node, rzn1_dmamux_route_allocate, + &dmamux->dmarouter); +} + +static const struct of_device_id rzn1_dmamux_match[] = { + { .compatible = "renesas,rzn1-dmamux" }, + {} +}; + +static struct platform_driver rzn1_dmamux_driver = { + .driver = { + .name = "renesas,rzn1-dmamux", + .of_match_table = rzn1_dmamux_match, + }, + .probe = rzn1_dmamux_probe, +}; +module_platform_driver(rzn1_dmamux_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Miquel Raynal X-Patchwork-Id: 12801273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0073BC4707A for ; Tue, 5 Apr 2022 08:32:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235001AbiDEI0e (ORCPT ); Tue, 5 Apr 2022 04:26:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239951AbiDEIV5 (ORCPT ); Tue, 5 Apr 2022 04:21:57 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 83657AE53; Tue, 5 Apr 2022 01:19:28 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id F39D54000A; Tue, 5 Apr 2022 08:19:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649146767; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zAtIbUPsxkJ2Vkxs0B9jhzXSzY5HA+HvzfhgI4EksRw=; b=Ouj1SGQVM0/KLHiCRdO9fJenz5aZCgBtpexeVONQD/1X6Fc5NWkhg1fyRf8aBtpI/ZDCD8 5rqV/3j7Q6aXo069RKYoaEi61exVsqTOa3db01CFBxxm/r6jefyQwSLThWMxaeSELyzhR+ DC5oWgisp3t9h/aESogLM5ogII7aDMLWndQclm24HNVPhLGePH0y8NnEHW0l1gVQgeif25 Mk4/ObDp7xzy/1SoS9DrS25VSe5+SUtR9Pyw+nmUQSFgYbnlW4WfFfjFiSHsIUGn4AthfM n2EHC7ku1MCQHtlsLozj8oDNthwGmivGAFEql1m3wZMd8UDUBx1u9R3faYobFQ== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen Subject: [PATCH v7 6/9] clk: renesas: r9a06g032: Probe possible children Date: Tue, 5 Apr 2022 10:19:08 +0200 Message-Id: <20220405081911.1349563-7-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220405081911.1349563-1-miquel.raynal@bootlin.com> References: <20220405081911.1349563-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The clock controller device on r9a06g032 takes all the memory range that is described as being a system controller. This range contains many different (unrelated?) registers besides the ones belonging to the clock controller, that can necessitate to be accessed from other peripherals. For instance, the dmamux registers are there. The dmamux "device" will be described as a child node of the clock/system controller node, which means we need the top device driver (the clock controller driver in this case) to populate its children manually. Signed-off-by: Miquel Raynal Acked-by: Stephen Boyd --- drivers/clk/renesas/r9a06g032-clocks.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index 052d99059981..1df56d7ab3e1 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -996,7 +997,7 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) sysctrl_priv = clocks; - return 0; + return of_platform_populate(np, NULL, NULL, dev); } static const struct of_device_id r9a06g032_match[] = { From patchwork Tue Apr 5 08:19:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12801268 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D73D2C433FE for ; Tue, 5 Apr 2022 08:32:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234827AbiDEI0W (ORCPT ); Tue, 5 Apr 2022 04:26:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239950AbiDEIV5 (ORCPT ); Tue, 5 Apr 2022 04:21:57 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA8EBB7EF; Tue, 5 Apr 2022 01:19:29 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 21A394000E; Tue, 5 Apr 2022 08:19:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649146768; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GcS1gM79z1ubwsDkiDMnQBqYcbRumBBw75m5IkrMpwU=; b=MX+kgh3tqc13weQIUJ150hgj0t/bDVpfZ4BpuOjcLmPFUO0Pht+zzuOl+7/nnaqj2J2CXM XBI8EtAE29+2QHYjMgAcsnI5M+fa8GuY2fJMh+j1lqeT593F7YZxRnU0nVX6d1hUWnBPsI RpDTvpthDNA0N3lZL72h8ClwUGJL43q/f/Xb930JbWqaUYas/efCevY0nJ8pssLYP34jdN UII7H9W4gM+kqS2+mEflb10E5Y/oum1jhli7ht5l5cq4mIx069KzDvdu+/WJMsu0fEHKms UBzmL3efTkLdgQ0/k+FwM43Sm1igglV0GuoH1Nz4v22BS2+Ntc9+De5uquw8BA== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Geert Uytterhoeven Subject: [PATCH v7 7/9] dmaengine: dw: Add RZN1 compatible Date: Tue, 5 Apr 2022 10:19:09 +0200 Message-Id: <20220405081911.1349563-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220405081911.1349563-1-miquel.raynal@bootlin.com> References: <20220405081911.1349563-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The Renesas RZN1 DMA IP is very close to the original DW DMA IP, a DMA router has been introduced to handle the wiring options that have been added. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Acked-by: Andy Shevchenko --- drivers/dma/dw/platform.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c index 246118955877..47f2292dba98 100644 --- a/drivers/dma/dw/platform.c +++ b/drivers/dma/dw/platform.c @@ -137,6 +137,7 @@ static void dw_shutdown(struct platform_device *pdev) #ifdef CONFIG_OF static const struct of_device_id dw_dma_of_id_table[] = { { .compatible = "snps,dma-spear1340", .data = &dw_dma_chip_pdata }, + { .compatible = "renesas,rzn1-dma", .data = &dw_dma_chip_pdata }, {} }; MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); From patchwork Tue Apr 5 08:19:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12801272 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A8CEC35276 for ; Tue, 5 Apr 2022 08:32:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234992AbiDEI0b (ORCPT ); Tue, 5 Apr 2022 04:26:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239966AbiDEIV5 (ORCPT ); Tue, 5 Apr 2022 04:21:57 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11578BC08; Tue, 5 Apr 2022 01:19:31 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id B080E40017; Tue, 5 Apr 2022 08:19:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649146770; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ge58NimhaKWCxwe0+hrNu+VcWrBPIvnbMynidvFnOMc=; b=dPE3PfMs01VCyq4Y0CQd4j+VT1PQiSnjuMB8mP6pwbdx7aASh7KAlfSzYjl/JTzCBYdM+J UOrwfxJhJwInWzm4KcFDnajkZi4h0XjtNvXIuW3h8yd4212oaoeoI/1EOHL0nc7Hxoh6x4 CQdDbs8Ii1DXWERLYjDghAZpNb5aTkGC6f1VsbRiaH/Z+lKsDSqC+ELCP3rf8fGNB0Cy27 bvelTE18L1IikcBUBGwHoCHqHoe+BQKiDGN1jG5uhuV36XkUqlpajpsaoDy87QtowYBbBq CtS0Y3qhZgrj/u0hmvqkIk2UNHHwgbpq9sp0eDPO5fiiH6DOY9z80S2cxlnq1w== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Geert Uytterhoeven Subject: [PATCH v7 8/9] ARM: dts: r9a06g032: Add the two DMA nodes Date: Tue, 5 Apr 2022 10:19:10 +0200 Message-Id: <20220405081911.1349563-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220405081911.1349563-1-miquel.raynal@bootlin.com> References: <20220405081911.1349563-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Describe the two DMA controllers available on this SoC. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 636a6ab31c58..839580ec21ee 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -200,6 +200,36 @@ nand_controller: nand-controller@40102000 { status = "disabled"; }; + dma0: dma-controller@40104000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40104000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA0>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + + dma1: dma-controller@40105000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40105000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA1>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; From patchwork Tue Apr 5 08:19:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12801269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC8F8C433F5 for ; Tue, 5 Apr 2022 08:32:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234794AbiDEI0U (ORCPT ); Tue, 5 Apr 2022 04:26:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239969AbiDEIV5 (ORCPT ); Tue, 5 Apr 2022 04:21:57 -0400 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1C27F24; Tue, 5 Apr 2022 01:19:33 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id CE8B240012; Tue, 5 Apr 2022 08:19:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649146772; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gDMgEYZK2TXVp0tig+qscRTbrixY++njrNcYKAKseyE=; b=mWfVGsQ1PF77oIzR6uCt5GFIsq0P0ca6jBDsHzyFMJrcwyV0d1/nkzNIQ93c1mH/Oy8x5Z 98q7O2q1m3PzCPYFwYQjmfzE5FQcYZN9212lLKBCv/wC1O6CASUo7WjJvNtwBBzl8o7+gT utAtUroEvwjCnUmzG281jRadSRmEXHujzGVR5798sugFXWyD3gxWIWxrvA6KcTc2J3jwtc axkv3A5E+6T0Q7GhmcrF+mRu0tZyZ8xor4txOuZETPlyg6mxTkQ34FonaTY1Kp+cGAKuDh DtAzfbzyYeW6F+/+dDkwlqhAQ+gVGMcNUsgxKS1gVBOYSELuUcVuUvrMRECtEw== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen Subject: [PATCH v7 9/9] ARM: dts: r9a06g032: Describe the DMA router Date: Tue, 5 Apr 2022 10:19:11 +0200 Message-Id: <20220405081911.1349563-10-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220405081911.1349563-1-miquel.raynal@bootlin.com> References: <20220405081911.1349563-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org There is a dmamux on this SoC which allows picking two different sources for a single DMA request. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 839580ec21ee..c854aa4cfa77 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -91,6 +91,16 @@ sysctrl: system-controller@4000c000 { clocks = <&ext_mclk>, <&ext_rtc_clk>, <&ext_jtag_clk>, <&ext_rgmii_ref>; clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; + #address-cells = <1>; + #size-cells = <1>; + + dmamux: dma-router@a0 { + compatible = "renesas,rzn1-dmamux"; + reg = <0xa0 4>; + #dma-cells = <6>; + dma-requests = <32>; + dma-masters = <&dma0 &dma1>; + }; }; uart0: serial@40060000 {