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Thu, 7 Apr 2022 18:07:41 +0900 (KST) Received: from epsmtrp2.samsung.com (unknown [182.195.40.14]) by epcas2p2.samsung.com (KnoxPortal) with ESMTPA id 20220407090741epcas2p2228c73fbd35465bcf75706a45af17977~jkgo0la_b0784707847epcas2p2E; Thu, 7 Apr 2022 09:07:41 +0000 (GMT) Received: from epsmgms1p2.samsung.com (unknown [182.195.42.42]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20220407090741epsmtrp2e40d4b54080e9632993531e6c36feff5~jkgozuA0y1599615996epsmtrp24; Thu, 7 Apr 2022 09:07:41 +0000 (GMT) X-AuditID: b6c32a46-ba1ff70000009dd5-e6-624ea9dd65ce Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p2.samsung.com (Symantec Messaging Gateway) with SMTP id 88.9D.03370.CD9AE426; Thu, 7 Apr 2022 18:07:40 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220407090740epsmtip17dfb0b5f81472577763c6777b97a46b3~jkgoptNyU0044500445epsmtip1L; Thu, 7 Apr 2022 09:07:40 +0000 (GMT) From: Chanho Park To: Catalin Marinas , Will Deacon , Marc Zyngier , Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, Chanho Park , James Morse Subject: [PATCH] arm64: Add part number for Arm Cortex-A78AE Date: Thu, 7 Apr 2022 18:11:28 +0900 Message-Id: <20220407091128.8700-1-chanho61.park@samsung.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrBKsWRmVeSWpSXmKPExsWy7bCmqe7dlX5JBi/3iFm8X9bDaHF5v7bF /X3LmSw2Pb7GarH0+kUmi51zTrJatNwxdWD3WDNvDaPHplWdbB6bl9R79G1ZxRjAEpVtk5Ga mJJapJCal5yfkpmXbqvkHRzvHG9qZmCoa2hpYa6kkJeYm2qr5OIToOuWmQO0X0mhLDGnFCgU kFhcrKRvZ1OUX1qSqpCRX1xiq5RakJJTYF6gV5yYW1yal66Xl1piZWhgYGQKVJiQnXHv2kzG gkeCFU/v3GdsYLzP38XIySEhYCJxf8F21i5GLg4hgR2MEre/dzFBOJ8YJda+PASV+cwo8afr FjNMy96pn5ghErsYJV7PWMoCkhAS+MgoMb/PGMRmE9CV2PL8FSNIkYjAFEaJm6+2sIIkmAXK JD7NfQY2SVjARuLWxd9gcRYBVYlViy+CxXkFbCVe3F8HtU1eovvfHxaIuKDEyZlPWCDmyEs0 b50NdoWEwCF2iTPbV7B3MXIAOS4SX5eGQ/QKS7w6voUdwpaS+PxuLxuEXSyxdNYnJojeBkaJ y9t+QSWMJWY9a2cEmcMsoCmxfpc+xEhliSO3oNbySXQc/gu1iVeio00IolFd4sD26SwQtqxE 95zPrBC2h8SSuQeYIcETK3HkXyfTBEb5WUiemYXkmVkIexcwMq9iFEstKM5NTy02KjCCR2py fu4mRnAS1HLbwTjl7Qe9Q4xMHIyHGCU4mJVEeKtyfZKEeFMSK6tSi/Lji0pzUosPMZoCg3ci s5Rocj4wDeeVxBuaWBqYmJkZmhuZGpgrifN6pWxIFBJITyxJzU5NLUgtgulj4uCUamCS9/de 8ZUzg236S+d/hruuXilX3dq6YmEB98Xq8gwLlT3qZWZnJwjvKaie6BuVcLadyzkth33Vnqvn fnYUmK0r1/6td+FQ1pu+xnt+vGbaNeJn1vBtjOzauYPjrOr8i7UvQkwOKn78cYP9qoco+5St cYaO65iUj05vXGytvmGjoIb3iT/NDydfDRA6srz4grHv7Uv6gYfeqXB5fF+tFBhTNuX5j1uM AnpX05522iu6f90oV73rK/fyjDvrV5c7qc/3+T91QX764v5dyldfHzWST84PUmTJ73JgjPGN +jjPn+PfsU7W7VM/hl39zJjp98xB7Jmlq9aJxLRo9Uy2gtsC7tKNV3mN3LNCxEyLtZVYijMS DbWYi4oTAZ/kE+cLBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrBLMWRmVeSWpSXmKPExsWy7bCSnO6dlX5JBi/v21i8X9bDaHF5v7bF /X3LmSw2Pb7GarH0+kUmi51zTrJatNwxdWD3WDNvDaPHplWdbB6bl9R79G1ZxRjAEsVlk5Ka k1mWWqRvl8CVce/aTMaCR4IVT+/cZ2xgvM/fxcjJISFgIrF36idmEFtIYAejxK75ahBxWYln 73awQ9jCEvdbjrB2MXIB1bxnlLj0+zlYgk1AV2LL81eMIAkRgWmMEjuP/wKbxCxQIXHx8k4w W1jARuLWxd+sIDaLgKrEqsUXweK8ArYSL+6vY4bYIC/R/e8PC0RcUOLkzCcsEHPkJZq3zmae wMg3C0lqFpLUAkamVYySqQXFuem5xYYFRnmp5XrFibnFpXnpesn5uZsYwYGppbWDcc+qD3qH GJk4GA8xSnAwK4nwVuX6JAnxpiRWVqUW5ccXleakFh9ilOZgURLnvdB1Ml5IID2xJDU7NbUg tQgmy8TBKdXAtHHaiY7LUh+ic9RmCHz06Hzy8UCHZvpFdcPcNMNZPGeEnT8cUd9ocLF/u0lI WPSZiAdOa99O95LdL3LzyBvWk+n6XtZrp3xYEnFWfNNXNetkpTvPTD7fSvt64RkTf03qre95 XEH9/6b9WfBhu8r5xcdsXuj7Mngo2eye7B405+5NN+5tjAH9H71ksy1Wpj8qPV8ToplxsN3L dyeTQee6mFfvi9uCAn72f5vpk7Ly1poV9xXbbkyfaOagc23Htq15hiuORgnu0T32X3/BacOH ByI3Gi4Kdv5edfR8dmSo+/amkH6vGS9aRXyWzRc8c0u2OPVLUWG8+rpN/tOWpkcufcf9pqz7 qFhQSHPW/M19JUosxRmJhlrMRcWJAJga1h27AgAA X-CMS-MailID: 20220407090741epcas2p2228c73fbd35465bcf75706a45af17977 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220407090741epcas2p2228c73fbd35465bcf75706a45af17977 References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220407_020759_397015_E73FCCA0 X-CRM114-Status: GOOD ( 17.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the MIDR part number info for the Arm Cortex-A78AE[1] and add it to spectre-BHB affected list[2]. [1]: https://developer.arm.com/Processors/Cortex-A78AE [2]: https://developer.arm.com/Arm%20Security%20Center/Spectre-BHB Cc: Catalin Marinas Cc: Mark Rutland Cc: Will Deacon Cc: James Morse Signed-off-by: Chanho Park --- arch/arm64/include/asm/cputype.h | 2 ++ arch/arm64/kernel/proton-pack.c | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 232b439cbaf3..ff8f4511df71 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -75,6 +75,7 @@ #define ARM_CPU_PART_CORTEX_A77 0xD0D #define ARM_CPU_PART_NEOVERSE_V1 0xD40 #define ARM_CPU_PART_CORTEX_A78 0xD41 +#define ARM_CPU_PART_CORTEX_A78AE 0xD42 #define ARM_CPU_PART_CORTEX_X1 0xD44 #define ARM_CPU_PART_CORTEX_A510 0xD46 #define ARM_CPU_PART_CORTEX_A710 0xD47 @@ -130,6 +131,7 @@ #define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77) #define MIDR_NEOVERSE_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1) #define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78) +#define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE) #define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1) #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510) #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c index 5777929d35bf..40be3a7c2c53 100644 --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -853,6 +853,7 @@ u8 spectre_bhb_loop_affected(int scope) if (scope == SCOPE_LOCAL_CPU) { static const struct midr_range spectre_bhb_k32_list[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A78), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE), MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C), MIDR_ALL_VERSIONS(MIDR_CORTEX_X1), MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),