From patchwork Thu Apr 14 07:40:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12813050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5753AC4321E for ; Thu, 14 Apr 2022 07:40:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240470AbiDNHnG (ORCPT ); Thu, 14 Apr 2022 03:43:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240553AbiDNHmv (ORCPT ); Thu, 14 Apr 2022 03:42:51 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1277940931; Thu, 14 Apr 2022 00:40:26 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id E6CC01C0015; Thu, 14 Apr 2022 07:40:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649922025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WLMGN8W4KzuVPgqbnvRFLH6IcEpJsrhI1QCKS4t1hsA=; b=EmAxXWkw4b+7SoVMA9NWRxnSwWeu8qw/PIJHX0OZ/TNgQHMimmtL2oZ1i0BcgJvhconYaB bP/jD8JqfjWZTYq3rfZtEbd24xiekZ6NjVW9XvvJCdCTa4SXn+yJW/YikZejDibVM2tag7 A2bH/YdXxW5VQH9BNA1ytZ7r7ToUoMFTjHc9LEaj3aMjGx6IljT7LKoPdHgFSzDUwajti0 hf5TP4nqWzAGEXCsKfZZxMR6mBWavlnle454weujPXKlubPCCRSR9SoonQMKUbYNNpPq1Y xKKZdU1MgDA3RfqEj+WbIgVkL7g726Qn3//M8LyyfiBf5dQ17TQLdV8TT2QXAg== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v2 1/8] PCI: rcar-gen2: Add support for clocks Date: Thu, 14 Apr 2022 09:40:04 +0200 Message-Id: <20220414074011.500533-2-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220414074011.500533-1-herve.codina@bootlin.com> References: <20220414074011.500533-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The PCI rcar-gen2 does not call any clk_prepare_enable(). This lead to an access failure when the driver tries to access the IP (at least on a RZ/N1D platform). Prepare and enable clocks using the bulk version of clk_prepare_enable() in order to prepare and enable all clocks attached to this device. Signed-off-by: Herve Codina --- drivers/pci/controller/pci-rcar-gen2.c | 28 ++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pci-rcar-gen2.c b/drivers/pci/controller/pci-rcar-gen2.c index 35804ea394fd..528bc3780e01 100644 --- a/drivers/pci/controller/pci-rcar-gen2.c +++ b/drivers/pci/controller/pci-rcar-gen2.c @@ -8,6 +8,7 @@ * Author: Valentine Barshak */ +#include #include #include #include @@ -99,6 +100,8 @@ struct rcar_pci { struct resource mem_res; struct resource *cfg_res; int irq; + struct clk_bulk_data *clocks; + int nclocks; }; /* PCI configuration space operations */ @@ -282,6 +285,7 @@ static int rcar_pci_probe(struct platform_device *pdev) struct rcar_pci *priv; struct pci_host_bridge *bridge; void __iomem *reg; + int ret; bridge = devm_pci_alloc_host_bridge(dev, sizeof(*priv)); if (!bridge) @@ -305,13 +309,25 @@ static int rcar_pci_probe(struct platform_device *pdev) priv->mem_res = *mem_res; priv->cfg_res = cfg_res; + ret = devm_clk_bulk_get_all(dev, &priv->clocks); + if (ret < 0) { + dev_err(dev, "failed to get clocks %d\n", ret); + return ret; + } + priv->nclocks = ret; + + ret = clk_bulk_prepare_enable(priv->nclocks, priv->clocks); + if (ret) + return ret; + priv->irq = platform_get_irq(pdev, 0); priv->reg = reg; priv->dev = dev; if (priv->irq < 0) { dev_err(dev, "no valid irq found\n"); - return priv->irq; + ret = priv->irq; + goto disable_clocks; } bridge->ops = &rcar_pci_ops; @@ -320,7 +336,15 @@ static int rcar_pci_probe(struct platform_device *pdev) rcar_pci_setup(priv); - return pci_host_probe(bridge); + ret = pci_host_probe(bridge); + if (ret < 0) + goto disable_clocks; + + return 0; + +disable_clocks: + clk_bulk_disable_unprepare(priv->nclocks, priv->clocks); + return ret; } static const struct of_device_id rcar_pci_of_match[] = { From patchwork Thu Apr 14 07:40:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12813045 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F233FC4321E for ; Thu, 14 Apr 2022 07:40:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240453AbiDNHnG (ORCPT ); Thu, 14 Apr 2022 03:43:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240565AbiDNHm4 (ORCPT ); Thu, 14 Apr 2022 03:42:56 -0400 X-Greylist: delayed 60628 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Thu, 14 Apr 2022 00:40:30 PDT Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::225]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C2FA205E0; Thu, 14 Apr 2022 00:40:30 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 4C6B11C000C; Thu, 14 Apr 2022 07:40:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649922028; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KpP/TPJTS/Tw3Is4LaKbVk6P4gaYcP8jdzfO53AdYrs=; b=gtV6hgUImYfh5f8poJ2gmpgzlwiivmqJK/crblAp8Jyp3fDsplIKfuYIQYka0upek6AFKe xj2C5jx+Srbgh+W26+aMrooE7wj5YJop1EJQXfZIAkCIc2V7w5i/FKEIKocUFLB0WkZzN4 /1fjjDtHOShZ82Isl7Zmsmi0S6l3i8IX2+kxq4kbJVi/LYaE7Kyc3eSbHlQiTbY3Zb3NBC g4uMd2h0BmyVh7rOYm99rJDvS4NMezWj54hucYGvk+BdRkf38lN6unhFdtgaY1nFngqAQ5 paGhLJnOkUE0Kqq6WQ67g5Aw54WBP5IgeMblIAN9G1VKnTs02fNvBXvuSiGMSQ== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v2 2/8] dt-bindings: PCI: renesas-pci-usb: Convert bindings to json-schema Date: Thu, 14 Apr 2022 09:40:05 +0200 Message-Id: <20220414074011.500533-3-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220414074011.500533-1-herve.codina@bootlin.com> References: <20220414074011.500533-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Convert Renesas PCI bridge bindings documentation to json-schema. Also name it 'renesas,pci-usb' as it is specifically used to connect the PCI USB controllers to AHB bus. Signed-off-by: Herve Codina --- .../devicetree/bindings/pci/pci-rcar-gen2.txt | 84 ----------- .../bindings/pci/renesas,pci-usb.yaml | 134 ++++++++++++++++++ 2 files changed, 134 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt create mode 100644 Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt deleted file mode 100644 index aeba38f0a387..000000000000 --- a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt +++ /dev/null @@ -1,84 +0,0 @@ -Renesas AHB to PCI bridge -------------------------- - -This is the bridge used internally to connect the USB controllers to the -AHB. There is one bridge instance per USB port connected to the internal -OHCI and EHCI controllers. - -Required properties: -- compatible: "renesas,pci-r8a7742" for the R8A7742 SoC; - "renesas,pci-r8a7743" for the R8A7743 SoC; - "renesas,pci-r8a7744" for the R8A7744 SoC; - "renesas,pci-r8a7745" for the R8A7745 SoC; - "renesas,pci-r8a7790" for the R8A7790 SoC; - "renesas,pci-r8a7791" for the R8A7791 SoC; - "renesas,pci-r8a7793" for the R8A7793 SoC; - "renesas,pci-r8a7794" for the R8A7794 SoC; - "renesas,pci-rcar-gen2" for a generic R-Car Gen2 or - RZ/G1 compatible device. - - - When compatible with the generic version, nodes must list the - SoC-specific version corresponding to the platform first - followed by the generic version. - -- reg: A list of physical regions to access the device: the first is - the operational registers for the OHCI/EHCI controllers and the - second is for the bridge configuration and control registers. -- interrupts: interrupt for the device. -- clocks: The reference to the device clock. -- bus-range: The PCI bus number range; as this is a single bus, the range - should be specified as the same value twice. -- #address-cells: must be 3. -- #size-cells: must be 2. -- #interrupt-cells: must be 1. -- interrupt-map: standard property used to define the mapping of the PCI - interrupts to the GIC interrupts. -- interrupt-map-mask: standard property that helps to define the interrupt - mapping. - -Optional properties: -- dma-ranges: a single range for the inbound memory region. If not supplied, - defaults to 1GiB at 0x40000000. Note there are hardware restrictions on the - allowed combinations of address and size. - -Example SoC configuration: - - pci0: pci@ee090000 { - compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; - clocks = <&mstp7_clks R8A7790_CLK_EHCI>; - reg = <0x0 0xee090000 0x0 0xc00>, - <0x0 0xee080000 0x0 0x1100>; - interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - - bus-range = <0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; - interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; - - usb@1,0 { - reg = <0x800 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - - usb@2,0 { - reg = <0x1000 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - }; - -Example board setup: - -&pci0 { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; -}; diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml new file mode 100644 index 000000000000..3f8d79b746c7 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/renesas,pci-usb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas AHB to PCI bridge + +maintainers: + - Marek Vasut + - Yoshihiro Shimoda + +description: | + This is the bridge used internally to connect the USB controllers to the + AHB. There is one bridge instance per USB port connected to the internal + OHCI and EHCI controllers. + +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,pci-r8a7742 # RZ/G1H + - renesas,pci-r8a7743 # RZ/G1M + - renesas,pci-r8a7744 # RZ/G1N + - renesas,pci-r8a7745 # RZ/G1E + - renesas,pci-r8a7790 # R-Car H2 + - renesas,pci-r8a7791 # R-Car M2-W + - renesas,pci-r8a7793 # R-Car M2-N + - renesas,pci-r8a7794 # R-Car E2 + - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1 + + reg: + description: | + A list of physical regions to access the device. The first is + the operational registers for the OHCI/EHCI controllers and the + second is for the bridge configuration and control registers. + minItems: 2 + maxItems: 2 + + interrupts: + description: Interrupt for the device. + + interrupt-map: + description: | + Standard property used to define the mapping of the PCI interrupts + to the GIC interrupts. + + interrupt-map-mask: + description: + Standard property that helps to define the interrupt mapping. + + clocks: + description: The reference to the device clock. + + bus-range: + description: | + The PCI bus number range; as this is a single bus, the range + should be specified as the same value twice. + + "#address-cells": + const: 3 + + "#size-cells": + const: 2 + + "#interrupt-cells": + const: 1 + + dma-ranges: + description: | + A single range for the inbound memory region. If not supplied, + defaults to 1GiB at 0x40000000. Note there are hardware restrictions on + the allowed combinations of address and size. + +required: + - compatible + - reg + - interrupts + - interrupt-map + - interrupt-map-mask + - clocks + - bus-range + - "#address-cells" + - "#size-cells" + - "#interrupt-cells" + +unevaluatedProperties: false + +examples: + - | + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + pci0: pci@ee090000 { + compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; + device_type = "pci"; + clocks = <&cpg CPG_MOD 703>; + reg = <0 0xee090000 0 0xc00>, + <0 0xee080000 0 0x1100>; + interrupts = ; + status = "disabled"; + + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + + usb@1,0 { + reg = <0x800 0 0 0 0>; + phys = <&usb0 0>; + phy-names = "usb"; + }; + + usb@2,0 { + reg = <0x1000 0 0 0 0>; + phys = <&usb0 0>; + phy-names = "usb"; + }; + }; + }; From patchwork Thu Apr 14 07:40:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12813047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 849A9C433FE for ; Thu, 14 Apr 2022 07:40:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240528AbiDNHnI (ORCPT ); Thu, 14 Apr 2022 03:43:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240570AbiDNHm6 (ORCPT ); Thu, 14 Apr 2022 03:42:58 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 576B540931; Thu, 14 Apr 2022 00:40:33 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 8E5581C0014; Thu, 14 Apr 2022 07:40:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649922031; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jS+PmEe67ZVUOMWY42bQ+yym/wpbxNw3llVW9z5Zvxw=; b=KVnXTTE22AbVbwbeB0FbqQg3/x3nd6RBedmXmH9vAqrks3IFm+BAC4f9AxuD0ashSUP7EY M9eYJM0mtTIlPG/wYH4lvt+5vUPnl0e7Stmzbe74qF34+Jk4y5VgxtKW/AiuMQU9hzTKV0 nnzrDpbcx4dcVp4gqFuPcqV8OfHfM5dtRZzNTCgYyUjes7OsWdzeHlTzmEeCFCvwwryrJS FAdQhdXlrvTEIPF2+e+n0do5Aw4ea8spZJXRkwPMpMkwu4tRyRCKml2gZbdu2Cjd8a1Ho2 96uEu4xqD1h6A9U6F4Swd5+cc59A+1W6NkO0SK25d7rD5Pzo1Z1NOi60qyDcgg== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v2 3/8] dt-bindings: PCI: renesas-pci-usb: Allow multiple clocks Date: Thu, 14 Apr 2022 09:40:06 +0200 Message-Id: <20220414074011.500533-4-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220414074011.500533-1-herve.codina@bootlin.com> References: <20220414074011.500533-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Define that multiple clocks can be present at clocks property. Signed-off-by: Herve Codina --- Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml index 3f8d79b746c7..5b85be751b88 100644 --- a/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml +++ b/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml @@ -54,7 +54,8 @@ properties: Standard property that helps to define the interrupt mapping. clocks: - description: The reference to the device clock. + description: + The references to the device clocks (several clocks can be referenced). bus-range: description: | From patchwork Thu Apr 14 07:40:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12813048 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CB6CC4332F for ; Thu, 14 Apr 2022 07:40:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240517AbiDNHnH (ORCPT ); Thu, 14 Apr 2022 03:43:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240594AbiDNHnE (ORCPT ); Thu, 14 Apr 2022 03:43:04 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::225]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4BCB140931; Thu, 14 Apr 2022 00:40:40 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id A195C1C0003; Thu, 14 Apr 2022 07:40:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649922038; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cxV60ButKA2NawyTYXLzIPMVoZv4uWDKTUkJc1VuWn0=; b=WowDZhZsCK4EMdPcaf42nqjkdPsgclAhZBLd+QF55X+6o/hkYzymPVSDthfkMij6hgG8Tn y5f8zurmSoYQulR1XQ+Nndj06LgPleNho6SVYb9RGM3mY2ExtrjfhEx2vbdF1sIer8bsVH RC0g4gWKk+nnjpjprN370thW/0Wsdpo8R5dYZM339PVxymRqHuwV7cFfOlpxBwE023JAbM MbjwSCcTIf2FbcA5SLa72J4d+F3F0wu9Vjxjw54K8Y47X6uAaqvF7UbIqNYeu5dJQ1u5ov pGzY/AxjvBIjc+/ol89mhWcont10BKRzx4YV+ipkh1O6EAbSJrHH8qGedI4tUQ== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v2 4/8] dt-bindings: PCI: renesas-pci-usb: Add device tree support for r9a06g032 Date: Thu, 14 Apr 2022 09:40:07 +0200 Message-Id: <20220414074011.500533-5-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220414074011.500533-1-herve.codina@bootlin.com> References: <20220414074011.500533-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add internal PCI bridge support for the r9a06g032 SoC. The Renesas RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one present in the R-Car Gen2 family. Signed-off-by: Herve Codina --- Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml index 5b85be751b88..5637f5d7cf05 100644 --- a/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml +++ b/Documentation/devicetree/bindings/pci/renesas,pci-usb.yaml @@ -32,6 +32,10 @@ properties: - renesas,pci-r8a7793 # R-Car M2-N - renesas,pci-r8a7794 # R-Car E2 - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1 + - items: + - enum: + - renesas,pci-r9a06g032 # RZ/N1D + - const: renesas,pci-rzn1 # RZ/N1 reg: description: | From patchwork Thu Apr 14 07:40:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12813049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7162EC433EF for ; Thu, 14 Apr 2022 07:40:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240556AbiDNHnR (ORCPT ); Thu, 14 Apr 2022 03:43:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240595AbiDNHnJ (ORCPT ); Thu, 14 Apr 2022 03:43:09 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00CFD53B5E; Thu, 14 Apr 2022 00:40:44 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id F34A11C000C; Thu, 14 Apr 2022 07:40:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649922043; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=t9Y3nUWyGqzo/x4OaK0UMD7gckY0DOyVPjDybhf/czQ=; b=UvlTxMpR4wC7pbQaSP01ZZ3PoQWndajje7G+qxZwmnKH7rNYQDCmLbEyw9AtPkFWrZ0kIS 9M7g4VBdy5GB0r1dWY/luIi8GWOXdZIaJonzPaRDyheHhks82Q6P+dBbmTaGAdnenrQDa4 ql1hVMjAPxUvbK7XHjb9wyvKQq3HOfmwY81eNKAYWMAg20/fKuWXcqalO8RoMT5qowZDqP LQ/Ino/3MXt7Xfs5l10WnHfosawGba4y78vcc/JslfPxzSysWeh3MjX/TiNfbevmr3g+qA BWUcfleeXUceovXEs4FKbk1QZAS2MaXlRVZTSKXsHJjyRVNG4r/SMBGvlz5isA== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v2 5/8] PCI: rcar-gen2: Add R9A06G032 support Date: Thu, 14 Apr 2022 09:40:08 +0200 Message-Id: <20220414074011.500533-6-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220414074011.500533-1-herve.codina@bootlin.com> References: <20220414074011.500533-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add Renesas R9A06G032 SoC support to the Renesas R-Car gen2 PCI bridge driver. The Renesas RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one available in the R-Car Gen2 family. Signed-off-by: Herve Codina --- drivers/pci/controller/pci-rcar-gen2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/pci-rcar-gen2.c b/drivers/pci/controller/pci-rcar-gen2.c index 528bc3780e01..c190d1a030e4 100644 --- a/drivers/pci/controller/pci-rcar-gen2.c +++ b/drivers/pci/controller/pci-rcar-gen2.c @@ -352,6 +352,7 @@ static const struct of_device_id rcar_pci_of_match[] = { { .compatible = "renesas,pci-r8a7791", }, { .compatible = "renesas,pci-r8a7794", }, { .compatible = "renesas,pci-rcar-gen2", }, + { .compatible = "renesas,pci-rzn1", }, { }, }; From patchwork Thu Apr 14 07:40:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12813051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E5EFC433EF for ; Thu, 14 Apr 2022 07:41:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240616AbiDNHn1 (ORCPT ); Thu, 14 Apr 2022 03:43:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59658 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240607AbiDNHnO (ORCPT ); Thu, 14 Apr 2022 03:43:14 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::225]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B3505714A; Thu, 14 Apr 2022 00:40:49 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 7BA071C0006; Thu, 14 Apr 2022 07:40:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649922048; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XdDCShbbxhQ2SA9jviWD/+YRBhMlJkyJIZxBflXfYR0=; b=FLdKrGqHEkSb6QGT+rXqIUJJoDIxHeweM6Q/pByus+MXYtcHDIFqg2mjp9uUNQ93dPDVrR p0a1oF7qbtBRrqe3cbL6nFJyKRfJ9ayNy8geU4yuJ+6VumDc74uLGnUa84yRpIPYDn4vke SZGq+UOGZejnWpPW79zckaU9n5puyeuC4j2f11WITwC6W3bIADkaBtIWrfb7gWB4+LC+dk ZIbw7+UeSFDL9LSCFXZG7SC2lmDb8DWOgMbG4aGCb+9ALWHy2eVRqhBLB6ZzFqOBOD0h/r v+FP+aKD778FEfMD3vc+4J2LGBC0pxvk8uIa3O2RNOD/BDQEUwi4PWKWR+CoAg== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v2 6/8] ARM: dts: r9a06g032: Add internal PCI bridge node Date: Thu, 14 Apr 2022 09:40:09 +0200 Message-Id: <20220414074011.500533-7-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220414074011.500533-1-herve.codina@bootlin.com> References: <20220414074011.500533-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add the device node for the r9a06g032 internal PCI bridge device. Signed-off-by: Herve Codina --- arch/arm/boot/dts/r9a06g032.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 636a6ab31c58..848dc034bb8c 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -211,6 +211,34 @@ gic: interrupt-controller@44101000 { interrupts = ; }; + + pci_usb: pci@40030000 { + compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1"; + device_type = "pci"; + clocks = <&sysctrl R9A06G032_HCLK_USBH>, + <&sysctrl R9A06G032_HCLK_USBPM>, + <&sysctrl R9A06G032_CLK_PCI_USB>; + clock-names = "hclk_usbh", "hclk_usbpm", "clk_pci_usb"; + reg = <0x40030000 0xc00>, + <0x40020000 0x1100>; + interrupts = ; + status = "disabled"; + + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0x40020000 0x40020000 0 0x00010000>; + /* Should map all possible DDR as inbound ranges, but + * the IP only supports a 256MB, 512MB, or 1GB window. + * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit) + */ + dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + }; }; timer { From patchwork Thu Apr 14 07:40:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12813052 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B3BEC433EF for ; Thu, 14 Apr 2022 07:41:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240475AbiDNHno (ORCPT ); Thu, 14 Apr 2022 03:43:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240583AbiDNHn1 (ORCPT ); Thu, 14 Apr 2022 03:43:27 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5194574A3; Thu, 14 Apr 2022 00:40:52 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 189691C0003; Thu, 14 Apr 2022 07:40:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649922051; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=D2BQKvNyZ33nau+fftw0POjsihzzhef8XQQOkn595Eg=; b=mt/+PXPZvJRa4s5bXoaVG+GoU2f6W/grz/thi3Ul1QNMQ80r9a/fP0BhTFFpn/QK3C1TI1 rbhU9IGASO8Bo75DIRUK9Ti0slWL8xFLnkP5QFv2VuTPfzteNz1Sl4x5TZuNfW3dXJSqfn UKJr8jFnnezInI3vl05nQUyIY/LhssO6c2HbxSEMnzhD9EWeakUej+N09xyZ6z2hDbhx1h aPHeMlFlG4UBky8tDhPwafrWuahp2onijMJXPjajZf9yBJ9k+kTuaOMJPRu4HbZFP9Qmpm 1ZNUp3IioHBNIs6Ns6uu8cmJu5ZSCwe8vlBCmp/e37jnqa6SbTGe+S+6nduHHg== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v2 7/8] ARM: dts: r9a06g032: Add USB PHY DT support Date: Thu, 14 Apr 2022 09:40:10 +0200 Message-Id: <20220414074011.500533-8-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220414074011.500533-1-herve.codina@bootlin.com> References: <20220414074011.500533-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Define the r9a06g032 generic part of the USB PHY device node. Signed-off-by: Herve Codina --- arch/arm/boot/dts/r9a06g032.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 848dc034bb8c..2f7236e3eff0 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -59,6 +59,12 @@ ext_rtc_clk: extrtcclk { clock-frequency = <0>; }; + usbphy: usbphy { + #phy-cells = <0>; + compatible = "usb-nop-xceiv"; + status = "disabled"; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; From patchwork Thu Apr 14 07:40:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12813053 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E371C433EF for ; Thu, 14 Apr 2022 07:41:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229590AbiDNHnu (ORCPT ); Thu, 14 Apr 2022 03:43:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240643AbiDNHnh (ORCPT ); Thu, 14 Apr 2022 03:43:37 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::225]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8DA3E58801; Thu, 14 Apr 2022 00:40:55 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 4A0761C0002; Thu, 14 Apr 2022 07:40:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649922054; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/HaP1IPsXOMTJDxi/2nGbwDNVZapKrfnOpUYaIlabXs=; b=pjtI2EnteulEn6PvCuscIMvp9IYAnzULmnwWB8Vowxa/qBhOBdzVK9ESvlaPL591E5pt6E CvTZtvvydWziOy1NJ+tglOi1WSPn6EAxPsDU+9Q4y50WiLGJ8TUXLNvrqq6G/WIiUmnJNQ w9PuvMr3a0qxVc/dNrQLfPtx7blx1b/aJUWt2cTlEsm84s16UwCTrTWgjMMLwJLlUnf3Ya qgGiM1SdpXjHut+h7uUT+vgCEV6hBOQEE6ihrtrQvq9R6gN1qlGR40BszSzZRE6MUSHAJw 8w+/98NSV3UP4SMB93joDnMzdQV4IBLbylvBbfTNgoOYLYtAsRutUjLzYqnoRg== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v2 8/8] ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY Date: Thu, 14 Apr 2022 09:40:11 +0200 Message-Id: <20220414074011.500533-9-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220414074011.500533-1-herve.codina@bootlin.com> References: <20220414074011.500533-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Describe the PCI USB devices that are behind the PCI bridge, adding necessary links to the USB PHY device. Signed-off-by: Herve Codina --- arch/arm/boot/dts/r9a06g032.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 2f7236e3eff0..f0007b0447ca 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -244,6 +244,18 @@ pci_usb: pci@40030000 { interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + + usb@1,0 { + reg = <0x800 0 0 0 0>; + phys = <&usbphy 0>; + phy-names = "usb"; + }; + + usb@2,0 { + reg = <0x1000 0 0 0 0>; + phys = <&usbphy 0>; + phy-names = "usb"; + }; }; };