From patchwork Sat Apr 16 09:01:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815731 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D257C433EF for ; Sat, 16 Apr 2022 09:03:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1KRVmQ+OukbFy/yQeiUrgMq0iqOEPX8JJP2GEq5+oOk=; b=wwmEJGtbr1IcQI GSKdMkK1y3qy5SbNXtXcZ0+4+5vqF1PFQ0Y3+R1F856OGtFtwWn20NwBSm0AxXen8rTtWAJCDAoqB E4Q6B6whtrICbZQNvQMp2Ing4IUQ+QFFm+akDOSm17oCvv86dN1enRAk2M3JswewkKa30uhYAB0tL 5w92vyzI9PqzN0r73r53OGZJfuxiquPmICWakF98IudqKRPo01gy1AiIl2zm+VUZh7Gg+gXAtPYIT Z4O12keVu/8Y+dpjtEbxcBZZ88nIXuQBZSzNDg879tW6EmkfWkFO/KnuhbYGkBDTPr/h1e6SRMEVb 1hu9dZeYGR8c3d/MyfeQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeJu-00CYQ7-Sz; Sat, 16 Apr 2022 09:02:19 +0000 Received: from mail-qv1-xf34.google.com ([2607:f8b0:4864:20::f34]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeJh-00CYK6-Op; Sat, 16 Apr 2022 09:02:07 +0000 Received: by mail-qv1-xf34.google.com with SMTP id kl29so7847078qvb.2; Sat, 16 Apr 2022 02:02:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OHIHH7LBjO7n3w0TkyTvZ+CHhZPHMYRUZ96K/VbT0E0=; b=iEN3ZCVaS/t/rWCo/X/zbmS+TjDfAMD6Cpvna9HLhP+x6o6ZYla5+H0GhKvSS5rkNP 8ikamagqu15rha3O9npox2er4Nlo0Hn7ck8poWqBP/q72eCOKEY/dfZt4n41DYaOXrMp EDwEY8QW0e7FKJ8/isjurvCHIKVg+t8SYaanJRsQ2GTh/Xk7Tk9iTdHIqZ2hnCIihenU q+gEjJfKEWbPvQw1Pk47xBBn46/Sof/bvznKDvCqWTND5RbtxfUHpVMZ9XA0YrWq9JBj OR9G+IgS/PA/CTIH4SeRb1oG9054zyGVN9LGAXNtVnduvG9YGfhtywCIy+He6L9mMd9g mbvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OHIHH7LBjO7n3w0TkyTvZ+CHhZPHMYRUZ96K/VbT0E0=; b=Ns0woLA+vCNLrxjYBzdxSo+80AHZX8wSPGh3jNpsHNfhOoBQy+3qQwydvxkyZL9YE4 ahv3ZpIzEaBcarmuND/1IWZb5zg3d3E4aRE0WAR+3aXtq9UXSlrH1V3Ee2VAP7fUmRo7 c5KZ9xLE37x2jBKUuukDCPNnlDlkmV6n+VutidfvtVo0qtDkTv9ultJBvYr/W6miPaQ/ bJKEGIYtOfAHWM6AfJy07T4c0b/XNUoGyHOtmj1MMZ6Lgt2oduDblMm9BCuv+LTx7Kkm tsBljA0MtCpjwC3tutq+uWvr6XN+m9b1oj6aGdWbcBB6ALiSn9lt739HsvEZm+99xwqi mNTQ== X-Gm-Message-State: AOAM530wXcmHyaagKiWUFsbZEhWGylTt+gmEaBygsfM+XOWhssg0/XUM r+xcNcKC15QTWP0sa9TOp1A= X-Google-Smtp-Source: ABdhPJwpTvo4039/1P9AMC+MpCNIKVZR96KS8e9MCcSnpiwoRZMepeQPw0q+y1JNs/94Sh5JjUSMwQ== X-Received: by 2002:a05:6214:e4a:b0:444:28a7:9fb7 with SMTP id o10-20020a0562140e4a00b0044428a79fb7mr1733610qvc.30.1650099724058; Sat, 16 Apr 2022 02:02:04 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id o6-20020a05622a044600b002e1b9be8e6fsm4258085qtx.36.2022.04.16.02.02.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 02:02:03 -0700 (PDT) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, Michael Riesch , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sascha Hauer Subject: [PATCH v4 1/4] arm64: dts: rockchip: add usb3 support to rk3568-evb1-v10 Date: Sat, 16 Apr 2022 05:01:56 -0400 Message-Id: <20220416090159.596930-2-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416090159.596930-1-pgwipeout@gmail.com> References: <20220416090159.596930-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_020205_844989_74BE9C5B X-CRM114-Status: GOOD ( 11.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Michael Riesch The Rockchip RK3568 EVB1 features one USB 3.0 device-only (USB 2.0 OTG) port and one USB 3.0 host-only port. Activate the USB 3.0 controller nodes and phy nodes in the device tree. Signed-off-by: Sascha Hauer Signed-off-by: Michael Riesch --- .../boot/dts/rockchip/rk3568-evb1-v10.dts | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts index a794a0ea5c70..622be8be9813 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts @@ -103,6 +103,18 @@ vcc5v0_usb_host: vcc5v0-usb-host { vin-supply = <&vcc5v0_usb>; }; + vcc5v0_usb_otg: vcc5v0-usb-otg { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_otg_en>; + regulator-name = "vcc5v0_usb_otg"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + vcc3v3_lcd0_n: vcc3v3-lcd0-n { compatible = "regulator-fixed"; regulator-name = "vcc3v3_lcd0_n"; @@ -136,6 +148,14 @@ regulator-state-mem { }; }; +&combphy0 { + status = "okay"; +}; + +&combphy1 { + status = "okay"; +}; + &cpu0 { cpu-supply = <&vdd_cpu>; }; @@ -507,6 +527,9 @@ usb { vcc5v0_usb_host_en: vcc5v0_usb_host_en { rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; }; + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; }; }; @@ -568,6 +591,11 @@ &usb_host0_ohci { status = "okay"; }; +&usb_host0_xhci { + extcon = <&usb2phy0>; + status = "okay"; +}; + &usb_host1_ehci { status = "okay"; }; @@ -576,6 +604,24 @@ &usb_host1_ohci { status = "okay"; }; +&usb_host1_xhci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&usb2phy0_otg { + vbus-supply = <&vcc5v0_usb_otg>; + status = "okay"; +}; + &usb2phy1 { status = "okay"; }; From patchwork Sat Apr 16 09:01:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815732 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 224E3C433F5 for ; Sat, 16 Apr 2022 09:03:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SIvLbz3iXAKaor+aFjLtfcswQxkVVAXV/CF4qeuWMz0=; b=VFHtJi3sSbBfOZ qeVnVxGIiPEvcRVODkI0WlVJLVlCPeWi2LFfC1XTh86fuFiJvDqNDWcna3m4g6CD1f1fKr0gxWXDN oQ6K/62/A3fpXCCF94qxrCKX5DXk5FIrgjTsNxzm/9Zn7lt+3QwDBW+5JkhUTfoCBS3V17NjeEdkb REGgc9YfzjqdQd/c7l8vTXyYqdzJ+0fJXYxrZPC4/PBpI/0k/r99xKwrRpiYmF/YRNCLN76KqjQXi aOXl5v/4PaNLF5qJxweRJEAwZTbB6lk94qr9L5T60CFq7iTvLtn1ZyMEfqoGKIWWOwypa1udetEcl 7A+vheZHuLXVc8lf9c/w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeK5-00CYVj-JA; Sat, 16 Apr 2022 09:02:29 +0000 Received: from mail-qv1-xf35.google.com ([2607:f8b0:4864:20::f35]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeJi-00CYKM-I1; Sat, 16 Apr 2022 09:02:08 +0000 Received: by mail-qv1-xf35.google.com with SMTP id kl29so7847105qvb.2; Sat, 16 Apr 2022 02:02:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UMYeeN0iZUy6EfrHqDAGGWFWHi99PGIp7rnql4YH69k=; b=SHRbg8x/2JHNnkBOV6/ilD2huqCqpDRTm3pEUP94q1dA2HF25/mbncfBO60ybBMK9J CTgU1fn0th7wGA2m5qEt63IR+sdTKmR4Fz64scgnCymkfwelCNkxCGaf5V4GdM53zd09 FgGi/n1PomtpcTp4G5bYD6ssSTtgTdaBR1mN/Z6ZS8ECfqArA2cGVwnka/i5L7wKkkkK nH1vc/EKfUo4oGpb9IdY++dxNtjznIvlxxy278jYriy2nKyQoXdZPsZjDDCrRXYcW7oB PSySnvRbq96IZAGYk8zk22UMuFv3UU59NMJ+byluQF2trHHAShQ4twdxkcA3Axl1afk/ gJBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UMYeeN0iZUy6EfrHqDAGGWFWHi99PGIp7rnql4YH69k=; b=D82fYyzaRqKhRu91CA96ugIRVRAyoBsYo3dCsm5hqhKBHFUjNyQgeIo3Nhb6xEk6pV VJrhmgKyFh7pV4oOKCIYEoF6Ie/RiScIMRc8w6UpnsXBrivIsP6TKYMBdIPk6g8WpT+Q wdqwGEZk7dnNiZ5IPxTmzBXtYYqnqTCwqVIU4Zcj/v00eGOfW9ZFVBf16Cm0f1s2A9ER BGap3WHjGDkbQCkzOiTSlB7j90pNFVAK2+JQZLZNmr2T6SnooGfGjK9Bd/izkdnbmTZW eH9Gt5uvy5KhkjNYNArnd8hVsajNxDKJrw+Eac0VGpS2MukraUHYcfWAhM/tjrintnkV v8xg== X-Gm-Message-State: AOAM531YL6HdwxC8IFJLFLCSBA+nRj47MfObJTqOp7oRJgBLeJbiKn9/ oec+vapCW+w6lYIi9bGh99E= X-Google-Smtp-Source: ABdhPJx1fx5x1PI6xkhKtntIgNXtV21Yyi5CtpacqQpU+GXOKX3ivUyESARsPbkaWqdHt7I0HguTlg== X-Received: by 2002:a0c:d688:0:b0:42c:3cb0:3923 with SMTP id k8-20020a0cd688000000b0042c3cb03923mr1713298qvi.69.1650099725053; Sat, 16 Apr 2022 02:02:05 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id o6-20020a05622a044600b002e1b9be8e6fsm4258085qtx.36.2022.04.16.02.02.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 02:02:04 -0700 (PDT) From: Peter Geis To: Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Shawn Lin , Simon Xue Cc: linux-rockchip@lists.infradead.org, Peter Geis , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/4] dt-bindings: pci: remove fallback from Rockchip DesignWare binding Date: Sat, 16 Apr 2022 05:01:57 -0400 Message-Id: <20220416090159.596930-3-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416090159.596930-1-pgwipeout@gmail.com> References: <20220416090159.596930-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_020206_607044_BC7EC368 X-CRM114-Status: GOOD ( 11.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The snps,dw-pcie binds to a standalone driver. It is not fully compatible with the Rockchip implementation and causes a hang if it binds to the device. Remove this binding as a valid fallback. Signed-off-by: Peter Geis --- .../devicetree/bindings/pci/rockchip-dw-pcie.yaml | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 142bbe577763..bc0a9d1db750 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -19,20 +19,10 @@ description: |+ allOf: - $ref: /schemas/pci/pci-bus.yaml# -# We need a select here so we don't match all nodes with 'snps,dw-pcie' -select: - properties: - compatible: - contains: - const: rockchip,rk3568-pcie - required: - - compatible - properties: compatible: items: - const: rockchip,rk3568-pcie - - const: snps,dw-pcie reg: items: @@ -110,7 +100,7 @@ examples: #size-cells = <2>; pcie3x2: pcie@fe280000 { - compatible = "rockchip,rk3568-pcie", "snps,dw-pcie"; + compatible = "rockchip,rk3568-pcie"; reg = <0x3 0xc0800000 0x0 0x390000>, <0x0 0xfe280000 0x0 0x10000>, <0x3 0x80000000 0x0 0x100000>; From patchwork Sat Apr 16 09:01:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 14F2CC4332F for ; Sat, 16 Apr 2022 09:03:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0/QWh0MPT5q4w4dzTcJC4rUQG41fl8lZgF8J1U3hj68=; b=gwLn/uAK1sksOh 1xUBrCFdy8CfcGrHXY3Fw5ssoi15urkaRPWgD8uVgmf74O0i4f2czerhYiPg4ba+kln3gxWxdoxK5 LZuUNuIryVnREX+SjbauBtPw1NwyI59UB5Ych/XRk2y+J3RsUcRQEGZAH+AHpv1EDw7o4a4GYUC3y n5D6Ml7k9suQGXKUqMXZgeyifLKB3GScE3VzP5wyJ+KHgb7y9RdZOKKYIk/Qm7OsECfaoSUdPTgac NX8+uh1NNPsD28pb8r8p6VLk6Qqt/gPXpOoryl5aHU6nn+xWZOEzqKppbn0un7Ti1R6NcZqcZQ+mh 637o1bVXCEHCsuoBX1FA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeKI-00CYdF-2Q; Sat, 16 Apr 2022 09:02:42 +0000 Received: from mail-qk1-x72f.google.com ([2607:f8b0:4864:20::72f]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeJj-00CYKn-Lx; Sat, 16 Apr 2022 09:02:09 +0000 Received: by mail-qk1-x72f.google.com with SMTP id b189so8040094qkf.11; Sat, 16 Apr 2022 02:02:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2wd9sVHC/mmpYlhb5g3G/iw92sjMjBm/QMls3NoS/gY=; b=gBastN6vQYfwCm8Q6m+J1iwh3aIAYHUc1b1sXaq7Jhx0NND7+HnxmIJJkE2IF1zNZZ e86wEpsqhUxfA+F5SCcdD1P/NMsbHvzm41rOecue6C01bApMrW5/LWeafZv2VpKdwOt5 5Lx3GV29yRv+awhNKJ723Eo+7oSE2EGx6a/YiyUs2FZQN1Hre37kgvbnMTEPyXOGB7YE Iuc6pYPMOV2LN9peMb0zU/qqd49u+AM8GvrfRoow0QftvtEbL0tc5QOXm8TmQ/WFGEmI INrfKKyckBBCdTfg8sBNBO1mDDeQAapdepsphs442HXUEXJM++rQ8xJj0aWyGZgKvAs6 zbBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2wd9sVHC/mmpYlhb5g3G/iw92sjMjBm/QMls3NoS/gY=; b=zC0apgXCVtAgwhV14xr/cN+WXBSmiaxnmuM3FpR3N7ow7rs5hODHR7lKne/wH4HNo/ C9MIJkn35RER89b8obtV7rlo9yGumtIMp5iEicwoL7kZ5dD5T0DzwZxifwYukdjSdHaG bt+4Cp/hJ8Q/Q8xF3BdJz/qjivnG+Fap2qZDPxZ2g3djZZAwDUMCEI+Ugr5ZuRUdF0yY dObGAo3QSRCe9U/j9HCosMdclTRHXYwxDqqu3WAP0aD04+hAPajNIcfMkWCtRez1BoKE Bk1orAmklsNxalPWIwRg5xxTOxFnMitJUZGUDp0T/S+jM8r41E3suqM+aQ2YigVtiMmD qoJQ== X-Gm-Message-State: AOAM531CaYTPPEQzWrjHKJYhNZzk81YOZTvEgUkmVfz+Okq4YxwKJ9z3 Ud/XDfaz4the1T7se1/EtiQ= X-Google-Smtp-Source: ABdhPJy3l+7p3EOU3dRUieRVqz2WtZcfZ/JTxg9Xej1AnMNkRNHvbQwBf9wAhZxhEwuZWsBG6htNZw== X-Received: by 2002:a05:620a:2807:b0:67d:6349:2577 with SMTP id f7-20020a05620a280700b0067d63492577mr1442226qkp.785.1650099726080; Sat, 16 Apr 2022 02:02:06 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id o6-20020a05622a044600b002e1b9be8e6fsm4258085qtx.36.2022.04.16.02.02.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 02:02:05 -0700 (PDT) From: Peter Geis To: Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, Peter Geis , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 3/4] PCI: dwc: rockchip: add legacy interrupt support Date: Sat, 16 Apr 2022 05:01:58 -0400 Message-Id: <20220416090159.596930-4-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416090159.596930-1-pgwipeout@gmail.com> References: <20220416090159.596930-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_020207_921879_CD149EF1 X-CRM114-Status: GOOD ( 19.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The legacy interrupts on the rk356x pcie controller are handled by a single muxed interrupt. Add irq domain support to the pcie-dw-rockchip driver to support the virtual domain. Signed-off-by: Peter Geis --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 112 +++++++++++++++++- 1 file changed, 110 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index c9b341e55cbb..863374604fb1 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -10,9 +10,12 @@ #include #include +#include +#include #include #include #include +#include #include #include #include @@ -36,10 +39,13 @@ #define PCIE_LINKUP (PCIE_SMLH_LINKUP | PCIE_RDLH_LINKUP) #define PCIE_L0S_ENTRY 0x11 #define PCIE_CLIENT_GENERAL_CONTROL 0x0 +#define PCIE_CLIENT_INTR_STATUS_LEGACY 0x8 +#define PCIE_CLIENT_INTR_MASK_LEGACY 0x1c #define PCIE_CLIENT_GENERAL_DEBUG 0x104 -#define PCIE_CLIENT_HOT_RESET_CTRL 0x180 +#define PCIE_CLIENT_HOT_RESET_CTRL 0x180 #define PCIE_CLIENT_LTSSM_STATUS 0x300 -#define PCIE_LTSSM_ENABLE_ENHANCE BIT(4) +#define PCIE_LEGACY_INT_ENABLE GENMASK(3, 0) +#define PCIE_LTSSM_ENABLE_ENHANCE BIT(4) #define PCIE_LTSSM_STATUS_MASK GENMASK(5, 0) struct rockchip_pcie { @@ -51,6 +57,8 @@ struct rockchip_pcie { struct reset_control *rst; struct gpio_desc *rst_gpio; struct regulator *vpcie3v3; + struct irq_domain *irq_domain; + raw_spinlock_t irq_lock; }; static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, @@ -65,6 +73,94 @@ static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip, writel_relaxed(val, rockchip->apb_base + reg); } +static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc) +{ + struct irq_chip *chip = irq_desc_get_chip(desc); + struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc); + unsigned long reg, hwirq; + + chained_irq_enter(chip, desc); + + reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_LEGACY); + + for_each_set_bit(hwirq, ®, 8) + generic_handle_domain_irq(rockchip->irq_domain, hwirq); + + chained_irq_exit(chip, desc); +} + +static void rockchip_intx_mask(struct irq_data *data) +{ + struct rockchip_pcie *rockchip = irq_data_get_irq_chip_data(data); + unsigned long flags; + u32 val; + + /* disable legacy interrupts */ + raw_spin_lock_irqsave(&rockchip->irq_lock, flags); + val = HIWORD_UPDATE_BIT(PCIE_LEGACY_INT_ENABLE); + val |= PCIE_LEGACY_INT_ENABLE; + rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_LEGACY); + raw_spin_unlock_irqrestore(&rockchip->irq_lock, flags); +}; + +static void rockchip_intx_unmask(struct irq_data *data) +{ + struct rockchip_pcie *rockchip = irq_data_get_irq_chip_data(data); + unsigned long flags; + u32 val; + + /* enable legacy interrupts */ + raw_spin_lock_irqsave(&rockchip->irq_lock, flags); + val = HIWORD_UPDATE_BIT(PCIE_LEGACY_INT_ENABLE); + val &= ~PCIE_LEGACY_INT_ENABLE; + rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_LEGACY); + raw_spin_unlock_irqrestore(&rockchip->irq_lock, flags); +}; + +static struct irq_chip rockchip_intx_irq_chip = { + .name = "INTx", + .irq_mask = rockchip_intx_mask, + .irq_unmask = rockchip_intx_unmask, + .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, +}; + +static int rockchip_pcie_intx_map(struct irq_domain *domain, unsigned int irq, + irq_hw_number_t hwirq) +{ + irq_set_chip_and_handler(irq, &rockchip_intx_irq_chip, handle_level_irq); + irq_set_chip_data(irq, domain->host_data); + + return 0; +} + +static const struct irq_domain_ops intx_domain_ops = { + .map = rockchip_pcie_intx_map, +}; + +static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip) +{ + struct device *dev = rockchip->pci.dev; + struct device_node *intc; + + raw_spin_lock_init(&rockchip->irq_lock); + + intc = of_get_child_by_name(dev->of_node, "legacy-interrupt-controller"); + if (!intc) { + dev_err(dev, "missing child interrupt-controller node\n"); + return -EINVAL; + } + + rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX, + &intx_domain_ops, rockchip); + of_node_put(intc); + if (!rockchip->irq_domain) { + dev_err(dev, "failed to get a INTx IRQ domain\n"); + return -EINVAL; + } + + return 0; +} + static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip) { rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_ENABLE_LTSSM, @@ -111,7 +207,19 @@ static int rockchip_pcie_host_init(struct pcie_port *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); + struct device *dev = rockchip->pci.dev; u32 val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE); + int irq, ret; + + irq = of_irq_get_byname(dev->of_node, "legacy"); + if (irq < 0) + return irq; + + ret = rockchip_pcie_init_irq_domain(rockchip); + if (ret < 0) + dev_err(dev, "failed to init irq domain\n"); + + irq_set_chained_handler_and_data(irq, rockchip_pcie_legacy_int_handler, rockchip); /* LTSSM enable control mode */ rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL); From patchwork Sat Apr 16 09:01:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2CB2C433EF for ; Sat, 16 Apr 2022 09:03:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NBmOfWGI29Bqi6TkQAj8b5O+P6E/5zHj24vpBeSDHig=; b=pPK+ij9TO6xzko 89spju4N12TxFk8hAgh4CeWNMeE8baR1lBb+oFT3bedVFHKdqfPApebBlLuQA6kXGm420+jH3bNbw n4f/9rw9zackx5p+BSoCeFA3y+GGmhbWKeTYHL2fFtvRLVL2ntzh4t9TAePOIVVEwvVMehX026Tjd o1HF+snKfqy2QPsEVzgbqpFa9AolVegKU8/4DawXCDDYDQ72e26KF6XlwKXTI7kywxynJA6tSrbWK D9QGFsrdoW3rSrzSjIm6G/BuLsVnJ6+ivzPa79sgOL4wdzDwq6DP9Ve4zRJhXUS3Idz3VkN8iwSBU +Bem6FaffLmw0BqNbDpw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeKU-00CYkW-Kv; Sat, 16 Apr 2022 09:02:54 +0000 Received: from mail-qk1-x730.google.com ([2607:f8b0:4864:20::730]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nfeJk-00CYL3-Ij; Sat, 16 Apr 2022 09:02:09 +0000 Received: by mail-qk1-x730.google.com with SMTP id d19so197371qko.3; Sat, 16 Apr 2022 02:02:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hOTwp/EOJfvnikKCMdwuTDokMTrvRKo561UbGIFybNc=; b=a8iS2plATz4R7wZvmmY32dCSr5YS2O2lXsCw0VKPRGdE96q+3eqF1DRo3szG71KzMn 3KkZRBxAwblLv9t5I6+EPZ8Vlj+nEMQo5x9FCeT3wwQTe5GfZb5Q9VeAmZhh0hP7z/aF WRS5oNfY67FjqGqYtFerqIfZY6j0J3QtYQk7M4COJsCh6yu0VNSJmVMAIggHZ6S0npRE Tv228oLwB/eotUR+A8CNWxL2OvL/9KygZqZ8a1GUAaLLsDOa1Kmn8vl04lSh3Ahs+0cz Fw/JqzDVhxiEKWr81CUPaUzvB3iq19JVHn8SK+PMBTRBqel0NBL79fSZFBo3t04GHXLJ dv7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hOTwp/EOJfvnikKCMdwuTDokMTrvRKo561UbGIFybNc=; b=J/uuRtXeciX9Q0i1XmrhgO8UGV5Aom/Qi/xPDAPLTshw3XojvWP2FBWR0TigHSCSvS tv4JAbRdxNNyeGXJtJFAjcwBBgy7YA9Ba4knNhSNuJuglNdDmqVCG4NaW0srp6usuWQo 05P/b5zsOrNMVfsXt5MF9RYynhtGwCXvqBt+C0Ph/RFKNwx1Sm7xxad19mlmZrojCkKx /5LmiZCZeWhzW1BcHzTNye/SK5I7WooPoG9pg4hOIbeQLWco/+bHqIm5nz31m8rmQY8/ hAmRpr8g+YDI7wdRYwQF/vNivwQeE/+1OHI4y4ToTOXqhSgS/1p6fwYPl2JzUh6o0U/I OMOg== X-Gm-Message-State: AOAM533cT0NaK/hz6KlBjIwkny2cwG0/QHdLLX4bQfqlziv/Q2TT2iRl ui3GOyZt4kzl/+ATNod2bg4= X-Google-Smtp-Source: ABdhPJwy6iamzpKvOZtqyseBX18jaHXdXj4CmWEXPFoIGi4uoGCyIhZmXb9+lXb5bDL1tXCqBlMXUQ== X-Received: by 2002:a05:620a:2847:b0:67d:2bad:422f with SMTP id h7-20020a05620a284700b0067d2bad422fmr1485218qkp.559.1650099727001; Sat, 16 Apr 2022 02:02:07 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id o6-20020a05622a044600b002e1b9be8e6fsm4258085qtx.36.2022.04.16.02.02.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 02:02:06 -0700 (PDT) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, Peter Geis , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 4/4] arm64: dts: rockchip: add rk3568 pcie2x1 controller Date: Sat, 16 Apr 2022 05:01:59 -0400 Message-Id: <20220416090159.596930-5-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416090159.596930-1-pgwipeout@gmail.com> References: <20220416090159.596930-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_020208_659075_0C1AA97F X-CRM114-Status: GOOD ( 10.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The pcie2x1 controller is common between the rk3568 and rk3566. It is a single lane pcie2 compliant controller. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 55 ++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index ca20d7b91fe5..b2f91aaacca5 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -722,6 +722,61 @@ qos_vop_m1: qos@fe1a8100 { reg = <0x0 0xfe1a8100 0x0 0x20>; }; + pcie2x1: pcie@fe260000 { + compatible = "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0xf>; + assigned-clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, + <&cru CLK_PCIE20_AUX_NDFT>; + clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, + <&cru CLK_PCIE20_AUX_NDFT>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", "aux"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msi", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + linux,pci-domain = <0>; + num-ib-windows = <6>; + num-ob-windows = <2>; + max-link-speed = <2>; + msi-map = <0x0 &its 0x0 0x1000>; + num-lanes = <1>; + phys = <&combphy2 PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3568_PD_PIPE>; + reg = <0x3 0xc0000000 0x0 0x00400000>, + <0x0 0xfe260000 0x0 0x00010000>, + <0x3 0x00000000 0x0 0x01000000>; + ranges = <0x01000000 0x0 0x01000000 0x3 0x01000000 0x0 0x00100000 + 0x02000000 0x0 0x02000000 0x3 0x02000000 0x0 0x3e000000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE20_POWERUP>; + reset-names = "pipe"; + status = "disabled"; + + pcie_intc: legacy-interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = ; + }; + + }; + sdmmc0: mmc@fe2b0000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe2b0000 0x0 0x4000>;