From patchwork Sat Apr 16 10:04:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7131AC433F5 for ; Sat, 16 Apr 2022 10:06:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SIvLbz3iXAKaor+aFjLtfcswQxkVVAXV/CF4qeuWMz0=; b=w7LcHf5uwgAjaM z2LKR3dVFRkNiAtxWg5Z1yDrnYYL2SNZBDmVvoiYXoZmHQmIax7slA9XkMLTwbO+XY4KhcNwjBnDC INPrkBSTms9792tHY0mUTeckUDf7K5Tw4Mdn3WiN1kDbZAner94TV6VoKvGWFHOKIp7Wk5drQWNe7 rH2auL2BQg2AiKDCkEMB06Kpw6x6N5NwlxUAE48x0IerXdVwWhhMUXqi9oIL+0C0yt+ylhlV9gPYb NJzfCxUhsSjtv1q3TB+xrQK8iv/Vepo8wg0kgAo0KkyHJaaWIsHVsKiIxOrlWsUNTagAiCytdHpqG Irk+8llZN9alMT3989Lw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nffIu-00ChEg-Rb; Sat, 16 Apr 2022 10:05:20 +0000 Received: from mail-qk1-x730.google.com ([2607:f8b0:4864:20::730]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nffIi-00Ch8g-K2; Sat, 16 Apr 2022 10:05:09 +0000 Received: by mail-qk1-x730.google.com with SMTP id e10so8116740qka.6; Sat, 16 Apr 2022 03:05:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UMYeeN0iZUy6EfrHqDAGGWFWHi99PGIp7rnql4YH69k=; b=mOvkRR5eJ9vjx8JtRPhJIqLuhXOHNKl0zTHY8+1g55VqwGg8RzRhl7jVK+QFBBJN96 OAiaLwoMsQt85+snNBi2HWtGsgpwdes4z36dZfPc7PwMM6L5cmY+ExBzYgQQzROOURbm zjCWI3+Gl7ZWd4i40j8335oFN7+UIjnSK4W+2p/wPxzt/s12i0z5RHvdhVKzG8pJdVKQ sauubRY1VD/0QO8Y7gJxDgixdZI93uAVviUWUVFLK8s6Zo3USyMsO1XN5FIqhGg6VYsM 3ufyo3YPATuyYWWnjNk1sY29pvC2et5TqFn1a8Fra8HUvdmT6tnl9O1I8VC0+bJBY7o5 mI8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UMYeeN0iZUy6EfrHqDAGGWFWHi99PGIp7rnql4YH69k=; b=krcIIMxzq0FWg8ZDUo8WKm91k6mw0lSDiVN9eC0FZjKvH7imSudkY4TBpaIHM/ZSZ5 EUkH1p9l/MYVincCA+WD3uOFSdnPUzdyLukyC8hcp9hLq86tiRjhz2wn27t5VwpFdepl rLiU3ofHgwYfCjVHi7HN7FzNDV8oa5z+MagNP0dOZ06Xm+vsIqKKc1bPVRp7t9ZArQjA AW8EP2CVNvM0C6XJsI75y323VZ++glWRdrP5X7Pb9zAbtZ0Phvfak1F5TpcZLZQHtPBW pMEHcH5z45kSCWmJxb2s9gilGsI1jz1+8VHlTMHaV8HJktSM5H03Xbsa+VHLF01L1lMx 0KBw== X-Gm-Message-State: AOAM531Qc60LKLneW8DSQEzFC88HJxDmuOKfpyd35gAjENF5KqLTW9sN cPibhm+2z0+DDhITvDVYF3rojOwD1XaWISIr X-Google-Smtp-Source: ABdhPJwRq9n5D0f3hCXGHWGLW0h4Bo0ha8X8ZtKGx70RNTsRJvEua2poQiwJfEw5GWgJbXpFldqigw== X-Received: by 2002:a05:620a:350:b0:69e:5a7e:7464 with SMTP id t16-20020a05620a035000b0069e5a7e7464mr1576353qkm.321.1650103505389; Sat, 16 Apr 2022 03:05:05 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id n22-20020ac85b56000000b002f1d7a2867dsm4263188qtw.67.2022.04.16.03.05.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 03:05:05 -0700 (PDT) From: Peter Geis To: Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Shawn Lin , Simon Xue Cc: linux-rockchip@lists.infradead.org, Peter Geis , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 1/4] dt-bindings: pci: remove fallback from Rockchip DesignWare binding Date: Sat, 16 Apr 2022 06:04:59 -0400 Message-Id: <20220416100502.627289-2-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416100502.627289-1-pgwipeout@gmail.com> References: <20220416100502.627289-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_030508_704537_9F2BE8ED X-CRM114-Status: GOOD ( 11.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The snps,dw-pcie binds to a standalone driver. It is not fully compatible with the Rockchip implementation and causes a hang if it binds to the device. Remove this binding as a valid fallback. Signed-off-by: Peter Geis --- .../devicetree/bindings/pci/rockchip-dw-pcie.yaml | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 142bbe577763..bc0a9d1db750 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -19,20 +19,10 @@ description: |+ allOf: - $ref: /schemas/pci/pci-bus.yaml# -# We need a select here so we don't match all nodes with 'snps,dw-pcie' -select: - properties: - compatible: - contains: - const: rockchip,rk3568-pcie - required: - - compatible - properties: compatible: items: - const: rockchip,rk3568-pcie - - const: snps,dw-pcie reg: items: @@ -110,7 +100,7 @@ examples: #size-cells = <2>; pcie3x2: pcie@fe280000 { - compatible = "rockchip,rk3568-pcie", "snps,dw-pcie"; + compatible = "rockchip,rk3568-pcie"; reg = <0x3 0xc0800000 0x0 0x390000>, <0x0 0xfe280000 0x0 0x10000>, <0x3 0x80000000 0x0 0x100000>; From patchwork Sat Apr 16 10:05:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E02F7C433EF for ; Sat, 16 Apr 2022 10:06:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0/QWh0MPT5q4w4dzTcJC4rUQG41fl8lZgF8J1U3hj68=; b=2FGfIJFTB87huD sZpGuOUuxQJ9BA/G4K1z59mhnLSXoRoxPWr4BU+xjztvvBnjZxkVPi/QrCS9iy0hGC8qkw8iKGgtw VmWxQQuiOEO7WYSNJ/kWYuW0BXu3TNktGKQct7ZJi0PD2zK2nj1kPAPJt6VMx3CYOH1NoopNgfwuf 64Ua26UwIQFbyEwX1HYhlU4uWElJD5/vsqd8S60ZqZV7o4z+8aAbUMUOv4O5Pna/pxQ8niOJiTiA7 urc6LX2saC8rRKS+1RE4ECa0Bb44e3+mVDGDUKGM6BtIS2+7Ma6eHvKxB87YERhuRmBUpsbHssu0s AyRgvDDYr0s70Txcx/rQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nffJH-00ChRR-GX; Sat, 16 Apr 2022 10:05:43 +0000 Received: from mail-qt1-x831.google.com ([2607:f8b0:4864:20::831]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nffIj-00Ch8x-Fz; Sat, 16 Apr 2022 10:05:11 +0000 Received: by mail-qt1-x831.google.com with SMTP id s6so7276243qta.1; Sat, 16 Apr 2022 03:05:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2wd9sVHC/mmpYlhb5g3G/iw92sjMjBm/QMls3NoS/gY=; b=i5FeipM4sWrr6NtZ/b2zX7qMkUs+Kfq48OJmZQzZG5S9kuYCxdtqOG/qVCumCRe7Bl 5vTcrODFshGMIXWJhoI/AYTijI8l6e3dBovhxwJ9Ycen1aSB8BM2eL8RcclCufkvQx4g 2rZl2jZczU/yEKVUUeXthzwXLLFn0+PacRFBNYvxtN5yRLpbp7TCr+RNkycyTtR06tco Mxtv4kC8v1+PXYk7mNTyxzdW1hjH4oyFhftv3xtJ+bgL53pkCNQn6JSs8EGfgjxkpBHQ 3sISRoSrAGuoluIkP63Zix2tllOiISp41iQg6R+IBrZf5QDcseHqsKrMUZjGAa+0B5qL YUQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2wd9sVHC/mmpYlhb5g3G/iw92sjMjBm/QMls3NoS/gY=; b=SfR+tCTfRZMbBUNR0y8hEUF/VpypcWNZkBKvo6+flwJ0sZuEmWGVfM2i/Ja9iIUST/ FRSdpmIggf0nJnp2UM/JdQBE4ojqMdWPUpCPEYHFAj3KDVOhs2QCW+6yInKAT6ZMik2P buW9lJ30xm8dsNiwj9dNhdf3cewuwlSLsIiJpOL7of/xZ58hIraCLUGdRq8jbhRaXrGE YCR9T1cl0CPaipYV2e7gK6zR6bwTGWY4xdoVyGGagJgfDJrgGOZAlaWWrUHRF4dF+iHI yahfEEzpwlvA63RkCkqUZI7NnxMRX+VWWO72d7eCQGRUDo1pP7LzcMzcs/pJ1+t0Y0AV vu8A== X-Gm-Message-State: AOAM531BKaKWF9+ijHbfnulFjB8fUZLjbfDtQnw5udStrD6r6k2eS5sr DwrowuQOHsqnSszhrC9kMdY= X-Google-Smtp-Source: ABdhPJxP7QEQFXqYGIM8hzks2b3uw2um863ByXMW6kpMOOB9ZyiRV3uPlfoek+mRZVki8IuWTZvzpg== X-Received: by 2002:a05:622a:110:b0:2e1:f084:d855 with SMTP id u16-20020a05622a011000b002e1f084d855mr1826999qtw.198.1650103506406; Sat, 16 Apr 2022 03:05:06 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id n22-20020ac85b56000000b002f1d7a2867dsm4263188qtw.67.2022.04.16.03.05.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 03:05:06 -0700 (PDT) From: Peter Geis To: Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, Peter Geis , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 2/4] PCI: dwc: rockchip: add legacy interrupt support Date: Sat, 16 Apr 2022 06:05:00 -0400 Message-Id: <20220416100502.627289-3-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416100502.627289-1-pgwipeout@gmail.com> References: <20220416100502.627289-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_030509_559239_A4121518 X-CRM114-Status: GOOD ( 19.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The legacy interrupts on the rk356x pcie controller are handled by a single muxed interrupt. Add irq domain support to the pcie-dw-rockchip driver to support the virtual domain. Signed-off-by: Peter Geis --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 112 +++++++++++++++++- 1 file changed, 110 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index c9b341e55cbb..863374604fb1 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -10,9 +10,12 @@ #include #include +#include +#include #include #include #include +#include #include #include #include @@ -36,10 +39,13 @@ #define PCIE_LINKUP (PCIE_SMLH_LINKUP | PCIE_RDLH_LINKUP) #define PCIE_L0S_ENTRY 0x11 #define PCIE_CLIENT_GENERAL_CONTROL 0x0 +#define PCIE_CLIENT_INTR_STATUS_LEGACY 0x8 +#define PCIE_CLIENT_INTR_MASK_LEGACY 0x1c #define PCIE_CLIENT_GENERAL_DEBUG 0x104 -#define PCIE_CLIENT_HOT_RESET_CTRL 0x180 +#define PCIE_CLIENT_HOT_RESET_CTRL 0x180 #define PCIE_CLIENT_LTSSM_STATUS 0x300 -#define PCIE_LTSSM_ENABLE_ENHANCE BIT(4) +#define PCIE_LEGACY_INT_ENABLE GENMASK(3, 0) +#define PCIE_LTSSM_ENABLE_ENHANCE BIT(4) #define PCIE_LTSSM_STATUS_MASK GENMASK(5, 0) struct rockchip_pcie { @@ -51,6 +57,8 @@ struct rockchip_pcie { struct reset_control *rst; struct gpio_desc *rst_gpio; struct regulator *vpcie3v3; + struct irq_domain *irq_domain; + raw_spinlock_t irq_lock; }; static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, @@ -65,6 +73,94 @@ static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip, writel_relaxed(val, rockchip->apb_base + reg); } +static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc) +{ + struct irq_chip *chip = irq_desc_get_chip(desc); + struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc); + unsigned long reg, hwirq; + + chained_irq_enter(chip, desc); + + reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_LEGACY); + + for_each_set_bit(hwirq, ®, 8) + generic_handle_domain_irq(rockchip->irq_domain, hwirq); + + chained_irq_exit(chip, desc); +} + +static void rockchip_intx_mask(struct irq_data *data) +{ + struct rockchip_pcie *rockchip = irq_data_get_irq_chip_data(data); + unsigned long flags; + u32 val; + + /* disable legacy interrupts */ + raw_spin_lock_irqsave(&rockchip->irq_lock, flags); + val = HIWORD_UPDATE_BIT(PCIE_LEGACY_INT_ENABLE); + val |= PCIE_LEGACY_INT_ENABLE; + rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_LEGACY); + raw_spin_unlock_irqrestore(&rockchip->irq_lock, flags); +}; + +static void rockchip_intx_unmask(struct irq_data *data) +{ + struct rockchip_pcie *rockchip = irq_data_get_irq_chip_data(data); + unsigned long flags; + u32 val; + + /* enable legacy interrupts */ + raw_spin_lock_irqsave(&rockchip->irq_lock, flags); + val = HIWORD_UPDATE_BIT(PCIE_LEGACY_INT_ENABLE); + val &= ~PCIE_LEGACY_INT_ENABLE; + rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_LEGACY); + raw_spin_unlock_irqrestore(&rockchip->irq_lock, flags); +}; + +static struct irq_chip rockchip_intx_irq_chip = { + .name = "INTx", + .irq_mask = rockchip_intx_mask, + .irq_unmask = rockchip_intx_unmask, + .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, +}; + +static int rockchip_pcie_intx_map(struct irq_domain *domain, unsigned int irq, + irq_hw_number_t hwirq) +{ + irq_set_chip_and_handler(irq, &rockchip_intx_irq_chip, handle_level_irq); + irq_set_chip_data(irq, domain->host_data); + + return 0; +} + +static const struct irq_domain_ops intx_domain_ops = { + .map = rockchip_pcie_intx_map, +}; + +static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip) +{ + struct device *dev = rockchip->pci.dev; + struct device_node *intc; + + raw_spin_lock_init(&rockchip->irq_lock); + + intc = of_get_child_by_name(dev->of_node, "legacy-interrupt-controller"); + if (!intc) { + dev_err(dev, "missing child interrupt-controller node\n"); + return -EINVAL; + } + + rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX, + &intx_domain_ops, rockchip); + of_node_put(intc); + if (!rockchip->irq_domain) { + dev_err(dev, "failed to get a INTx IRQ domain\n"); + return -EINVAL; + } + + return 0; +} + static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip) { rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_ENABLE_LTSSM, @@ -111,7 +207,19 @@ static int rockchip_pcie_host_init(struct pcie_port *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); + struct device *dev = rockchip->pci.dev; u32 val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE); + int irq, ret; + + irq = of_irq_get_byname(dev->of_node, "legacy"); + if (irq < 0) + return irq; + + ret = rockchip_pcie_init_irq_domain(rockchip); + if (ret < 0) + dev_err(dev, "failed to init irq domain\n"); + + irq_set_chained_handler_and_data(irq, rockchip_pcie_legacy_int_handler, rockchip); /* LTSSM enable control mode */ rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL); From patchwork Sat Apr 16 10:05:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF757C433F5 for ; Sat, 16 Apr 2022 10:06:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Zq3k4RJBeDXjJn9H0F/N7SKMqslyYEfX5GHgVHd1yLY=; b=EE6wn2joQQHuuM nQxknxrvZ7M95urqFBBcrkdz4Cv5GqwG96jetFvYAmM/U25XXY7g9Jh8Ttzz2iIw2jK8eLTR/TpQF SQFBe0tyD9g2EWh6JIx0PL5y4Qe4TuRjKYPJkwzTM6ECJURej1m8z0t98jxbAOvUaek9E5nnVdN1/ 5RqZPrJ43T/NJviSIIqEsc1xBg1luqPptj/tUfNv898/irdi5o2G72ZnN48KRlj5ju1nT+SUTFhCo boeFtnnoq8Q9d1vSOq/APernzmzTSAFh5RDxi2AB2ilGJE8A1Gd4FMJpRwI7oy2fqnn5LoVF5bATU 6iQX8QNikclERNTBHdng==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nffJ5-00ChKX-4k; Sat, 16 Apr 2022 10:05:31 +0000 Received: from mail-qk1-x732.google.com ([2607:f8b0:4864:20::732]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nffIj-00Ch8w-1Z; Sat, 16 Apr 2022 10:05:10 +0000 Received: by mail-qk1-x732.google.com with SMTP id j9so683912qkg.1; Sat, 16 Apr 2022 03:05:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r0iQ9ABbCRaGlGa7IaJxgd/TqqdAiwKA2NxXKG7sbVE=; b=HFIYkPBC3hOIMq9kn9/xMHKp/ajgBr5nX5njgRv9yVVAamPnopCYrsldLNAtgL6YLw vpMU8i4l8FSw1iqq8SiA34xfKAW7THnyBNFK7A7KPqeXNRkWZs0l++4y0Wl1hheRKUwx SBqleY9gNpMJWlJq6cPrRfM+hkiHfIsZWQ7tLZ1v/x4EQG+W0jasgtE3iYmUO5CeL4Od +fpZjm7GVao/AvK1aU/hYVBC/W9buW5p024xkY08lutKlTeCowc1nkSLnT49A3c4ddTT gsI8NWuoehxOnhMAY9lNrWLNTo2E+hlix1pETI1HIQUiLbuxoXuVU7zvrEvwhGZd1cZl Fchw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r0iQ9ABbCRaGlGa7IaJxgd/TqqdAiwKA2NxXKG7sbVE=; b=zsX9vM4ZAqUFQUn6UP+g+/m8SS4NF1bHPeFRnGCJ68s0Eb3BuL1w7vRKoaGZ5vT3dq qDK4MmmahfbX96c+aDyUPHMoyA7qxp4sp3xQCejAL8fCCs7iTRT6ynexFamPMA74M6W3 6VMjKaYAwP8x5gMFz0xltDVshTzOsOIkgF8dDIIzwPxdQcXp+uQlptPnV7614CHSxfMX uqjTzkUmM8icRGGHSPQfYllZRoSAJoaUwWdaBH2du9HBVPJtUZe3q9gHDIUeq1eVfS94 2j7I3anGQv0B0IvLVUjosEsMwHzwfnijm0tAKvspJUQccsmWTFgtxN2qqB+Dvxa1q+fP SviA== X-Gm-Message-State: AOAM531FaA1XN02S+LqvMYsNlkluJ0wk9zkaJz0yqHgl8F+RfTujLdIY BPFv8p5MMxdoaiQc2YXb4PXZ0Xo5uIMESKfz X-Google-Smtp-Source: ABdhPJxF0S/ltF1J5/ITjpMAtmH7iSTPGztzj+NFLC5A21kN0oqLUNyc2YkvWCHKcfv0840VdVIVaQ== X-Received: by 2002:a05:620a:2802:b0:69c:3b5a:b264 with SMTP id f2-20020a05620a280200b0069c3b5ab264mr1556070qkp.668.1650103507353; Sat, 16 Apr 2022 03:05:07 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id n22-20020ac85b56000000b002f1d7a2867dsm4263188qtw.67.2022.04.16.03.05.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 03:05:07 -0700 (PDT) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, Peter Geis , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 3/4] arm64: dts: rockchip: add rk3568 pcie2x1 controller Date: Sat, 16 Apr 2022 06:05:01 -0400 Message-Id: <20220416100502.627289-4-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416100502.627289-1-pgwipeout@gmail.com> References: <20220416100502.627289-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_030509_121204_3DF41731 X-CRM114-Status: GOOD ( 10.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The pcie2x1 controller is common between the rk3568 and rk3566. It is a single lane pcie2 compliant controller. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 55 ++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index ca20d7b91fe5..7408169f2865 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -722,6 +722,61 @@ qos_vop_m1: qos@fe1a8100 { reg = <0x0 0xfe1a8100 0x0 0x20>; }; + pcie2x1: pcie@fe260000 { + compatible = "rockchip,rk3568-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0xf>; + assigned-clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, + <&cru CLK_PCIE20_AUX_NDFT>; + clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, + <&cru CLK_PCIE20_AUX_NDFT>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", "aux"; + device_type = "pci"; + interrupts = , + , + , + , + ; + interrupt-names = "sys", "pmc", "msi", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + linux,pci-domain = <0>; + num-ib-windows = <6>; + num-ob-windows = <2>; + max-link-speed = <2>; + msi-map = <0x0 &gic 0x0 0x1000>; + num-lanes = <1>; + phys = <&combphy2 PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3568_PD_PIPE>; + reg = <0x3 0xc0000000 0x0 0x00400000>, + <0x0 0xfe260000 0x0 0x00010000>, + <0x3 0x00000000 0x0 0x01000000>; + ranges = <0x01000000 0x0 0x01000000 0x3 0x01000000 0x0 0x00100000 + 0x02000000 0x0 0x02000000 0x3 0x01100000 0x0 0x3ff00000>; + reg-names = "dbi", "apb", "config"; + resets = <&cru SRST_PCIE20_POWERUP>; + reset-names = "pipe"; + status = "disabled"; + + pcie_intc: legacy-interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = ; + }; + + }; + sdmmc0: mmc@fe2b0000 { compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe2b0000 0x0 0x4000>; From patchwork Sat Apr 16 10:05:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 12815788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0BB82C433F5 for ; Sat, 16 Apr 2022 10:06:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mLwdoSVOZQyzovpunLvtGvLbi8WAb3o5ZhIbsv8TcdQ=; b=CtS0nQh4UmYo22 3gWZAFzHQ/Hq7bftRW0g9Bi/W4u6h/QSn1uEwUPsArFTZEW6N/9qmBk3yFYQK2nrHbjQt3pPcLFYj Z/x/TWo2oFLR5LDpe5OJkuIdXwNzPGHPezwjMy7SO1qgxSG0PrTEhct0YdS6Rc864i9CATfOEMr9o Kyk4HCltIWCOcB7usMC3yFcmdxJ7fjvAQFrfDy+VNVkGNco7u04r7pJ3g+wEI8ml0xWcHBskZEWI4 MxunPOdqqiDWPCQqxiZ+J1HPCxwEiBMsMHoo029D0gcydGjLfes6xWlSyXnYZior1m+ZFYlnoBnx2 2gYlSNp2YvwSwg00Vtlg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nffJS-00ChXF-PK; Sat, 16 Apr 2022 10:05:55 +0000 Received: from mail-qt1-x82e.google.com ([2607:f8b0:4864:20::82e]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nffIk-00Ch93-GN; Sat, 16 Apr 2022 10:05:12 +0000 Received: by mail-qt1-x82e.google.com with SMTP id t25so231958qtc.10; Sat, 16 Apr 2022 03:05:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IqOtlYyePRN/r4aPym/C6r8euVVGX9fSqK0zMFP5Scg=; b=NmjECRbNdaTFdptYyv+cT8YO6KgWYqyiRjn3aibeKUp3EQBDD2NcV7OofgJP2t2wbn b/QBiZJE8xdXANqH8Llqmsfk6O9PjONhNiud9k+vIsEjDwI84M8k2Zs+GRJGU5Tgxyhy 7CiChZMI32Q5LN2AsKPvze7zl2ays10WvBPyDnxAJ28McIjBawpUrYoY98AhWJTR3ACL /XZWzzYUuhkNgUig8mEYWTCzp5PxE1ZYJRZYL+mTnzVzYvHUVYq4s0kTT8HtA0qUUTNq oTOU1owRZUzDqWotkBnovzJUlJvHs69w3of/oe+pDVF4x1zcJJXWQECiUiHjv17NG+af 5uwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IqOtlYyePRN/r4aPym/C6r8euVVGX9fSqK0zMFP5Scg=; b=nPJ6Hx53rCtUxxQ8NXxk87lHTOA2qVvqcmQvVLB+xjVXzj/mg1PfCSXW3joJqPdqBm YzbdifAZhR1Q0UWAqOYDRoPA+LQzTtHqY5rmTgdNUhsT4nh5BZ24K9cQGD5xj7Sl3QwE EIisC3HJbnnh89nfmpruOie+awuRHEhE714gBHbVKiPBbid1XC0c4KuEwNdkn/sSZ82Y xBLMuA0Ak226E3ggp1qzyQ4Iq9gj6yGjpcCrPdXpgEelerDPHl2HTT/v+G+V60XfpG8T jP1oLYqdV3zIOhJ5yFpqxS24GU/vROOg037MRlxaaa/ORv0ES88gk39yiBchvoqyVsr/ aiKg== X-Gm-Message-State: AOAM5330I5UZdeELL3EqaEqXBxueybiVYcEuCsr4abPjgqK6zh/A1iyI Qs8b7rQQCnTPJ6Ir6GekOrI= X-Google-Smtp-Source: ABdhPJwAIjr/Op2S340fMuRIJSZECSC6mxe/6hv16S1HahOfF/1ErIjyLEW5iXethYJhxZJ5rm0X2w== X-Received: by 2002:ac8:5855:0:b0:2eb:87af:ab50 with SMTP id h21-20020ac85855000000b002eb87afab50mr1822539qth.406.1650103508262; Sat, 16 Apr 2022 03:05:08 -0700 (PDT) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id n22-20020ac85b56000000b002f1d7a2867dsm4263188qtw.67.2022.04.16.03.05.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Apr 2022 03:05:08 -0700 (PDT) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, Peter Geis , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 4/4] arm64: dts: rockchip: enable pcie controller on quartz64-a Date: Sat, 16 Apr 2022 06:05:02 -0400 Message-Id: <20220416100502.627289-5-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220416100502.627289-1-pgwipeout@gmail.com> References: <20220416100502.627289-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220416_030510_592914_D2F35983 X-CRM114-Status: GOOD ( 10.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the nodes to enable the pcie controller on the quartz64 model a board. Signed-off-by: Peter Geis --- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index 141a433429b5..85926d46337d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -125,6 +125,18 @@ vbus: vbus { vin-supply = <&vcc12v_dcin>; }; + vcc3v3_pcie_p: vcc3v3_pcie_p { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_enable_h>; + regulator-name = "vcc3v3_pcie_p"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3>; + }; + vcc5v0_usb: vcc5v0_usb { compatible = "regulator-fixed"; regulator-name = "vcc5v0_usb"; @@ -201,6 +213,10 @@ &combphy1 { status = "okay"; }; +&combphy2 { + status = "okay"; +}; + &cpu0 { cpu-supply = <&vdd_cpu>; }; @@ -509,6 +525,14 @@ rgmii_phy1: ethernet-phy@0 { }; }; +&pcie2x1 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_h>; + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + status = "okay"; + vpcie3v3-supply = <&vcc3v3_pcie_p>; +}; + &pinctrl { bt { bt_enable_h: bt-enable-h { @@ -534,6 +558,16 @@ diy_led_enable_h: diy-led-enable-h { }; }; + pcie { + pcie_enable_h: pcie-enable-h { + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_reset_h: pcie-reset-h { + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pmic { pmic_int_l: pmic-int-l { rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;