From patchwork Thu Apr 21 11:38:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12821503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00CCCC433F5 for ; Thu, 21 Apr 2022 11:37:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8FE1710E8CB; Thu, 21 Apr 2022 11:37:26 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 27C6610E8CB; Thu, 21 Apr 2022 11:37:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650541044; x=1682077044; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MOFaZMKF45fliVv/42ysCZ7rsVWhfjeqfv0vo0/q2pg=; b=A1RxOdb5PvEylSDcuN34Oul3mFndWbBUma+9s0ZdnphQKWhBJf+cuhMu 4XhxvE6N4wQ8oP+vmbFlzl50ruQOlnBsQgGZ1S6t3dYuuAT49TA3OBoMY KvAiQBXfAI7OofUNhAwDzEbtEiTKLqCVtxUoqtMW0SNqUzVwkX4catglI t2fesKrQAX7rjuQ+dbd+kC8ETTXV99qu2TiWznStzgcbcRLxmHfeNC9wU UmkerwR6SThv/MPt9R7YNN5a6jlFlZAo7L0mwU8l6jORVlsoxXB404Qdd W2vsYbyezg96LkMTDqapCj9WdzYfWwMu3FQpQHYZ7Ak2EE79AOnPWXJIS A==; X-IronPort-AV: E=McAfee;i="6400,9594,10323"; a="324766830" X-IronPort-AV: E=Sophos;i="5.90,278,1643702400"; d="scan'208";a="324766830" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2022 04:37:23 -0700 X-IronPort-AV: E=Sophos;i="5.90,278,1643702400"; d="scan'208";a="727952125" Received: from ramaling-i9x.iind.intel.com ([10.203.144.108]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2022 04:37:21 -0700 From: Ramalingam C To: intel-gfx , dri-devel Date: Thu, 21 Apr 2022 17:08:11 +0530 Message-Id: <20220421113813.30796-3-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220421113813.30796-1-ramalingam.c@intel.com> References: <20220421113813.30796-1-ramalingam.c@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/4] drm/i915/gt: optimize the ccs_sz calculation per chunk X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hellstrom Thomas , Matthew Auld Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Calculate the ccs_sz that needs to be emitted based on the src and dst pages emitted per chunk. And handle the return value of emit_pte for the ccs pages. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/gt/intel_migrate.c | 36 +++++++++---------------- 1 file changed, 12 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c index 29d761da02c4..463a6a14b5f9 100644 --- a/drivers/gpu/drm/i915/gt/intel_migrate.c +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c @@ -647,17 +647,9 @@ static int scatter_list_length(struct scatterlist *sg) static void calculate_chunk_sz(struct drm_i915_private *i915, bool src_is_lmem, - int *src_sz, int *ccs_sz, u32 bytes_to_cpy, - u32 ccs_bytes_to_cpy) + int *src_sz, u32 bytes_to_cpy, u32 ccs_bytes_to_cpy) { if (ccs_bytes_to_cpy) { - /* - * We can only copy the ccs data corresponding to - * the CHUNK_SZ of lmem which is - * GET_CCS_BYTES(i915, CHUNK_SZ)) - */ - *ccs_sz = min_t(int, ccs_bytes_to_cpy, GET_CCS_BYTES(i915, CHUNK_SZ)); - if (!src_is_lmem) /* * When CHUNK_SZ is passed all the pages upto CHUNK_SZ @@ -713,10 +705,10 @@ intel_context_migrate_copy(struct intel_context *ce, struct drm_i915_private *i915 = ce->engine->i915; u32 ccs_bytes_to_cpy = 0, bytes_to_cpy; enum i915_cache_level ccs_cache_level; - int src_sz, dst_sz, ccs_sz; u32 src_offset, dst_offset; u8 src_access, dst_access; struct i915_request *rq; + int src_sz, dst_sz; bool ccs_is_src; int err; @@ -770,7 +762,7 @@ intel_context_migrate_copy(struct intel_context *ce, } do { - int len; + int len, ccs_sz; rq = i915_request_create(ce); if (IS_ERR(rq)) { @@ -797,7 +789,7 @@ intel_context_migrate_copy(struct intel_context *ce, if (err) goto out_rq; - calculate_chunk_sz(i915, src_is_lmem, &src_sz, &ccs_sz, + calculate_chunk_sz(i915, src_is_lmem, &src_sz, bytes_to_cpy, ccs_bytes_to_cpy); len = emit_pte(rq, &it_src, src_cache_level, src_is_lmem, @@ -835,33 +827,29 @@ intel_context_migrate_copy(struct intel_context *ce, if (err) goto out_rq; + ccs_sz = GET_CCS_BYTES(i915, len); err = emit_pte(rq, &it_ccs, ccs_cache_level, false, ccs_is_src ? src_offset : dst_offset, ccs_sz); + if (err < 0) + goto out_rq; + if (err < ccs_sz) { + err = -EINVAL; + goto out_rq; + } err = rq->engine->emit_flush(rq, EMIT_INVALIDATE); if (err) goto out_rq; - /* - * Using max of src_sz and dst_sz, as we need to - * pass the lmem size corresponding to the ccs - * blocks we need to handle. - */ - ccs_sz = max_t(int, ccs_is_src ? ccs_sz : src_sz, - ccs_is_src ? dst_sz : ccs_sz); - err = emit_copy_ccs(rq, dst_offset, dst_access, - src_offset, src_access, ccs_sz); + src_offset, src_access, len); if (err) goto out_rq; err = rq->engine->emit_flush(rq, EMIT_INVALIDATE); if (err) goto out_rq; - - /* Converting back to ccs bytes */ - ccs_sz = GET_CCS_BYTES(rq->engine->i915, ccs_sz); ccs_bytes_to_cpy -= ccs_sz; } From patchwork Thu Apr 21 11:38:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12821504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EB6DDC433EF for ; Thu, 21 Apr 2022 11:37:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E5CFC10F076; Thu, 21 Apr 2022 11:37:26 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id E3ECD10E8CB; Thu, 21 Apr 2022 11:37:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650541045; x=1682077045; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OY1fSSw7HIOYHDbXIy/g+Rp7HZLnRJzV0lphouT4Ngg=; b=leonEFbwnnQsxQMc9bE2hzkhIOC+aql61iNMnxIZIG3e300iQNkBt84f zDY1gu9op0xuAFz4ag8ofLrTJVw6g9wR2R7aebH4QkqfXkF4I2LZruO0u c5n5NDyKmhDMi9Z92Tf8RgcHGcWN7uxiOgFEVouKOH7deHyCFZdm7LBvb 9GEgKyGwS+UltPKJEAXtpKLYPccN4hbzbFlGDJWFFe/SDXkIxkhVh7gNn E93ix7L3Gyh2Zrn3ekLw1okm2q9VsBqRJ81X0jOlKeY6cTpOH18hJSR7g oBvHtLNvgen1VozR6Cgt94phW5Ld6tnL/wSKpJwAsZaVONjLsty5S/h7Z w==; X-IronPort-AV: E=McAfee;i="6400,9594,10323"; a="324766836" X-IronPort-AV: E=Sophos;i="5.90,278,1643702400"; d="scan'208";a="324766836" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2022 04:37:25 -0700 X-IronPort-AV: E=Sophos;i="5.90,278,1643702400"; d="scan'208";a="727952144" Received: from ramaling-i9x.iind.intel.com ([10.203.144.108]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2022 04:37:23 -0700 From: Ramalingam C To: intel-gfx , dri-devel Date: Thu, 21 Apr 2022 17:08:12 +0530 Message-Id: <20220421113813.30796-4-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220421113813.30796-1-ramalingam.c@intel.com> References: <20220421113813.30796-1-ramalingam.c@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/4] drm/i915/gt: Extend doc on Flat-CCS obj eviction X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hellstrom Thomas , Matthew Auld Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Capture the eviction details for Flat-CCS capable lmem only objects and lmem objects with smem residency. This also captures the impact of eviction on object's memory residency and Flat-CCS compression state. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/gt/intel_migrate.c | 36 ++++++++++++++++++------- 1 file changed, 27 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c index 463a6a14b5f9..9d0d18950e76 100644 --- a/drivers/gpu/drm/i915/gt/intel_migrate.c +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c @@ -485,16 +485,34 @@ static bool wa_1209644611_applies(int ver, u32 size) * And CCS data can be copied in and out of CCS region through * XY_CTRL_SURF_COPY_BLT. CPU can't access the CCS data directly. * - * When we exhaust the lmem, if the object's placements support smem, then we can - * directly decompress the compressed lmem object into smem and start using it - * from smem itself. + * when we exhaust the lmem, we need to handle two types of flat-ccs capable + * objects for its eviction. + * 1) lmem only objects + * 2) lmem objects with smem residency option * - * But when we need to swapout the compressed lmem object into a smem region - * though objects' placement doesn't support smem, then we copy the lmem content - * as it is into smem region along with ccs data (using XY_CTRL_SURF_COPY_BLT). - * When the object is referred, lmem content will be swaped in along with - * restoration of the CCS data (using XY_CTRL_SURF_COPY_BLT) at corresponding - * location. + * 1) lmem only objects: + * + * lmem backing memory can be temporarily evicted to smem, along with the + * auxiliary CCS state, where it can be potentially swapped-out at a later point, + * if required. If userspace later touches the evicted pages, then we always move + * the backing memory back to lmem, which includes restoring the saved CCS state, + * and potentially performing any required swap-in. + * + * In this scenario, objects' backing memory class and Flat-CCS state doesn't + * change. + * + * 2) lmem objects with smem residency option + * + * Lmem object with smem region in it's placement list, will be migrated into + * smem by decompressing the content. I915 doesn't handle this kind of + * migration for Flat-CCS compressed objects yet. + * + * In this scenario, objects' backing memory class and Flat-CCS state changed, + * and userspace is not aware of it. + * + * In summary, when a userspace wants to be sure about the objects memory + * residency and flat-ccs compression state, then placement list can't have + * the lmem and smem together. Instead, object has to be lmem resident only. */ static inline u32 *i915_flush_dw(u32 *cmd, u32 flags) From patchwork Thu Apr 21 11:38:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12821505 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8E7A0C433EF for ; Thu, 21 Apr 2022 11:37:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 58AEA10F3DC; Thu, 21 Apr 2022 11:37:37 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0D91210F3C2; Thu, 21 Apr 2022 11:37:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650541048; x=1682077048; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3wYOwCwnmCdI37dEF7PXNHQEdd37nkbUkMxpWd9t80I=; b=Kq/r/sI926pnqRbI/YwBkboK1hVgT56g55oI4PPvfWO5wq2qN6YlSkps hdndGvHWX9gf5mcGpwMyP1P5iwaYW6slGTYGtmDAnTIV6zHgC92p1lJve 6YLrtfr/0xel+if3L0AYjV1XBluJJIzJix498535sQ6K10eSUR7prsYKV 6QYWCYC0Hm3Cnt5ulnB7rK4wfQ0P/a9cfQx9nimiEhTcFcfGlvRFSc29p 2Lk4YdYAo3vzZmf+kV97oiDZrSS/WPHlZddUp/Ra78vTg/H1GUG2bMfrI H9I6vNhaF6hQAfEi355t/umw7KeZIt/GNsHRrrOI22xH9uInl4kP8bxmE w==; X-IronPort-AV: E=McAfee;i="6400,9594,10323"; a="324766846" X-IronPort-AV: E=Sophos;i="5.90,278,1643702400"; d="scan'208";a="324766846" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2022 04:37:27 -0700 X-IronPort-AV: E=Sophos;i="5.90,278,1643702400"; d="scan'208";a="727952166" Received: from ramaling-i9x.iind.intel.com ([10.203.144.108]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2022 04:37:25 -0700 From: Ramalingam C To: intel-gfx , dri-devel Date: Thu, 21 Apr 2022 17:08:13 +0530 Message-Id: <20220421113813.30796-5-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220421113813.30796-1-ramalingam.c@intel.com> References: <20220421113813.30796-1-ramalingam.c@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/4] uapi/drm/i915: Update the placement list impact on obj residency X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hellstrom Thomas , Matthew Auld Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Object created with list of memory classes as placement preferences, can be backed with any memory class of the list as per kernel's migration policy for the memory contrain situation. Userspace won't be notified of the memory residency change at this scenario. And also Flat-CCS compression is supported only on objects of I915_MEMORY_CLASS_DEVICE. When the Flat-CCS compressed objects migrates out of I915_MEMORY_CLASS_DEVICE, due to memory constrain, content will be decompressed without notifying the userpsace. Record these details in Kernel documentation. Signed-off-by: Ramalingam C --- include/uapi/drm/i915_drm.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 35ca528803fd..8b25dd6a157a 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -3393,6 +3393,20 @@ struct drm_i915_gem_create_ext { * At which point we get the object handle in &drm_i915_gem_create_ext.handle, * along with the final object size in &drm_i915_gem_create_ext.size, which * should account for any rounding up, if required. + * + * If an object is created with list of memory classes as their placement + * preference, kernel could use one of the memory class as the backing storage + * based on the memory availability. At memory pressure kernel could migrate the + * objects content from one memory class to another, given in the placement list. + * + * With placement preference list, userpace can't be sure about the object's memory + * residence. + * + * Flat-CCS compression is supported only for objects of I915_MEMORY_CLASS_DEVICE. + * If the object has other placement preferences, and if the content is + * migrated (by kernel due to memory constrain) to a memory class which is other + * than I915_MEMORY_CLASS_DEVICE, object content will be decompressed by kernel. + * Userpace will be ignorant of this Flat-CCS state change. */ struct drm_i915_gem_create_ext_memory_regions { /** @base: Extension link. See struct i915_user_extension. */