From patchwork Thu Apr 21 13:22:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 12821631 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 345FDC433F5 for ; Thu, 21 Apr 2022 13:24:14 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 3DB3C192A; Thu, 21 Apr 2022 15:23:23 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 3DB3C192A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1650547453; bh=yU3Wy/jd2vE7TmwM/K8xUY3ma8prfNlK39SsAd0VA90=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=rJBRi3s2DYR1JrHDpkXIfystq/G4k6r2hnYNfyGRMW7mzW754DxPa2O3DnNqvX2ty 0BauibN/9IkpuY+2cQ6qYVLiCE1jYncXJPDt0rSG4Ol0Pc2FtN6AtZKe/WBp3/FEQD enrNnGA2Iv6JdncZzvN3C1yPpFXN2B9tjnon9b/o= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id A6EC4F804C1; Thu, 21 Apr 2022 15:22:58 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 51600F804F3; Thu, 21 Apr 2022 15:22:56 +0200 (CEST) Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id E4ADCF800C1 for ; Thu, 21 Apr 2022 15:22:49 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz E4ADCF800C1 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="fF2RtWDn" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 23LDMktV122717; Thu, 21 Apr 2022 08:22:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1650547366; bh=b5SLYsYvigmTzUt32J57S1xBqu4+IQmeZP2d1WqYmuU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fF2RtWDnax5Sq35Q3MVlr0v10bK4/VSj8u8/QK6gldUd+VDqGA1KS1SLDzEH5o9q0 ES9P+K42kKRbedVSKx5sAjO7zm7S0uUYEnjQsNRpocuqp6AVccJ40tr1IsG+Qk5CkW HT3+ld6FPJjBis/t7AzalrThetMe1W+UkiGl3ulE= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 23LDMkUc070350 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 21 Apr 2022 08:22:46 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Thu, 21 Apr 2022 08:22:46 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 21 Apr 2022 08:22:46 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 23LDMjWT078699; Thu, 21 Apr 2022 08:22:46 -0500 From: Jai Luthra To: Peter Ujfalusi , Nishanth Menon , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Jayesh Choudhary Subject: [PATCH 1/3] arm64: dts: ti: k3-am62-main: Add McASP nodes Date: Thu, 21 Apr 2022 18:52:22 +0530 Message-ID: <20220421132224.8601-2-j-luthra@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220421132224.8601-1-j-luthra@ti.com> References: <20220421132224.8601-1-j-luthra@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Jai Luthra , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Jayesh Choudhary Add the nodes for McASP 0-2. Signed-off-by: Jayesh Choudhary Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 51 ++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 4b6ba98dd0a2..2014c0ca599c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -530,4 +530,55 @@ ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; }; + + mcasp0: mcasp@2b00000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x00 0x02b00000 0x00 0x2000>, + <0x00 0x02b08000 0x00 0x400>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + + dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>; + dma-names = "tx", "rx"; + + clocks = <&k3_clks 190 0>; + clock-names = "fck"; + power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>; + }; + + mcasp1: mcasp@2b10000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x00 0x02b10000 0x00 0x2000>, + <0x00 0x02b18000 0x00 0x400>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + + dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>; + dma-names = "tx", "rx"; + + clocks = <&k3_clks 191 0>; + clock-names = "fck"; + power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>; + }; + + mcasp2: mcasp@2b20000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x00 0x02b20000 0x00 0x2000>, + <0x00 0x02b28000 0x00 0x400>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + + dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>; + dma-names = "tx", "rx"; + + clocks = <&k3_clks 192 0>; + clock-names = "fck"; + power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; + }; }; From patchwork Thu Apr 21 13:22:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 12821632 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA891C433F5 for ; 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Thu, 21 Apr 2022 08:22:49 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Thu, 21 Apr 2022 08:22:48 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 21 Apr 2022 08:22:48 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 23LDMmDU078721; Thu, 21 Apr 2022 08:22:48 -0500 From: Jai Luthra To: Peter Ujfalusi , Nishanth Menon , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Jayesh Choudhary Subject: [PATCH 2/3] ASoC: ti: davinci-mcasp: Add dma-type for bcdma Date: Thu, 21 Apr 2022 18:52:23 +0530 Message-ID: <20220421132224.8601-3-j-luthra@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220421132224.8601-1-j-luthra@ti.com> References: <20220421132224.8601-1-j-luthra@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Jai Luthra , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Jayesh Choudhary Set DMA type for ti-bcdma controller for AM62-SK. Signed-off-by: Jayesh Choudhary Signed-off-by: Jai Luthra --- sound/soc/ti/davinci-mcasp.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/ti/davinci-mcasp.c b/sound/soc/ti/davinci-mcasp.c index 2c146b91fca3..377be2e2b6ee 100644 --- a/sound/soc/ti/davinci-mcasp.c +++ b/sound/soc/ti/davinci-mcasp.c @@ -2047,6 +2047,8 @@ static int davinci_mcasp_get_dma_type(struct davinci_mcasp *mcasp) return PCM_SDMA; else if (strstr(tmp, "udmap")) return PCM_UDMA; + else if (strstr(tmp, "bcdma")) + return PCM_UDMA; return PCM_EDMA; } From patchwork Thu Apr 21 13:22:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jai Luthra X-Patchwork-Id: 12821633 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F25F2C433F5 for ; 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Thu, 21 Apr 2022 08:22:51 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Thu, 21 Apr 2022 08:22:51 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 21 Apr 2022 08:22:51 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 23LDMoH6017305; Thu, 21 Apr 2022 08:22:50 -0500 From: Jai Luthra To: Peter Ujfalusi , Nishanth Menon , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Jayesh Choudhary Subject: [PATCH 3/3] arm64: dts: ti: am625-sk: Add audio output support Date: Thu, 21 Apr 2022 18:52:24 +0530 Message-ID: <20220421132224.8601-4-j-luthra@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220421132224.8601-1-j-luthra@ti.com> References: <20220421132224.8601-1-j-luthra@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Jai Luthra , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add nodes for audio codec and sound card, enable the audio serializer (McASP1) under use and update pinmux. Disable all other McASP nodes. Audio input is currently not working properly, so the RX port on McASP1 is disabled for now, until the issue is debugged. The serializer is shared between HDMI and codec. By default codec is used for output, but it can be toggled to HDMI using a FET switch connected to the MCASP1_FET_SEL (J24) header on the board. Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am625-sk.dts | 89 ++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts index a0ea2cc66b31..414f27d4a9dd 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts @@ -119,6 +119,46 @@ <3300000 0x1>; }; + vcc_1v8: fixedregulator-vcc-1v8 { + /* output of TPS6282518DMQ */ + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_3v3_sys>; + regulator-always-on; + regulator-boot-on; + }; + + tlv320_mclk: tlv320-mclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <12288000>; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "AM62x-SKEVM"; + simple-audio-card,widgets = + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT"; + simple-audio-card,format = "dsp_b"; + simple-audio-card,bitclock-master = <&sound_master>; + simple-audio-card,frame-master = <&sound_master>; + simple-audio-card,bitclock-inversion; + + simple-audio-card,cpu { + sound-dai = <&mcasp1>; + }; + + sound_master: simple-audio-card,codec { + sound-dai = <&tlv320aic3106>; + clocks = <&tlv320_mclk>; + }; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -264,6 +304,15 @@ AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */ >; }; + + main_mcasp1_pins_default: main-mcasp1-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x0090, PIN_INPUT, 2) /* (M24) GPMC0_BE0N_CLE.MCASP1_ACLKX */ + AM62X_IOPAD(0x0098, PIN_INPUT, 2) /* (U23) GPMC0_WAIT0.MCASP1_AFSX */ + AM62X_IOPAD(0x008c, PIN_OUTPUT, 2) /* (L25) GPMC0_WEN.MCASP1_AXR0 */ + AM62X_IOPAD(0x0084, PIN_INPUT, 2) /* (L23) GPMC0_ADVN_ALE.MCASP1_AXR2 */ + >; + }; }; &wkup_uart0 { @@ -350,6 +399,18 @@ pinctrl-names = "default"; pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; }; + + tlv320aic3106: tlv320aic3106@1b { + #sound-dai-cells = <0>; + compatible = "ti,tlv320aic3106"; + reg = <0x1b>; + + /* Regulators */ + AVDD-supply = <&vcc_3v3_sys>; + IOVDD-supply = <&vcc_3v3_sys>; + DRVDD-supply = <&vcc_3v3_sys>; + DVDD-supply = <&vcc_1v8>; + }; }; &main_i2c2 { @@ -410,6 +471,34 @@ }; }; +&mcasp0 { + status = "disabled"; +}; + +&mcasp1 { + status = "okay"; + #sound-dai-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&main_mcasp1_pins_default>; + + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 1 0 0 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tx-num-evt = <32>; + rx-num-evt = <32>; +}; + +&mcasp2 { + status = "disabled"; +}; + &mailbox0_cluster0 { mbox_m4_0: mbox-m4-0 { ti,mbox-rx = <0 0 0>;