From patchwork Fri Apr 22 11:43:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12823369 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B18E4C433EF for ; Fri, 22 Apr 2022 12:18:40 +0000 (UTC) Received: from localhost ([::1]:55842 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhsFD-00051M-Tq for qemu-devel@archiver.kernel.org; Fri, 22 Apr 2022 08:18:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56968) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nhrhV-0004SW-G8 for qemu-devel@nongnu.org; Fri, 22 Apr 2022 07:43:49 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]:41611) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nhrhT-0003cQ-UK for qemu-devel@nongnu.org; Fri, 22 Apr 2022 07:43:49 -0400 Received: by mail-pl1-x635.google.com with SMTP id s14so10266022plk.8 for ; Fri, 22 Apr 2022 04:43:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KCZLGHTO3+wecIXI8Og9PtvFRG2EcOF2NtWwLZpjaHg=; b=aXU7QSXNLaYR1dcegq3rSRnqdGvGJxZOhH5qK4vx3PCsTAVtB+K1KboyZ5G6XvOtNg CQy+hNFHAhL9FZoGwNhzb09jqA0YvG7ykW/sL6F90rZZ5pkVvrUj8R8Iuw7IcDAbSbS/ htUyZtaYcPxxFx3TU1Wwsu0fIAMUeX+yVOiFneS4X7C3re32Xs0CxK8ukt1Y86mTkkNW R83yduMlXjmFetFhZGr68yGgUx7A3vHKYKF1F8WJxW5TBEN2+ckXHh/GVg/QpGI3goCP f06lT83vGekgBP4FFuD/FAJHKL5dcCosZMX/cLFhJ1/nogHO29Q8bNPXDXslJHnktNYJ UZSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KCZLGHTO3+wecIXI8Og9PtvFRG2EcOF2NtWwLZpjaHg=; b=cPmMreq2Yw03tlhxUQ8hUJseTrKx9LzXHPfNmLKEOcVv3Qgr7jztBJvyVUeWb7fixI 9ReKo6fQXyOVWND7JKwQU7laZPN8DQwbbD+hgvJgl49GPr3JL7+gEh5l9V3xjCJcjRlg UmI6NsUfvtZiCn7pOuKchN4vm8Tkh9enrRvRBKH2gmdDQKRVdRr+Zcj0UHoIA5uSeVPe aGGJGGER8Ea3EcvaFGtjUfBYJyNnFBfngDx7xuFQEh41+HgyPff8C9zEYHXgJ4Yvxdrn XeooRlVdaRe262ECyHKNq93p5+T3G+a60brsQ6upe2WWjaCNJeJfYzljF0UuRkM4R7xo g88A== X-Gm-Message-State: AOAM533bo9Dd+7C0gkPCPMQP1JRRdhRuGu7hICU4MwmOCaesT5mU7WEC 6wUQoIq0ZcUT3xlD9YAH9N2AvT1xGU8= X-Google-Smtp-Source: ABdhPJx8vWVOtI9cJtABtpTKpPU7mvnDFNEFqtQE1ACaoY9drxUsluAGtrbL3EThgAxqT+jnqjXOgQ== X-Received: by 2002:a17:90b:1a8b:b0:1d1:a447:7419 with SMTP id ng11-20020a17090b1a8b00b001d1a4477419mr4888008pjb.169.1650627826260; Fri, 22 Apr 2022 04:43:46 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:4c40:4238:b597:4c1a]) by smtp.gmail.com with ESMTPSA id d16-20020a056a00245000b004f7728a4346sm2706519pfj.79.2022.04.22.04.43.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 04:43:45 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH v2 1/7] target/xtensa: fix missing tcg_temp_free in gen_window_check Date: Fri, 22 Apr 2022 04:43:26 -0700 Message-Id: <20220422114332.374472-2-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220422114332.374472-1-jcmvbkbc@gmail.com> References: <20220422114332.374472-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=jcmvbkbc@gmail.com; helo=mail-pl1-x635.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" pc and w are allocated with tcg_const_i32 but not freed in gen_window_check. Use tcg_constant_i32 for them both. Fixes: 2db59a76c421 ("target-xtensa: record available window in TB flags") Signed-off-by: Max Filippov Reviewed-by: Richard Henderson --- Changes v1->v2: - also use tcg_constant_* for PC target/xtensa/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index b1491ed625e5..9ecbbf172114 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -571,8 +571,8 @@ static bool gen_window_check(DisasContext *dc, uint32_t mask) unsigned r = 31 - clz32(mask); if (r / 4 > dc->window) { - TCGv_i32 pc = tcg_const_i32(dc->pc); - TCGv_i32 w = tcg_const_i32(r / 4); + TCGv_i32 pc = tcg_constant_i32(dc->pc); + TCGv_i32 w = tcg_constant_i32(r / 4); gen_helper_window_check(cpu_env, pc, w); dc->base.is_jmp = DISAS_NORETURN; From patchwork Fri Apr 22 11:43:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12823376 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3A22DC433EF for ; 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Fri, 22 Apr 2022 04:43:47 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:4c40:4238:b597:4c1a]) by smtp.gmail.com with ESMTPSA id d16-20020a056a00245000b004f7728a4346sm2706519pfj.79.2022.04.22.04.43.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 04:43:46 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH v2 2/7] target/xtensa: use tcg_contatnt_* for numeric literals Date: Fri, 22 Apr 2022 04:43:27 -0700 Message-Id: <20220422114332.374472-3-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220422114332.374472-1-jcmvbkbc@gmail.com> References: <20220422114332.374472-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=jcmvbkbc@gmail.com; helo=mail-pf1-x42e.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Replace tcg_const_* for numeric literals with tcg_constant_*. Reviewed-by: Richard Henderson Signed-off-by: Max Filippov --- target/xtensa/translate.c | 28 +++++++++------------------- 1 file changed, 9 insertions(+), 19 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 9ecbbf172114..53f75f7586b2 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -306,16 +306,14 @@ static void gen_right_shift_sar(DisasContext *dc, TCGv_i32 sa) static void gen_left_shift_sar(DisasContext *dc, TCGv_i32 sa) { - TCGv_i32 tmp = tcg_const_i32(32); if (!dc->sar_m32_allocated) { dc->sar_m32 = tcg_temp_local_new_i32(); dc->sar_m32_allocated = true; } tcg_gen_andi_i32(dc->sar_m32, sa, 0x1f); - tcg_gen_sub_i32(cpu_SR[SAR], tmp, dc->sar_m32); + tcg_gen_sub_i32(cpu_SR[SAR], tcg_constant_i32(32), dc->sar_m32); dc->sar_5bit = false; dc->sar_m32_5bit = true; - tcg_temp_free(tmp); } static void gen_exception(DisasContext *dc, int excp) @@ -1956,11 +1954,10 @@ static void translate_mov(DisasContext *dc, const OpcodeArg arg[], static void translate_movcond(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i32 zero = tcg_const_i32(0); + TCGv_i32 zero = tcg_constant_i32(0); tcg_gen_movcond_i32(par[0], arg[0].out, arg[2].in, zero, arg[1].in, arg[0].in); - tcg_temp_free(zero); } static void translate_movi(DisasContext *dc, const OpcodeArg arg[], @@ -1972,7 +1969,7 @@ static void translate_movi(DisasContext *dc, const OpcodeArg arg[], static void translate_movp(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i32 zero = tcg_const_i32(0); + TCGv_i32 zero = tcg_constant_i32(0); TCGv_i32 tmp = tcg_temp_new_i32(); tcg_gen_andi_i32(tmp, arg[2].in, 1 << arg[2].imm); @@ -1980,7 +1977,6 @@ static void translate_movp(DisasContext *dc, const OpcodeArg arg[], arg[0].out, tmp, zero, arg[1].in, arg[0].in); tcg_temp_free(tmp); - tcg_temp_free(zero); } static void translate_movsp(DisasContext *dc, const OpcodeArg arg[], @@ -6443,7 +6439,7 @@ static void translate_compare_d(DisasContext *dc, const OpcodeArg arg[], [COMPARE_OLE] = gen_helper_ole_d, [COMPARE_ULE] = gen_helper_ule_d, }; - TCGv_i32 zero = tcg_const_i32(0); + TCGv_i32 zero = tcg_constant_i32(0); TCGv_i32 res = tcg_temp_new_i32(); TCGv_i32 set_br = tcg_temp_new_i32(); TCGv_i32 clr_br = tcg_temp_new_i32(); @@ -6455,7 +6451,6 @@ static void translate_compare_d(DisasContext *dc, const OpcodeArg arg[], tcg_gen_movcond_i32(TCG_COND_NE, arg[0].out, res, zero, set_br, clr_br); - tcg_temp_free(zero); tcg_temp_free(res); tcg_temp_free(set_br); tcg_temp_free(clr_br); @@ -6475,7 +6470,7 @@ static void translate_compare_s(DisasContext *dc, const OpcodeArg arg[], [COMPARE_ULE] = gen_helper_ule_s, }; OpcodeArg arg32[3]; - TCGv_i32 zero = tcg_const_i32(0); + TCGv_i32 zero = tcg_constant_i32(0); TCGv_i32 res = tcg_temp_new_i32(); TCGv_i32 set_br = tcg_temp_new_i32(); TCGv_i32 clr_br = tcg_temp_new_i32(); @@ -6489,7 +6484,6 @@ static void translate_compare_s(DisasContext *dc, const OpcodeArg arg[], arg[0].out, res, zero, set_br, clr_br); put_f32_i2(arg, arg32, 1, 2); - tcg_temp_free(zero); tcg_temp_free(res); tcg_temp_free(set_br); tcg_temp_free(clr_br); @@ -6665,14 +6659,13 @@ static void translate_mov_s(DisasContext *dc, const OpcodeArg arg[], static void translate_movcond_d(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i64 zero = tcg_const_i64(0); + TCGv_i64 zero = tcg_constant_i64(0); TCGv_i64 arg2 = tcg_temp_new_i64(); tcg_gen_ext_i32_i64(arg2, arg[2].in); tcg_gen_movcond_i64(par[0], arg[0].out, arg2, zero, arg[1].in, arg[0].in); - tcg_temp_free_i64(zero); tcg_temp_free_i64(arg2); } @@ -6680,12 +6673,11 @@ static void translate_movcond_s(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { if (arg[0].num_bits == 32) { - TCGv_i32 zero = tcg_const_i32(0); + TCGv_i32 zero = tcg_constant_i32(0); tcg_gen_movcond_i32(par[0], arg[0].out, arg[2].in, zero, arg[1].in, arg[0].in); - tcg_temp_free(zero); } else { translate_movcond_d(dc, arg, par); } @@ -6694,7 +6686,7 @@ static void translate_movcond_s(DisasContext *dc, const OpcodeArg arg[], static void translate_movp_d(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i64 zero = tcg_const_i64(0); + TCGv_i64 zero = tcg_constant_i64(0); TCGv_i32 tmp1 = tcg_temp_new_i32(); TCGv_i64 tmp2 = tcg_temp_new_i64(); @@ -6703,7 +6695,6 @@ static void translate_movp_d(DisasContext *dc, const OpcodeArg arg[], tcg_gen_movcond_i64(par[0], arg[0].out, tmp2, zero, arg[1].in, arg[0].in); - tcg_temp_free_i64(zero); tcg_temp_free_i32(tmp1); tcg_temp_free_i64(tmp2); } @@ -6712,7 +6703,7 @@ static void translate_movp_s(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { if (arg[0].num_bits == 32) { - TCGv_i32 zero = tcg_const_i32(0); + TCGv_i32 zero = tcg_constant_i32(0); TCGv_i32 tmp = tcg_temp_new_i32(); tcg_gen_andi_i32(tmp, arg[2].in, 1 << arg[2].imm); @@ -6720,7 +6711,6 @@ static void translate_movp_s(DisasContext *dc, const OpcodeArg arg[], arg[0].out, tmp, zero, arg[1].in, arg[0].in); tcg_temp_free(tmp); - tcg_temp_free(zero); } else { translate_movp_d(dc, arg, par); } From patchwork Fri Apr 22 11:43:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12823325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A93EC433F5 for ; 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Fri, 22 Apr 2022 04:43:48 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:4c40:4238:b597:4c1a]) by smtp.gmail.com with ESMTPSA id d16-20020a056a00245000b004f7728a4346sm2706519pfj.79.2022.04.22.04.43.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 04:43:48 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH v2 3/7] target/xtensa: use tcg_constant_* for exceptions Date: Fri, 22 Apr 2022 04:43:28 -0700 Message-Id: <20220422114332.374472-4-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220422114332.374472-1-jcmvbkbc@gmail.com> References: <20220422114332.374472-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=jcmvbkbc@gmail.com; helo=mail-pl1-x633.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Use tcg_contant_* for exception number, exception cause, debug cause code and exception PC. Signed-off-by: Max Filippov Reviewed-by: Richard Henderson --- Changes v1->v2: - also use tcg_constant_* for PC target/xtensa/translate.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 53f75f7586b2..e92cc6fbf8c6 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -318,18 +318,13 @@ static void gen_left_shift_sar(DisasContext *dc, TCGv_i32 sa) static void gen_exception(DisasContext *dc, int excp) { - TCGv_i32 tmp = tcg_const_i32(excp); - gen_helper_exception(cpu_env, tmp); - tcg_temp_free(tmp); + gen_helper_exception(cpu_env, tcg_constant_i32(excp)); } static void gen_exception_cause(DisasContext *dc, uint32_t cause) { - TCGv_i32 tpc = tcg_const_i32(dc->pc); - TCGv_i32 tcause = tcg_const_i32(cause); - gen_helper_exception_cause(cpu_env, tpc, tcause); - tcg_temp_free(tpc); - tcg_temp_free(tcause); + TCGv_i32 pc = tcg_constant_i32(dc->pc); + gen_helper_exception_cause(cpu_env, pc, tcg_constant_i32(cause)); if (cause == ILLEGAL_INSTRUCTION_CAUSE || cause == SYSCALL_CAUSE) { dc->base.is_jmp = DISAS_NORETURN; @@ -338,11 +333,8 @@ static void gen_exception_cause(DisasContext *dc, uint32_t cause) static void gen_debug_exception(DisasContext *dc, uint32_t cause) { - TCGv_i32 tpc = tcg_const_i32(dc->pc); - TCGv_i32 tcause = tcg_const_i32(cause); - gen_helper_debug_exception(cpu_env, tpc, tcause); - tcg_temp_free(tpc); - tcg_temp_free(tcause); + TCGv_i32 pc = tcg_constant_i32(dc->pc); + gen_helper_debug_exception(cpu_env, pc, tcg_constant_i32(cause)); if (cause & (DEBUGCAUSE_IB | DEBUGCAUSE_BI | DEBUGCAUSE_BN)) { dc->base.is_jmp = DISAS_NORETURN; } From patchwork Fri Apr 22 11:43:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12823378 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AAC36C433FE for ; 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Fri, 22 Apr 2022 04:43:50 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:4c40:4238:b597:4c1a]) by smtp.gmail.com with ESMTPSA id d16-20020a056a00245000b004f7728a4346sm2706519pfj.79.2022.04.22.04.43.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 04:43:49 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH v2 4/7] target/xtensa: use tcg_constant_* for TLB opcodes Date: Fri, 22 Apr 2022 04:43:29 -0700 Message-Id: <20220422114332.374472-5-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220422114332.374472-1-jcmvbkbc@gmail.com> References: <20220422114332.374472-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=jcmvbkbc@gmail.com; helo=mail-pf1-x42b.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" dtlb is a boolean flag, use tcg_constant_* for it. Reviewed-by: Richard Henderson Signed-off-by: Max Filippov --- target/xtensa/translate.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index e92cc6fbf8c6..245c5968bd5d 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -1707,10 +1707,9 @@ static void translate_itlb(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { #ifndef CONFIG_USER_ONLY - TCGv_i32 dtlb = tcg_const_i32(par[0]); + TCGv_i32 dtlb = tcg_constant_i32(par[0]); gen_helper_itlb(cpu_env, arg[0].in, dtlb); - tcg_temp_free(dtlb); #endif } @@ -2047,11 +2046,10 @@ static void translate_ptlb(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { #ifndef CONFIG_USER_ONLY - TCGv_i32 dtlb = tcg_const_i32(par[0]); + TCGv_i32 dtlb = tcg_constant_i32(par[0]); tcg_gen_movi_i32(cpu_pc, dc->pc); gen_helper_ptlb(arg[0].out, cpu_env, arg[1].in, dtlb); - tcg_temp_free(dtlb); #endif } @@ -2250,10 +2248,9 @@ static void translate_rtlb(DisasContext *dc, const OpcodeArg arg[], gen_helper_rtlb0, gen_helper_rtlb1, }; - TCGv_i32 dtlb = tcg_const_i32(par[0]); + TCGv_i32 dtlb = tcg_constant_i32(par[0]); helper[par[1]](arg[0].out, cpu_env, arg[1].in, dtlb); - tcg_temp_free(dtlb); #endif } @@ -2561,10 +2558,9 @@ static void translate_wtlb(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { #ifndef CONFIG_USER_ONLY - TCGv_i32 dtlb = tcg_const_i32(par[0]); + TCGv_i32 dtlb = tcg_constant_i32(par[0]); gen_helper_wtlb(cpu_env, arg[0].in, arg[1].in, dtlb); - tcg_temp_free(dtlb); #endif } From patchwork Fri Apr 22 11:43:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12823357 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6FC0FC43217 for ; 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Fri, 22 Apr 2022 04:43:51 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:4c40:4238:b597:4c1a]) by smtp.gmail.com with ESMTPSA id d16-20020a056a00245000b004f7728a4346sm2706519pfj.79.2022.04.22.04.43.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 04:43:50 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH v2 5/7] target/xtensa: use tcg_constant_* for numbered special registers Date: Fri, 22 Apr 2022 04:43:30 -0700 Message-Id: <20220422114332.374472-6-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220422114332.374472-1-jcmvbkbc@gmail.com> References: <20220422114332.374472-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=jcmvbkbc@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Numbered special registers are small arrays of consecutive SRs. Use tcg_constant_* for the SR index. Reviewed-by: Richard Henderson Signed-off-by: Max Filippov --- target/xtensa/translate.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 245c5968bd5d..c51aea460160 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -2612,15 +2612,13 @@ static void translate_wsr_ccompare(DisasContext *dc, const OpcodeArg arg[], { #ifndef CONFIG_USER_ONLY uint32_t id = par[0] - CCOMPARE; - TCGv_i32 tmp = tcg_const_i32(id); assert(id < dc->config->nccompare); if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) { gen_io_start(); } tcg_gen_mov_i32(cpu_SR[par[0]], arg[0].in); - gen_helper_update_ccompare(cpu_env, tmp); - tcg_temp_free(tmp); + gen_helper_update_ccompare(cpu_env, tcg_constant_i32(id)); #endif } @@ -2640,11 +2638,9 @@ static void translate_wsr_dbreaka(DisasContext *dc, const OpcodeArg arg[], { #ifndef CONFIG_USER_ONLY unsigned id = par[0] - DBREAKA; - TCGv_i32 tmp = tcg_const_i32(id); assert(id < dc->config->ndbreak); - gen_helper_wsr_dbreaka(cpu_env, tmp, arg[0].in); - tcg_temp_free(tmp); + gen_helper_wsr_dbreaka(cpu_env, tcg_constant_i32(id), arg[0].in); #endif } @@ -2653,11 +2649,9 @@ static void translate_wsr_dbreakc(DisasContext *dc, const OpcodeArg arg[], { #ifndef CONFIG_USER_ONLY unsigned id = par[0] - DBREAKC; - TCGv_i32 tmp = tcg_const_i32(id); assert(id < dc->config->ndbreak); - gen_helper_wsr_dbreakc(cpu_env, tmp, arg[0].in); - tcg_temp_free(tmp); + gen_helper_wsr_dbreakc(cpu_env, tcg_constant_i32(id), arg[0].in); #endif } @@ -2666,11 +2660,9 @@ static void translate_wsr_ibreaka(DisasContext *dc, const OpcodeArg arg[], { #ifndef CONFIG_USER_ONLY unsigned id = par[0] - IBREAKA; - TCGv_i32 tmp = tcg_const_i32(id); assert(id < dc->config->nibreak); - gen_helper_wsr_ibreaka(cpu_env, tmp, arg[0].in); - tcg_temp_free(tmp); + gen_helper_wsr_ibreaka(cpu_env, tcg_constant_i32(id), arg[0].in); #endif } From patchwork Fri Apr 22 11:43:31 2022 Content-Type: text/plain; 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Fri, 22 Apr 2022 04:43:52 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:4c40:4238:b597:4c1a]) by smtp.gmail.com with ESMTPSA id d16-20020a056a00245000b004f7728a4346sm2706519pfj.79.2022.04.22.04.43.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Apr 2022 04:43:52 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH v2 6/7] target/xtensa: use tcg_constant_* for FPU conversion opcodes Date: Fri, 22 Apr 2022 04:43:31 -0700 Message-Id: <20220422114332.374472-7-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220422114332.374472-1-jcmvbkbc@gmail.com> References: <20220422114332.374472-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=jcmvbkbc@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" FPU conversion opcodes pass scale (range 0..15) and rounding mode to their helpers. Use tcg_constant_* for them. Reviewed-by: Richard Henderson Signed-off-by: Max Filippov --- target/xtensa/translate.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index c51aea460160..09fb3df40934 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -6512,20 +6512,19 @@ static void translate_const_s(DisasContext *dc, const OpcodeArg arg[], static void translate_float_d(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i32 scale = tcg_const_i32(-arg[2].imm); + TCGv_i32 scale = tcg_constant_i32(-arg[2].imm); if (par[0]) { gen_helper_uitof_d(arg[0].out, cpu_env, arg[1].in, scale); } else { gen_helper_itof_d(arg[0].out, cpu_env, arg[1].in, scale); } - tcg_temp_free(scale); } static void translate_float_s(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i32 scale = tcg_const_i32(-arg[2].imm); + TCGv_i32 scale = tcg_constant_i32(-arg[2].imm); OpcodeArg arg32[1]; get_f32_o1(arg, arg32, 0); @@ -6535,14 +6534,13 @@ static void translate_float_s(DisasContext *dc, const OpcodeArg arg[], gen_helper_itof_s(arg32[0].out, cpu_env, arg[1].in, scale); } put_f32_o1(arg, arg32, 0); - tcg_temp_free(scale); } static void translate_ftoi_d(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i32 rounding_mode = tcg_const_i32(par[0]); - TCGv_i32 scale = tcg_const_i32(arg[2].imm); + TCGv_i32 rounding_mode = tcg_constant_i32(par[0]); + TCGv_i32 scale = tcg_constant_i32(arg[2].imm); if (par[1]) { gen_helper_ftoui_d(arg[0].out, cpu_env, arg[1].in, @@ -6551,15 +6549,13 @@ static void translate_ftoi_d(DisasContext *dc, const OpcodeArg arg[], gen_helper_ftoi_d(arg[0].out, cpu_env, arg[1].in, rounding_mode, scale); } - tcg_temp_free(rounding_mode); - tcg_temp_free(scale); } static void translate_ftoi_s(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i32 rounding_mode = tcg_const_i32(par[0]); - TCGv_i32 scale = tcg_const_i32(arg[2].imm); + TCGv_i32 rounding_mode = tcg_constant_i32(par[0]); + TCGv_i32 scale = tcg_constant_i32(arg[2].imm); OpcodeArg arg32[2]; get_f32_i1(arg, arg32, 1); @@ -6571,8 +6567,6 @@ static void translate_ftoi_s(DisasContext *dc, const OpcodeArg arg[], rounding_mode, scale); } put_f32_i1(arg, arg32, 1); - tcg_temp_free(rounding_mode); - tcg_temp_free(scale); } static void translate_ldsti(DisasContext *dc, const OpcodeArg arg[], From patchwork Fri Apr 22 11:43:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12823377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53172C433EF for ; Fri, 22 Apr 2022 12:25:53 +0000 (UTC) Received: from localhost ([::1]:37604 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nhsMC-0003ui-Bv for qemu-devel@archiver.kernel.org; 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Fri, 22 Apr 2022 04:43:53 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH v2 7/7] target/xtensa: use tcg_constant_* for remaining opcodes Date: Fri, 22 Apr 2022 04:43:32 -0700 Message-Id: <20220422114332.374472-8-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220422114332.374472-1-jcmvbkbc@gmail.com> References: <20220422114332.374472-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=jcmvbkbc@gmail.com; helo=mail-pl1-x62a.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" - gen_jumpi passes target PC to the helper; - gen_callw_slot uses callinc (1..3); - gen_brcondi passes immediate field (less than 32 different possible values) to the helper; - disas_xtensa_insn passes PC to the helpers; - translate_entry passes PC, stack register number (0..15) and stack frame size to the helper; - gen_check_exclusive passes PC and boolean flag to the helper; - test_exceptions_retw passes PC to the helper; - gen_check_atomctl passes PC to the helper; - translate_ssai passes immediate shift amount (0..31) to the helper; - gen_waiti passes next PC and an immediate (0..15) to the helper; use tcg_constant_* for the constants listed above. Fold gen_waiti body into the translate_waiti as it's the only user. Signed-off-by: Max Filippov --- Changes v1->v2: - convert gen_jumpi, disas_xtensa_insn, test_exceptions_retw and gen_check_atomctl - use tcg_constant_* for PC target/xtensa/translate.c | 75 +++++++++++++-------------------------- 1 file changed, 24 insertions(+), 51 deletions(-) diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 09fb3df40934..9b3c5c0ca45e 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -396,19 +396,15 @@ static int adjust_jump_slot(DisasContext *dc, uint32_t dest, int slot) static void gen_jumpi(DisasContext *dc, uint32_t dest, int slot) { - TCGv_i32 tmp = tcg_const_i32(dest); - gen_jump_slot(dc, tmp, adjust_jump_slot(dc, dest, slot)); - tcg_temp_free(tmp); + gen_jump_slot(dc, tcg_constant_i32(dest), + adjust_jump_slot(dc, dest, slot)); } static void gen_callw_slot(DisasContext *dc, int callinc, TCGv_i32 dest, int slot) { - TCGv_i32 tcallinc = tcg_const_i32(callinc); - tcg_gen_deposit_i32(cpu_SR[PS], cpu_SR[PS], - tcallinc, PS_CALLINC_SHIFT, PS_CALLINC_LEN); - tcg_temp_free(tcallinc); + tcg_constant_i32(callinc), PS_CALLINC_SHIFT, PS_CALLINC_LEN); tcg_gen_movi_i32(cpu_R[callinc << 2], (callinc << 30) | (dc->base.pc_next & 0x3fffffff)); gen_jump_slot(dc, dest, slot); @@ -454,9 +450,7 @@ static void gen_brcond(DisasContext *dc, TCGCond cond, static void gen_brcondi(DisasContext *dc, TCGCond cond, TCGv_i32 t0, uint32_t t1, uint32_t addr) { - TCGv_i32 tmp = tcg_const_i32(t1); - gen_brcond(dc, cond, t0, tmp, addr); - tcg_temp_free(tmp); + gen_brcond(dc, cond, t0, tcg_constant_i32(t1), addr); } static uint32_t test_exceptions_sr(DisasContext *dc, const OpcodeArg arg[], @@ -541,21 +535,6 @@ static MemOp gen_load_store_alignment(DisasContext *dc, MemOp mop, return mop; } -#ifndef CONFIG_USER_ONLY -static void gen_waiti(DisasContext *dc, uint32_t imm4) -{ - TCGv_i32 pc = tcg_const_i32(dc->base.pc_next); - TCGv_i32 intlevel = tcg_const_i32(imm4); - - if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) { - gen_io_start(); - } - gen_helper_waiti(cpu_env, pc, intlevel); - tcg_temp_free(pc); - tcg_temp_free(intlevel); -} -#endif - static bool gen_window_check(DisasContext *dc, uint32_t mask) { unsigned r = 31 - clz32(mask); @@ -1070,17 +1049,15 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) } if (op_flags & XTENSA_OP_UNDERFLOW) { - TCGv_i32 tmp = tcg_const_i32(dc->pc); + TCGv_i32 pc = tcg_constant_i32(dc->pc); - gen_helper_test_underflow_retw(cpu_env, tmp); - tcg_temp_free(tmp); + gen_helper_test_underflow_retw(cpu_env, pc); } if (op_flags & XTENSA_OP_ALLOCA) { - TCGv_i32 tmp = tcg_const_i32(dc->pc); + TCGv_i32 pc = tcg_constant_i32(dc->pc); - gen_helper_movsp(cpu_env, tmp); - tcg_temp_free(tmp); + gen_helper_movsp(cpu_env, pc); } if (coprocessor && !gen_check_cpenable(dc, coprocessor)) { @@ -1659,13 +1636,10 @@ static uint32_t test_overflow_entry(DisasContext *dc, const OpcodeArg arg[], static void translate_entry(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i32 pc = tcg_const_i32(dc->pc); - TCGv_i32 s = tcg_const_i32(arg[0].imm); - TCGv_i32 imm = tcg_const_i32(arg[1].imm); + TCGv_i32 pc = tcg_constant_i32(dc->pc); + TCGv_i32 s = tcg_constant_i32(arg[0].imm); + TCGv_i32 imm = tcg_constant_i32(arg[1].imm); gen_helper_entry(cpu_env, pc, s, imm); - tcg_temp_free(imm); - tcg_temp_free(s); - tcg_temp_free(pc); } static void translate_extui(DisasContext *dc, const OpcodeArg arg[], @@ -1745,12 +1719,10 @@ static void gen_check_exclusive(DisasContext *dc, TCGv_i32 addr, bool is_write) static void gen_check_exclusive(DisasContext *dc, TCGv_i32 addr, bool is_write) { if (!option_enabled(dc, XTENSA_OPTION_MPU)) { - TCGv_i32 tpc = tcg_const_i32(dc->pc); - TCGv_i32 write = tcg_const_i32(is_write); + TCGv_i32 pc = tcg_constant_i32(dc->pc); - gen_helper_check_exclusive(cpu_env, tpc, addr, write); - tcg_temp_free(tpc); - tcg_temp_free(write); + gen_helper_check_exclusive(cpu_env, pc, addr, + tcg_constant_i32(is_write)); } } #endif @@ -2127,10 +2099,9 @@ static uint32_t test_exceptions_retw(DisasContext *dc, const OpcodeArg arg[], "Illegal retw instruction(pc = %08x)\n", dc->pc); return XTENSA_OP_ILL; } else { - TCGv_i32 tmp = tcg_const_i32(dc->pc); + TCGv_i32 pc = tcg_constant_i32(dc->pc); - gen_helper_test_ill_retw(cpu_env, tmp); - tcg_temp_free(tmp); + gen_helper_test_ill_retw(cpu_env, pc); return 0; } } @@ -2290,10 +2261,9 @@ static void gen_check_atomctl(DisasContext *dc, TCGv_i32 addr) #else static void gen_check_atomctl(DisasContext *dc, TCGv_i32 addr) { - TCGv_i32 tpc = tcg_const_i32(dc->pc); + TCGv_i32 pc = tcg_constant_i32(dc->pc); gen_helper_check_atomctl(cpu_env, tpc, addr); - tcg_temp_free(tpc); } #endif @@ -2514,9 +2484,7 @@ static void translate_ssa8l(DisasContext *dc, const OpcodeArg arg[], static void translate_ssai(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { - TCGv_i32 tmp = tcg_const_i32(arg[0].imm); - gen_right_shift_sar(dc, tmp); - tcg_temp_free(tmp); + gen_right_shift_sar(dc, tcg_constant_i32(arg[0].imm)); } static void translate_ssl(DisasContext *dc, const OpcodeArg arg[], @@ -2550,7 +2518,12 @@ static void translate_waiti(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { #ifndef CONFIG_USER_ONLY - gen_waiti(dc, arg[0].imm); + TCGv_i32 pc = tcg_constant_i32(dc->base.pc_next); + + if (tb_cflags(dc->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + } + gen_helper_waiti(cpu_env, pc, tcg_constant_i32(arg[0].imm)); #endif }