From patchwork Wed Apr 27 17:21:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12829256 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69473C433F5 for ; Wed, 27 Apr 2022 17:23:58 +0000 (UTC) Received: from localhost ([::1]:40456 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1njlOP-0000eE-D8 for qemu-devel@archiver.kernel.org; Wed, 27 Apr 2022 13:23:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40336) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1njlMS-00062m-Ng for qemu-devel@nongnu.org; Wed, 27 Apr 2022 13:21:58 -0400 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]:35742) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1njlMQ-00017U-DS for qemu-devel@nongnu.org; Wed, 27 Apr 2022 13:21:55 -0400 Received: by mail-pl1-x630.google.com with SMTP id d15so2147425plh.2 for ; Wed, 27 Apr 2022 10:21:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BFaN1P/7/9R9Y3CXttZnq3vfdYDfWFapHBP4E9iurPA=; b=avQ2GX/qP2sOGTv/o7tBCjt8ATRfsMsKdAfpavhY4bBtQIOChMS5g9MB002lJSzdYl Z83VPeE2JVQuFnHvOvFN/2ST2hkjjdxhh0lifbInZXRZVQGLzWeOoNNShCIT8r1BLF7t 5MLjqMzLbH292r42UTxCdxVi2uSBIINrgF0VfNqlgZ6bhcVfTg36KYBHgE/Y+fWPS3WJ M04KNw0adR0pTxJHr+n6UUVD6xPYuk6KzO1lTzDA9wRNTmn//yCfAJohjNFt1xj3jEU0 dkn4yj0MdfEDd4uhZLx+7R9dtUf75GMMCgTe4Cm6157qlP7GtX9+vsptkod4wHLnazaA IpIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BFaN1P/7/9R9Y3CXttZnq3vfdYDfWFapHBP4E9iurPA=; b=FQpftWEDjlCGhsRuft37ZE9xRlG/+FuHmffjqvim8cipVWkwk/HNhGwn75Q2fBkhuO qoKGyFYXl0tCA/z8hZ1yKHey+l2lviGVgPAdzRiVag++jxFijAWSePC+sdXVSlU/7VT1 JDshY0vF9Igcxd4SDmam61d0MPaxapwUdCvo2VrKs0BI6Z1Gobdp/ltlzXgFwSluFCWB OIMNzkfcuYLjNL+yRZcYrUacKbP3fEAXLUBIl2b/3a/lH+TT7tgZKr9C53pMr2aFWWeV aglUTwo4iqRUjNwRh8OVd5EiphIB/qD042AWhElCeAxcYd04o6A6wjWdurzx9jb7z6BQ P40g== X-Gm-Message-State: AOAM530HrU9N2rA8F+WL7g2v+y6WqbocbXHYXw4qSfqYv9Uu6asOffe6 0xsCO/C+C7Cz6lG308O1d0QUdAw5UfI= X-Google-Smtp-Source: ABdhPJzzKYjDc4JHM2M0/7oM9Kh/ih4bQY4vYCvLrEYV5lbrVHH4uL7UR29TI4ckZ50XDlx5j8CcrQ== X-Received: by 2002:a17:90b:1c88:b0:1b8:a77e:c9cb with SMTP id oo8-20020a17090b1c8800b001b8a77ec9cbmr44681443pjb.205.1651080112411; Wed, 27 Apr 2022 10:21:52 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:76e8:b785:3fb9:b6d6]) by smtp.gmail.com with ESMTPSA id f16-20020a056a00239000b004fa7103e13csm21202124pfc.41.2022.04.27.10.21.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 10:21:51 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH 1/7] tests/tcg/xtensa: fix build for cores without windowed registers Date: Wed, 27 Apr 2022 10:21:34 -0700 Message-Id: <20220427172140.1406059-2-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220427172140.1406059-1-jcmvbkbc@gmail.com> References: <20220427172140.1406059-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=jcmvbkbc@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Don't try to initialize windowbase/windowstart in crt.S if they don't exist. Signed-off-by: Max Filippov --- tests/tcg/xtensa/crt.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/tcg/xtensa/crt.S b/tests/tcg/xtensa/crt.S index d9846acace90..909872cd3853 100644 --- a/tests/tcg/xtensa/crt.S +++ b/tests/tcg/xtensa/crt.S @@ -8,10 +8,12 @@ .text .global _start _start: +#if XCHAL_HAVE_WINDOWED movi a2, 1 wsr a2, windowstart movi a2, 0 wsr a2, windowbase +#endif movi a1, _fstack movi a2, 0x4000f wsr a2, ps From patchwork Wed Apr 27 17:21:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12829257 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B992FC433F5 for ; Wed, 27 Apr 2022 17:27:07 +0000 (UTC) Received: from localhost ([::1]:48230 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1njlRS-00061T-PD for qemu-devel@archiver.kernel.org; Wed, 27 Apr 2022 13:27:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40376) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1njlMW-00063K-T1 for qemu-devel@nongnu.org; Wed, 27 Apr 2022 13:22:03 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]:41615) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1njlMS-00017a-AW for qemu-devel@nongnu.org; Wed, 27 Apr 2022 13:22:00 -0400 Received: by mail-pg1-x532.google.com with SMTP id t13so1952041pgn.8 for ; Wed, 27 Apr 2022 10:21:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bGdf3FwOGjWRTyOF5PKxGS+BnP/iTZPo4BrF0TVWr5A=; b=VkZrifBSo/XyOq/wmUzuOuZ1sehJih060Ryc+mtVZq2MpJ/7zU7laN+36XL6OfH/oF F0f/CU1bDR4heSmk1s/24p6e0KgmMNIpX0Zour2rcvvQ8VQyUZryNKiMFm9APeOEl7eW 56nojGSeCb/HvHubU4Xi28uEUxAYOZcst8cGJnonMpOkFSbaM6oxVGRtnl3gD+2vPeQj nE8BTutY2rE9pFsKZgkUclRPQz0rrSWHUtREZEBXtBNzyWdp0G/EqzplFbz1p3uF4EaI 1Kd7hr4OOEAk42vqNjYs4uGUXNYi2/eYKMLN0jmdJFJFf7aghiTjGktRs9MV8NjxJKfC cefw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bGdf3FwOGjWRTyOF5PKxGS+BnP/iTZPo4BrF0TVWr5A=; b=YQGiJTHQ3m9sWH7CmdqWmlO/BAaXn6B+9AsuJEbeG6Wp/YiyhNcKj3Taie1CnCF/ev Jp3/nUoYg0jDSYfgzmMAGzVdsjSzJCkhyn4qJVu5RsDgYxAj0/HcwRR/r/FIEM1u3v5D 2Z9ytALTZST9afVY6dsPZwJiR8CtaL+bRaYH3FlcJ2ib7BJsqL2PUB0SryLwCRhAnJ+z 4tuhBs7rkxCFPdboVfW3ar37it0WDI9Nsm2Cv6I47GhbAHa02n8KmgnVMFommZwFFU9P NXJAMmL2GO8YmT8gvL8wkoHg551T1AoUtC/L3fna1Q9vOShMFN7THVy42fJmJfIvvEHe eg9w== X-Gm-Message-State: AOAM532CcF/RzJNKFWR/ZnzCTxBATw2AjgZcubN+PHzduE/qV0myV01Y H4N/xtCqUhr8OUqCJvFwGUhu5a7tqL0= X-Google-Smtp-Source: ABdhPJw2eBk4M8aTbyEByPfHrUtAPF/OcDuTpceKkk2ha9I4e3mjMEjCA0s6BDL3p0aVcK0CB4Waxg== X-Received: by 2002:a65:604b:0:b0:398:ebeb:ad8f with SMTP id a11-20020a65604b000000b00398ebebad8fmr25366548pgp.89.1651080113805; Wed, 27 Apr 2022 10:21:53 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:76e8:b785:3fb9:b6d6]) by smtp.gmail.com with ESMTPSA id f16-20020a056a00239000b004fa7103e13csm21202124pfc.41.2022.04.27.10.21.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 10:21:53 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH 2/7] tests/tcg/xtensa: restore vecbase SR after test Date: Wed, 27 Apr 2022 10:21:35 -0700 Message-Id: <20220427172140.1406059-3-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220427172140.1406059-1-jcmvbkbc@gmail.com> References: <20220427172140.1406059-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=jcmvbkbc@gmail.com; helo=mail-pg1-x532.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Writing garbage into the vecbase SR results in hang in the subsequent tests that expect to raise an exception. Restore vecbase SR to its reset value after the test. Signed-off-by: Max Filippov --- tests/tcg/xtensa/test_sr.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/tcg/xtensa/test_sr.S b/tests/tcg/xtensa/test_sr.S index b1a91a0637ee..34441c7afff7 100644 --- a/tests/tcg/xtensa/test_sr.S +++ b/tests/tcg/xtensa/test_sr.S @@ -221,6 +221,8 @@ test_sr_mask /*scompare1*/12, 0, 0 #if XCHAL_HAVE_VECBASE test_sr vecbase, 1 +movi a2, XCHAL_VECBASE_RESET_VADDR +wsr a2, vecbase #else test_sr_mask /*vecbase*/231, 0, 0 #endif From patchwork Wed Apr 27 17:21:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12829254 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B546FC433EF for ; Wed, 27 Apr 2022 17:23:53 +0000 (UTC) Received: from localhost ([::1]:40126 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1njlOK-0000Qa-Lx for qemu-devel@archiver.kernel.org; Wed, 27 Apr 2022 13:23:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40362) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1njlMU-00063C-It for qemu-devel@nongnu.org; Wed, 27 Apr 2022 13:22:00 -0400 Received: from mail-pg1-x536.google.com ([2607:f8b0:4864:20::536]:33292) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1njlMS-00017i-Vq for qemu-devel@nongnu.org; Wed, 27 Apr 2022 13:21:58 -0400 Received: by mail-pg1-x536.google.com with SMTP id k14so1996195pga.0 for ; Wed, 27 Apr 2022 10:21:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Mz2/9eV0IoghSDMPYEyso5gtPhOCnLD/4wgUqk1RGY8=; b=cbQ6iqPsNB9xpp7yky/LieKx97cePwJc79UjjBZdG2WTqoPlyOW5VZQLJXaZpun2bI aCM27Tpdusuz6DRtnXoCVnjCV4o0DjTbdLmTT4zd5JuEiHdMzbsiSEgNgHOaafyXZoaA vDfBlwA5nRRGRuXgUfBfCSeM5VIhlX3UvwBBC+Ff47xOj1l+QBK/6HFA/7sTm2gk6WLG njZR9giDwPOdp4FjIiBqi/WpgRP1eqWunz51BE8t4Y2gU/DqJRqWO0T+UTWzBoxbzewb RBuAqrSQjG8HpwfQHAh5GwNGBuZt0K3v0OYmFg2LGLZ/bf6Ho6v1k66cnzJVN8/QveJ4 ByAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Mz2/9eV0IoghSDMPYEyso5gtPhOCnLD/4wgUqk1RGY8=; b=A/+Uu29pF+AqTg7jRJ6nowsAKyD1SE7U+nJdRsW4JE+MTmiCQjIDHpcI3VrvBGw89x 7fME0IAZoYjg5Rjs/eEQLMvhscfujpGK3dbodozuMHAdPSoS0cYIId8K6T7L3BTaoVBj 0lL9XQpoiYv8hXtRRQfaRMO5ku2ISapqyqnnikFjBmeTUio6o2N3h10btSiGFld4GZE7 G4aA0WQhY7jsSEr1XOfwI0bQ2mVfpEEiEcQyjaXTa0i7ziFEyhaKhb+QraAp0ZewRRYN k0mwLFtUsVEZd4YFbAH2Axq0lLoKa6qes0p7qT5XN2eUGfV2akN3fvEeowbFTB4UaTIG 3XCw== X-Gm-Message-State: AOAM530cDCNm7Fk5a4oCqGxTUqcHmpJCq3cdMDMV6D8dGw5exw2XL+Jk sKQfc2ClQuB9r0pqo45/s/8QBjRtdjw= X-Google-Smtp-Source: ABdhPJzUktSGOuKwryAmx/RY227cI+8UxHdNGvYsIFQe3t8QvKpoatAixd9x+3umTtLWEMPD/wmkXQ== X-Received: by 2002:a65:524b:0:b0:383:1b87:2d21 with SMTP id q11-20020a65524b000000b003831b872d21mr24737101pgp.482.1651080115153; Wed, 27 Apr 2022 10:21:55 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:76e8:b785:3fb9:b6d6]) by smtp.gmail.com with ESMTPSA id f16-20020a056a00239000b004fa7103e13csm21202124pfc.41.2022.04.27.10.21.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 10:21:54 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH 3/7] tests/tcg/xtensa: fix watchpoint test Date: Wed, 27 Apr 2022 10:21:36 -0700 Message-Id: <20220427172140.1406059-4-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220427172140.1406059-1-jcmvbkbc@gmail.com> References: <20220427172140.1406059-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=jcmvbkbc@gmail.com; helo=mail-pg1-x536.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" xtensa core may have only one set of DBREAKA/DBREAKC registers. Don't hardcode register numbers in the test as 0 and 1, use macros that only index valid DBREAK* registers. Signed-off-by: Max Filippov --- tests/tcg/xtensa/test_break.S | 86 +++++++++++++++++++---------------- 1 file changed, 46 insertions(+), 40 deletions(-) diff --git a/tests/tcg/xtensa/test_break.S b/tests/tcg/xtensa/test_break.S index 3379a3f9f06e..3aa18b5cec3f 100644 --- a/tests/tcg/xtensa/test_break.S +++ b/tests/tcg/xtensa/test_break.S @@ -200,64 +200,70 @@ test_end .endm #if XCHAL_NUM_DBREAK +#define DB0 0 +#if XCHAL_NUM_DBREAK > 1 +#define DB1 1 +#else +#define DB1 0 +#endif test dbreak_exact - dbreak_test 0, 0x4000003f, 0xd000007f, 0xd000007f, l8ui - dbreak_test 1, 0x4000003e, 0xd000007e, 0xd000007e, l16ui - dbreak_test 0, 0x4000003c, 0xd000007c, 0xd000007c, l32i + dbreak_test DB0, 0x4000003f, 0xd000007f, 0xd000007f, l8ui + dbreak_test DB1, 0x4000003e, 0xd000007e, 0xd000007e, l16ui + dbreak_test DB0, 0x4000003c, 0xd000007c, 0xd000007c, l32i - dbreak_test 1, 0x8000003f, 0xd000007f, 0xd000007f, s8i - dbreak_test 0, 0x8000003e, 0xd000007e, 0xd000007e, s16i - dbreak_test 1, 0x8000003c, 0xd000007c, 0xd000007c, s32i + dbreak_test DB1, 0x8000003f, 0xd000007f, 0xd000007f, s8i + dbreak_test DB0, 0x8000003e, 0xd000007e, 0xd000007e, s16i + dbreak_test DB1, 0x8000003c, 0xd000007c, 0xd000007c, s32i test_end -test dbreak_overlap - dbreak_test 0, 0x4000003f, 0xd000007d, 0xd000007c, l16ui - dbreak_test 1, 0x4000003f, 0xd000007d, 0xd000007c, l32i +test DBdbreak_overlap + dbreak_test DB0, 0x4000003f, 0xd000007d, 0xd000007c, l16ui + dbreak_test DB1, 0x4000003f, 0xd000007d, 0xd000007c, l32i - dbreak_test 0, 0x4000003e, 0xd000007e, 0xd000007f, l8ui - dbreak_test 1, 0x4000003e, 0xd000007e, 0xd000007c, l32i + dbreak_test DB0, 0x4000003e, 0xd000007e, 0xd000007f, l8ui + dbreak_test DB1, 0x4000003e, 0xd000007e, 0xd000007c, l32i - dbreak_test 0, 0x4000003c, 0xd000007c, 0xd000007d, l8ui - dbreak_test 1, 0x4000003c, 0xd000007c, 0xd000007c, l16ui + dbreak_test DB0, 0x4000003c, 0xd000007c, 0xd000007d, l8ui + dbreak_test DB1, 0x4000003c, 0xd000007c, 0xd000007c, l16ui - dbreak_test 0, 0x40000038, 0xd0000078, 0xd000007b, l8ui - dbreak_test 1, 0x40000038, 0xd0000078, 0xd000007a, l16ui - dbreak_test 0, 0x40000038, 0xd0000078, 0xd000007c, l32i + dbreak_test DB0, 0x40000038, 0xd0000078, 0xd000007b, l8ui + dbreak_test DB1, 0x40000038, 0xd0000078, 0xd000007a, l16ui + dbreak_test DB0, 0x40000038, 0xd0000078, 0xd000007c, l32i - dbreak_test 1, 0x40000030, 0xd0000070, 0xd0000075, l8ui - dbreak_test 0, 0x40000030, 0xd0000070, 0xd0000076, l16ui - dbreak_test 1, 0x40000030, 0xd0000070, 0xd0000078, l32i + dbreak_test DB1, 0x40000030, 0xd0000070, 0xd0000075, l8ui + dbreak_test DB0, 0x40000030, 0xd0000070, 0xd0000076, l16ui + dbreak_test DB1, 0x40000030, 0xd0000070, 0xd0000078, l32i - dbreak_test 0, 0x40000020, 0xd0000060, 0xd000006f, l8ui - dbreak_test 1, 0x40000020, 0xd0000060, 0xd0000070, l16ui - dbreak_test 0, 0x40000020, 0xd0000060, 0xd0000074, l32i + dbreak_test DB0, 0x40000020, 0xd0000060, 0xd000006f, l8ui + dbreak_test DB1, 0x40000020, 0xd0000060, 0xd0000070, l16ui + dbreak_test DB0, 0x40000020, 0xd0000060, 0xd0000074, l32i - dbreak_test 0, 0x8000003f, 0xd000007d, 0xd000007c, s16i - dbreak_test 1, 0x8000003f, 0xd000007d, 0xd000007c, s32i + dbreak_test DB0, 0x8000003f, 0xd000007d, 0xd000007c, s16i + dbreak_test DB1, 0x8000003f, 0xd000007d, 0xd000007c, s32i - dbreak_test 0, 0x8000003e, 0xd000007e, 0xd000007f, s8i - dbreak_test 1, 0x8000003e, 0xd000007e, 0xd000007c, s32i + dbreak_test DB0, 0x8000003e, 0xd000007e, 0xd000007f, s8i + dbreak_test DB1, 0x8000003e, 0xd000007e, 0xd000007c, s32i - dbreak_test 0, 0x8000003c, 0xd000007c, 0xd000007d, s8i - dbreak_test 1, 0x8000003c, 0xd000007c, 0xd000007c, s16i + dbreak_test DB0, 0x8000003c, 0xd000007c, 0xd000007d, s8i + dbreak_test DB1, 0x8000003c, 0xd000007c, 0xd000007c, s16i - dbreak_test 0, 0x80000038, 0xd0000078, 0xd000007b, s8i - dbreak_test 1, 0x80000038, 0xd0000078, 0xd000007a, s16i - dbreak_test 0, 0x80000038, 0xd0000078, 0xd000007c, s32i + dbreak_test DB0, 0x80000038, 0xd0000078, 0xd000007b, s8i + dbreak_test DB1, 0x80000038, 0xd0000078, 0xd000007a, s16i + dbreak_test DB0, 0x80000038, 0xd0000078, 0xd000007c, s32i - dbreak_test 1, 0x80000030, 0xd0000070, 0xd0000075, s8i - dbreak_test 0, 0x80000030, 0xd0000070, 0xd0000076, s16i - dbreak_test 1, 0x80000030, 0xd0000070, 0xd0000078, s32i + dbreak_test DB1, 0x80000030, 0xd0000070, 0xd0000075, s8i + dbreak_test DB0, 0x80000030, 0xd0000070, 0xd0000076, s16i + dbreak_test DB1, 0x80000030, 0xd0000070, 0xd0000078, s32i - dbreak_test 0, 0x80000020, 0xd0000060, 0xd000006f, s8i - dbreak_test 1, 0x80000020, 0xd0000060, 0xd0000070, s16i - dbreak_test 0, 0x80000020, 0xd0000060, 0xd0000074, s32i + dbreak_test DB0, 0x80000020, 0xd0000060, 0xd000006f, s8i + dbreak_test DB1, 0x80000020, 0xd0000060, 0xd0000070, s16i + dbreak_test DB0, 0x80000020, 0xd0000060, 0xd0000074, s32i test_end -test dbreak_invalid - dbreak_test 0, 0x40000030, 0xd0000071, 0xd0000070, l16ui - dbreak_test 1, 0x40000035, 0xd0000072, 0xd0000070, l32i +test DBdbreak_invalid + dbreak_test DB0, 0x40000030, 0xd0000071, 0xd0000070, l16ui + dbreak_test DB1, 0x40000035, 0xd0000072, 0xd0000070, l32i test_end #endif From patchwork Wed Apr 27 17:21:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12829253 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EEC5EC433F5 for ; Wed, 27 Apr 2022 17:23:52 +0000 (UTC) Received: from localhost ([::1]:40026 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1njlOJ-0000Mb-Nz for qemu-devel@archiver.kernel.org; Wed, 27 Apr 2022 13:23:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40412) by lists.gnu.org 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X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" xtensa core may not have the loop option, but still have timers. Don't use loop opcode in the timer test. Signed-off-by: Max Filippov --- tests/tcg/xtensa/test_timer.S | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/tests/tcg/xtensa/test_timer.S b/tests/tcg/xtensa/test_timer.S index 1ec8e20883ff..2a383e77190e 100644 --- a/tests/tcg/xtensa/test_timer.S +++ b/tests/tcg/xtensa/test_timer.S @@ -115,9 +115,9 @@ test ccompare0_interrupt movi a2, 1 << XCHAL_TIMER0_INTERRUPT wsr a2, intenable rsil a2, 0 - loop a3, 1f - nop 1: + addi a3, a3, -1 + bnez a3, 1b test_fail 2: rsr a2, exccause @@ -148,9 +148,9 @@ test ccompare1_interrupt movi a2, 1 << XCHAL_TIMER1_INTERRUPT wsr a2, intenable rsil a2, INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT) - 1 - loop a3, 1f - nop 1: + addi a3, a3, -1 + bnez a3, 1b test_fail 2: test_end @@ -177,9 +177,9 @@ test ccompare2_interrupt movi a2, 1 << XCHAL_TIMER2_INTERRUPT wsr a2, intenable rsil a2, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) - 1 - loop a3, 1f - nop 1: + addi a3, a3, -1 + bnez a3, 1b test_fail 2: test_end @@ -197,7 +197,7 @@ test ccompare_interrupt_masked wsr a2, ccompare2 #endif - movi a3, 2 * WAIT_LOOPS + movi a3, WAIT_LOOPS make_ccount_delta a2, a15 #if XCHAL_NUM_TIMERS > 1 wsr a2, ccompare1 @@ -211,9 +211,10 @@ test ccompare_interrupt_masked movi a2, 1 << XCHAL_TIMER0_INTERRUPT wsr a2, intenable rsil a2, 0 - loop a3, 1f - nop 1: + addi a3, a3, -1 + bnez a3, 1b + test_fail 2: rsr a2, exccause @@ -231,7 +232,6 @@ test ccompare_interrupt_masked_waiti wsr a2, ccompare2 #endif - movi a3, 2 * WAIT_LOOPS make_ccount_delta a2, a15 #if XCHAL_NUM_TIMERS > 1 wsr a2, ccompare1 From patchwork Wed Apr 27 17:21:38 2022 Content-Type: text/plain; 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Wed, 27 Apr 2022 10:21:57 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:76e8:b785:3fb9:b6d6]) by smtp.gmail.com with ESMTPSA id f16-20020a056a00239000b004fa7103e13csm21202124pfc.41.2022.04.27.10.21.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 10:21:57 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH 5/7] tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3 Date: Wed, 27 Apr 2022 10:21:38 -0700 Message-Id: <20220427172140.1406059-6-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220427172140.1406059-1-jcmvbkbc@gmail.com> References: <20220427172140.1406059-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=jcmvbkbc@gmail.com; helo=mail-pg1-x536.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Autorefill tests in the phys_mem test suite are disabled for cores that have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it invalidate TLB mappings for entries that conflict with the test. Signed-off-by: Max Filippov --- tests/tcg/xtensa/test_phys_mem.S | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/tests/tcg/xtensa/test_phys_mem.S b/tests/tcg/xtensa/test_phys_mem.S index 9bb3ee3866ed..f935a702945c 100644 --- a/tests/tcg/xtensa/test_phys_mem.S +++ b/tests/tcg/xtensa/test_phys_mem.S @@ -2,7 +2,7 @@ test_suite phys_mem -#if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY +#if XCHAL_HAVE_PTP_MMU .purgem test_init @@ -13,6 +13,14 @@ test_suite phys_mem witlb a2, a3 movi a2, 0xc0000000 wsr a2, ptevaddr +#if XCHAL_HAVE_SPANNING_WAY + movi a2, 0xc0000000 | XCHAL_SPANNING_WAY + idtlb a2 + iitlb a2 + movi a2, 0x20000000 | XCHAL_SPANNING_WAY + idtlb a2 + iitlb a2 +#endif .endm test inst_fetch_get_pte_no_phys From patchwork Wed Apr 27 17:21:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12829265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B926C433EF for ; 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Wed, 27 Apr 2022 10:21:59 -0700 (PDT) Received: from octofox.hsd1.ca.comcast.net ([2601:641:401:1d20:76e8:b785:3fb9:b6d6]) by smtp.gmail.com with ESMTPSA id f16-20020a056a00239000b004fa7103e13csm21202124pfc.41.2022.04.27.10.21.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 10:21:58 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Subject: [PATCH 6/7] tests/tcg/xtensa: enable mmu tests for MMUv3 Date: Wed, 27 Apr 2022 10:21:39 -0700 Message-Id: <20220427172140.1406059-7-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220427172140.1406059-1-jcmvbkbc@gmail.com> References: <20220427172140.1406059-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=jcmvbkbc@gmail.com; helo=mail-pl1-x635.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" MMU test suite is disabled for cores that have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it make testing region virtual addresses explicit and invalidate TLB mappings for entries that conflict with the test. Signed-off-by: Max Filippov --- tests/tcg/xtensa/test_mmu.S | 182 ++++++++++++++++++++---------------- 1 file changed, 103 insertions(+), 79 deletions(-) diff --git a/tests/tcg/xtensa/test_mmu.S b/tests/tcg/xtensa/test_mmu.S index 4cbd6ef4f9d8..1006c8cf77b2 100644 --- a/tests/tcg/xtensa/test_mmu.S +++ b/tests/tcg/xtensa/test_mmu.S @@ -2,7 +2,9 @@ test_suite mmu -#if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY +#if XCHAL_HAVE_PTP_MMU +#define BASE 0x20000000 +#define TLB_BASE 0x80000000 .purgem test_init @@ -29,17 +31,27 @@ test_suite mmu idtlb a2 movi a2, 0x00000009 idtlb a2 +#if XCHAL_HAVE_SPANNING_WAY + movi a2, BASE | XCHAL_SPANNING_WAY + idtlb a2 + iitlb a2 + movi a2, TLB_BASE | XCHAL_SPANNING_WAY + idtlb a2 + iitlb a2 + movi a2, TLB_BASE + wsr a2, ptevaddr +#endif .endm test tlb_group movi a2, 0x04000002 /* PPN */ - movi a3, 0x01200004 /* VPN */ + movi a3, BASE + 0x01200004 /* VPN */ wdtlb a2, a3 witlb a2, a3 movi a3, 0x00200004 rdtlb0 a1, a3 ritlb0 a2, a3 - movi a3, 0x01000001 + movi a3, BASE + 0x01000001 assert eq, a1, a3 assert eq, a2, a3 movi a3, 0x00200004 @@ -48,17 +60,17 @@ test tlb_group movi a3, 0x04000002 assert eq, a1, a3 assert eq, a2, a3 - movi a3, 0x01234567 + movi a3, BASE + 0x01234567 pdtlb a1, a3 pitlb a2, a3 - movi a3, 0x01234014 + movi a3, BASE + 0x01234014 assert eq, a1, a3 - movi a3, 0x0123400c + movi a3, BASE + 0x0123400c assert eq, a2, a3 movi a3, 0x00200004 idtlb a3 iitlb a3 - movi a3, 0x01234567 + movi a3, BASE + 0x01234567 pdtlb a1, a3 pitlb a2, a3 movi a3, 0x00000010 @@ -72,7 +84,7 @@ test_end test itlb_miss set_vector kernel, 1f - movi a3, 0x00100000 + movi a3, BASE + 0x00100000 jx a3 test_fail 1: @@ -86,7 +98,7 @@ test_end test dtlb_miss set_vector kernel, 1f - movi a3, 0x00100000 + movi a3, BASE + 0x00100000 l8ui a2, a3, 0 test_fail 1: @@ -116,11 +128,11 @@ test dtlb_multi_hit set_vector kernel, 1f movi a2, 0x04000002 /* PPN */ - movi a3, 0x01200004 /* VPN */ + movi a3, BASE + 0x01200004 /* VPN */ wdtlb a2, a3 - movi a3, 0x01200007 /* VPN */ + movi a3, BASE + 0x01200007 /* VPN */ wdtlb a2, a3 - movi a3, 0x01200000 + movi a3, BASE + 0x01200000 pdtlb a2, a3 test_fail 1: @@ -168,15 +180,18 @@ test load_store_privilege and a3, a3, a1 movi a1, 4 or a3, a3, a1 + movi a5, BASE + add a3, a3, a5 witlb a2, a3 movi a3, 10f movi a1, 0x000fffff and a1, a3, a1 + add a1, a1, a5 movi a2, 0x04000003 /* PPN */ - movi a3, 0x01200004 /* VPN */ + movi a3, BASE + 0x01200004 /* VPN */ wdtlb a2, a3 - movi a3, 0x01200001 + movi a3, BASE + 0x01200001 movi a2, 0x4004f jx a1 10: @@ -192,6 +207,7 @@ test load_store_privilege movi a3, 1b movi a1, 0x000fffff and a3, a3, a1 + add a3, a3, a5 assert eq, a2, a3 rsr a2, exccause movi a3, 26 @@ -206,9 +222,9 @@ test cring_load_store_privilege set_vector double, 2f movi a2, 0x04000003 /* PPN */ - movi a3, 0x01200004 /* VPN */ + movi a3, BASE + 0x01200004 /* VPN */ wdtlb a2, a3 - movi a3, 0x01200004 + movi a3, BASE + 0x01200004 movi a2, 0x4005f /* ring 1 + excm => cring == 0 */ wsr a2, ps isync @@ -245,10 +261,13 @@ test inst_fetch_prohibited and a3, a3, a1 movi a1, 4 or a3, a3, a1 + movi a5, BASE + add a3, a3, a5 witlb a2, a3 movi a3, 10f movi a1, 0x000fffff and a1, a3, a1 + add a1, a1, a5 jx a1 .align 4 10: @@ -268,9 +287,9 @@ test load_prohibited set_vector kernel, 2f movi a2, 0x0400000c /* PPN */ - movi a3, 0x01200004 /* VPN */ + movi a3, BASE + 0x01200004 /* VPN */ wdtlb a2, a3 - movi a3, 0x01200002 + movi a3, BASE + 0x01200002 1: l8ui a2, a3, 0 test_fail @@ -289,9 +308,9 @@ test store_prohibited set_vector kernel, 2f movi a2, 0x04000001 /* PPN */ - movi a3, 0x01200004 /* VPN */ + movi a3, BASE + 0x01200004 /* VPN */ wdtlb a2, a3 - movi a3, 0x01200003 + movi a3, BASE + 0x01200003 l8ui a2, a3, 0 1: s8i a2, a3, 0 @@ -311,10 +330,10 @@ test_end * and DTLB way 7 to cover this PTE, ring=pt_ring, attr=pt_attr */ .macro pt_setup pt_ring, pt_attr, pte_ring, vaddr, paddr, pte_attr - movi a2, 0x80000000 + movi a2, TLB_BASE wsr a2, ptevaddr - movi a3, 0x80000007 | (((\vaddr) >> 10) & 0xfffff000) /* way 7 */ + movi a3, TLB_BASE | 7 | (((\vaddr) >> 10) & 0xfffff000) /* way 7 */ movi a4, 0x04000003 | ((\pt_ring) << 4) /* PADDR 64M */ wdtlb a4, a3 isync @@ -324,7 +343,7 @@ test_end add a2, a1, a2 s32i a3, a2, 0 - movi a3, 0x80000007 | (((\vaddr) >> 10) & 0xfffff000) /* way 7 */ + movi a3, TLB_BASE | 7 | (((\vaddr) >> 10) & 0xfffff000) /* way 7 */ movi a4, 0x04000000 | ((\pt_ring) << 4) | (\pt_attr) /* PADDR 64M */ wdtlb a4, a3 isync @@ -343,10 +362,13 @@ test_end and a3, a3, a1 movi a1, 4 or a3, a3, a1 + movi a5, BASE + add a3, a3, a5 witlb a2, a3 movi a3, 10f movi a1, 0x000fffff and a1, a3, a1 + add a1, a1, a5 movi a2, 0 wsr a2, excvaddr @@ -396,6 +418,8 @@ test_end movi a2, (\vaddr) movi a1, 0xfffff and a1, a1, a2 + movi a5, BASE + add a1, a1, a5 rsr a2, epc1 assert eq, a1, a2 .endm @@ -403,7 +427,7 @@ test_end test dtlb_autoload set_vector kernel, 0 - pt_setup 0, 3, 1, 0x1000, 0x1000, 3 + pt_setup 0, 3, 1, BASE + 0x1000, 0x1000, 3 assert_no_auto_tlb l8ui a1, a3, 0 @@ -418,8 +442,8 @@ test autoload_load_store_privilege set_vector kernel, 0 set_vector double, 2f - pt_setup 0, 3, 0, 0x2000, 0x2000, 3 - movi a3, 0x2004 + pt_setup 0, 3, 0, BASE + 0x2000, 0x2000, 3 + movi a3, BASE + 0x2004 assert_no_auto_tlb movi a2, 0x4005f /* ring 1 + excm => cring == 0 */ @@ -441,7 +465,7 @@ test_end test autoload_pte_load_prohibited set_vector kernel, 2f - pt_setup 0, 3, 0, 0x3000, 0, 0xc + pt_setup 0, 3, 0, BASE + 0x3000, 0, 0xc assert_no_auto_tlb 1: l32i a2, a3, 0 @@ -458,7 +482,7 @@ test_end test autoload_pt_load_prohibited set_vector kernel, 2f - pt_setup 0, 0xc, 0, 0x4000, 0x4000, 3 + pt_setup 0, 0xc, 0, BASE + 0x4000, 0x4000, 3 assert_no_auto_tlb 1: l32i a2, a3, 0 @@ -474,8 +498,8 @@ test_end test autoload_pt_privilege set_vector kernel, 2f - pt_setup 0, 3, 1, 0x5000, 0, 3 - go_ring 1, 0, 0x5001 + pt_setup 0, 3, 1, BASE + 0x5000, 0, 3 + go_ring 1, 0, BASE + 0x5001 l8ui a2, a3, 0 1: @@ -491,8 +515,8 @@ test_end test autoload_pte_privilege set_vector kernel, 2f - pt_setup 0, 3, 0, 0x6000, 0, 3 - go_ring 1, 0, 0x6001 + pt_setup 0, 3, 0, BASE + 0x6000, 0, 3 + go_ring 1, 0, BASE + 0x6001 1: l8ui a2, a3, 0 syscall @@ -507,9 +531,9 @@ test_end test autoload_3_level_pt set_vector kernel, 2f - pt_setup 1, 3, 1, 0x00400000, 0, 3 - pt_setup 1, 3, 1, 0x80001000, 0x2000000, 3 - go_ring 1, 0, 0x00400001 + pt_setup 1, 3, 1, BASE + 0x00400000, 0, 3 + pt_setup 1, 3, 1, TLB_BASE + ((BASE + 0x00400000) >> 10), 0x2000000, 3 + go_ring 1, 0, BASE + 0x00400001 1: l8ui a2, a3, 0 syscall @@ -526,14 +550,14 @@ test cross_page_insn set_vector kernel, 2f movi a2, 0x04000003 /* PPN */ - movi a3, 0x00007000 /* VPN */ + movi a3, BASE + 0x00007000 /* VPN */ witlb a2, a3 wdtlb a2, a3 - movi a3, 0x00008000 /* VPN */ + movi a3, BASE + 0x00008000 /* VPN */ witlb a2, a3 wdtlb a2, a3 - movi a2, 0x00007fff + movi a2, BASE + 0x00007fff movi a3, 20f movi a4, 21f sub a4, a4, a3 @@ -543,8 +567,8 @@ test cross_page_insn addi a2, a2, 1 addi a3, a3, 1 1: - movi a2, 0x00007fff - movi a3, 0x00008000 + movi a2, BASE + 0x00007fff + movi a3, BASE + 0x00008000 /* DTLB: OK, ITLB: OK */ jx a2 @@ -560,20 +584,20 @@ test cross_page_insn movi a3, 1 assert eq, a2, a3 rsr a2, epc1 - movi a3, 0x8002 + movi a3, BASE + 0x8002 assert eq, a2, a3 rsr a2, excsave1 - movi a3, 0x00007fff + movi a3, BASE + 0x00007fff assert ne, a2, a3 reset_ps set_vector kernel, 3f movi a2, 0x0400000c /* PPN */ - movi a3, 0x00008000 /* VPN */ + movi a3, BASE + 0x00008000 /* VPN */ wdtlb a2, a3 - movi a2, 0x00007fff - movi a3, 0x00008000 + movi a2, BASE + 0x00007fff + movi a3, BASE + 0x00008000 /* DTLB: FAIL, ITLB: OK */ jx a2 3: @@ -581,22 +605,22 @@ test cross_page_insn movi a3, 28 assert eq, a2, a3 rsr a2, epc1 - movi a3, 0x7fff + movi a3, BASE + 0x7fff assert eq, a2, a3 rsr a2, excsave1 - movi a3, 0x00007fff + movi a3, BASE + 0x00007fff assert eq, a2, a3 reset_ps set_vector kernel, 4f movi a2, 0x0400000c /* PPN */ - movi a3, 0x00008000 /* VPN */ + movi a3, BASE + 0x00008000 /* VPN */ witlb a2, a3 movi a2, 0x04000003 /* PPN */ wdtlb a2, a3 - movi a2, 0x00007fff - movi a3, 0x00008000 + movi a2, BASE + 0x00007fff + movi a3, BASE + 0x00008000 /* DTLB: OK, ITLB: FAIL */ jx a2 4: @@ -604,20 +628,20 @@ test cross_page_insn movi a3, 20 assert eq, a2, a3 rsr a2, epc1 - movi a3, 0x7fff + movi a3, BASE + 0x7fff assert eq, a2, a3 rsr a2, excsave1 - movi a3, 0x00007fff + movi a3, BASE + 0x00007fff assert eq, a2, a3 reset_ps set_vector kernel, 5f movi a2, 0x0400000c /* PPN */ - movi a3, 0x00008000 /* VPN */ + movi a3, BASE + 0x00008000 /* VPN */ wdtlb a2, a3 - movi a2, 0x00007fff - movi a3, 0x00008000 + movi a2, BASE + 0x00007fff + movi a3, BASE + 0x00008000 /* DTLB: FAIL, ITLB: FAIL */ jx a2 5: @@ -625,10 +649,10 @@ test cross_page_insn movi a3, 20 assert eq, a2, a3 rsr a2, epc1 - movi a3, 0x7fff + movi a3, BASE + 0x7fff assert eq, a2, a3 rsr a2, excsave1 - movi a3, 0x00007fff + movi a3, BASE + 0x00007fff assert eq, a2, a3 test_end @@ -636,14 +660,14 @@ test cross_page_tb set_vector kernel, 2f movi a2, 0x04000003 /* PPN */ - movi a3, 0x00007000 /* VPN */ + movi a3, BASE + 0x00007000 /* VPN */ witlb a2, a3 wdtlb a2, a3 - movi a3, 0x00008000 /* VPN */ + movi a3, BASE + 0x00008000 /* VPN */ witlb a2, a3 wdtlb a2, a3 - movi a2, 0x00007ffc + movi a2, BASE + 0x00007ffc movi a3, 20f movi a4, 21f sub a4, a4, a3 @@ -653,8 +677,8 @@ test cross_page_tb addi a2, a2, 1 addi a3, a3, 1 1: - movi a2, 0x00007ffc - movi a3, 0x00008000 + movi a2, BASE + 0x00007ffc + movi a3, BASE + 0x00008000 /* DTLB: OK, ITLB: OK */ jx a2 @@ -670,20 +694,20 @@ test cross_page_tb movi a3, 1 assert eq, a2, a3 rsr a2, epc1 - movi a3, 0x7fff + movi a3, BASE + 0x7fff assert eq, a2, a3 rsr a2, excsave1 - movi a3, 0x00007ffc + movi a3, BASE + 0x00007ffc assert ne, a2, a3 reset_ps set_vector kernel, 3f movi a2, 0x0400000c /* PPN */ - movi a3, 0x00008000 /* VPN */ + movi a3, BASE + 0x00008000 /* VPN */ wdtlb a2, a3 - movi a2, 0x00007ffc - movi a3, 0x00008000 + movi a2, BASE + 0x00007ffc + movi a3, BASE + 0x00008000 /* DTLB: FAIL, ITLB: OK */ jx a2 3: @@ -691,22 +715,22 @@ test cross_page_tb movi a3, 28 assert eq, a2, a3 rsr a2, epc1 - movi a3, 0x7ffc + movi a3, BASE + 0x7ffc assert eq, a2, a3 rsr a2, excsave1 - movi a3, 0x00007ffc + movi a3, BASE + 0x00007ffc assert eq, a2, a3 reset_ps set_vector kernel, 4f movi a2, 0x0400000c /* PPN */ - movi a3, 0x00008000 /* VPN */ + movi a3, BASE + 0x00008000 /* VPN */ witlb a2, a3 movi a2, 0x04000003 /* PPN */ wdtlb a2, a3 - movi a2, 0x00007ffc - movi a3, 0x00008000 + movi a2, BASE + 0x00007ffc + movi a3, BASE + 0x00008000 /* DTLB: OK, ITLB: FAIL */ jx a2 4: @@ -714,20 +738,20 @@ test cross_page_tb movi a3, 20 assert eq, a2, a3 rsr a2, epc1 - movi a3, 0x7fff + movi a3, BASE + 0x7fff assert eq, a2, a3 rsr a2, excsave1 - movi a3, 0x00007ffc + movi a3, BASE + 0x00007ffc assert ne, a2, a3 reset_ps set_vector kernel, 5f movi a2, 0x0400000c /* PPN */ - movi a3, 0x00008000 /* VPN */ + movi a3, BASE + 0x00008000 /* VPN */ wdtlb a2, a3 - movi a2, 0x00007ffc - movi a3, 0x00008000 + movi a2, BASE + 0x00007ffc + movi a3, BASE + 0x00008000 /* DTLB: FAIL, ITLB: FAIL */ jx a2 5: @@ -735,10 +759,10 @@ test cross_page_tb movi a3, 28 assert eq, a2, a3 rsr a2, epc1 - movi a3, 0x7ffc + movi a3, BASE + 0x7ffc assert eq, a2, a3 rsr a2, excsave1 - movi a3, 0x00007ffc + movi a3, BASE + 0x00007ffc assert eq, a2, a3 test_end From patchwork Wed Apr 27 17:21:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 12829259 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 22315C433FE for ; Wed, 27 Apr 2022 17:27:09 +0000 (UTC) Received: from localhost ([::1]:48394 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In-Reply-To: <20220427172140.1406059-1-jcmvbkbc@gmail.com> References: <20220427172140.1406059-1-jcmvbkbc@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=jcmvbkbc@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.998, HK_RANDOM_FROM=0.998, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Timer test assumes that timer 0 IRQ has level 1 and other timers have higher level IRQs. This assumption is not correct and the levels may be arbitrary. Fix that assumption by providing TIMER*_VECTOR macro and using it for vector selection and by making the check for the timer exception cause conditional. Signed-off-by: Max Filippov --- tests/tcg/xtensa/test_timer.S | 48 ++++++++++++++++++++++++++++++----- 1 file changed, 41 insertions(+), 7 deletions(-) diff --git a/tests/tcg/xtensa/test_timer.S b/tests/tcg/xtensa/test_timer.S index 2a383e77190e..2a06eebad883 100644 --- a/tests/tcg/xtensa/test_timer.S +++ b/tests/tcg/xtensa/test_timer.S @@ -38,6 +38,28 @@ test_end #if XCHAL_NUM_TIMERS +#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1 +#define TIMER0_VECTOR kernel +#else +#define TIMER0_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT)) +#endif + +#if XCHAL_NUM_TIMERS > 1 +#if INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1 +#define TIMER1_VECTOR kernel +#else +#define TIMER1_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT)) +#endif +#endif + +#if XCHAL_NUM_TIMERS > 2 +#if INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1 +#define TIMER2_VECTOR kernel +#else +#define TIMER2_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT)) +#endif +#endif + test ccount_update_deadline movi a2, 0 wsr a2, intenable @@ -90,9 +112,8 @@ test ccompare assert nei, a5, 0 test_end -#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1 test ccompare0_interrupt - set_vector kernel, 2f + set_vector TIMER0_VECTOR, 2f movi a2, 0 wsr a2, intenable rsr a2, interrupt @@ -120,15 +141,16 @@ test ccompare0_interrupt bnez a3, 1b test_fail 2: +#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1 rsr a2, exccause assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */ -test_end #endif +test_end #if XCHAL_NUM_TIMERS > 1 test ccompare1_interrupt - set_vector glue(level, INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT)), 2f + set_vector TIMER1_VECTOR, 2f movi a2, 0 wsr a2, intenable rsr a2, interrupt @@ -153,13 +175,17 @@ test ccompare1_interrupt bnez a3, 1b test_fail 2: +#if INTERRUPT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1 + rsr a2, exccause + assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */ +#endif test_end #endif #if XCHAL_NUM_TIMERS > 2 test ccompare2_interrupt - set_vector glue(level, INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT)), 2f + set_vector TIMER2_VECTOR, 2f movi a2, 0 wsr a2, intenable rsr a2, interrupt @@ -182,12 +208,16 @@ test ccompare2_interrupt bnez a3, 1b test_fail 2: +#if INTERRUPT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1 + rsr a2, exccause + assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */ +#endif test_end #endif test ccompare_interrupt_masked - set_vector kernel, 2f + set_vector TIMER0_VECTOR, 2f movi a2, 0 wsr a2, intenable rsr a2, interrupt @@ -217,12 +247,14 @@ test ccompare_interrupt_masked test_fail 2: +#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1 rsr a2, exccause assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */ +#endif test_end test ccompare_interrupt_masked_waiti - set_vector kernel, 2f + set_vector TIMER0_VECTOR, 2f movi a2, 0 wsr a2, intenable rsr a2, interrupt @@ -247,8 +279,10 @@ test ccompare_interrupt_masked_waiti waiti 0 test_fail 2: +#if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1 rsr a2, exccause assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */ +#endif test_end #endif