From patchwork Fri Apr 29 08:22:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 12831622 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7B501C433EF for ; Fri, 29 Apr 2022 08:24:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7Q/TLSRAGmSwv/XvKIgPN7OiWB2zUsLVg4deH4TKyw4=; b=S6+7wie2f5LkH5 7U7ewpxGx/f7uFulklX0H3uznAX3xch0EjVImrbmtEUfWyoYSxYYHcHa6iil7um+wvcufrgJckpIX qt9qneNcxMWbG8ExBS4ki/zSoc+aGztAux7vVFiWFn4/TDPmgpQtsdj36Q1CKnapUL335N2WDFLnX TdwAjfiIENseSH2HTZxLIrQddffaVDGEC0A3qQqJqE2iwfa1FYkfO4bZ9upjv2kEzMUt6YXVt6zFG RgK+1LIuzfD+18/ZACtGHgmP0DI020jXtEyNEnU4/L7bkmDErqam6ECN3Xbyj0Ri7RtsVFmqSHmLX e/PFDP1m983oxvtdcwZA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nkLuF-00A9cu-NR; Fri, 29 Apr 2022 08:23:15 +0000 Received: from mail-lj1-x230.google.com ([2a00:1450:4864:20::230]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nkLtw-00A9Uq-IX for linux-arm-kernel@lists.infradead.org; Fri, 29 Apr 2022 08:22:58 +0000 Received: by mail-lj1-x230.google.com with SMTP id c15so9634956ljr.9 for ; Fri, 29 Apr 2022 01:22:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BqXPunmGph8XZto24fUj0G8vrN134xfSDWAMlJF8WBA=; b=fucmz1GgWONzX38ItL0J0SdsV2RbDADjwMXY00Ep8ru2rz9kJYrICku40mpA+OhHkN Tt11jjM6p6pRkj68T/yBFKeQMEwpcIIE+k/Rl8DQcP8PLkG+lU6MgkdtomQaZP9TFndG ea1mFyzDGYy8Z0ZxcIn5nGhY6MqSz6ZT8rHHChdlsR4c4fGvZa9k2F4UMsxSF3pCbi/u 2Ng4dB6T0PTVwsRb/SSi+2MPjpt8XNAG8gX1DFZwQl0ZNuFhJ+GalaFGQw5L0dHAXUZy Pf5aEyoanA40m2laUFNC6upPjs8h+wJdnkMSk7IJoOH+zr2nvhSiyw57MDN5C6mKULKE GP2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BqXPunmGph8XZto24fUj0G8vrN134xfSDWAMlJF8WBA=; b=OgWdHmbsu3B6bYnEkmLU0ToiiY7pHGGpIyZZET2XtvtCNg11qNaFMRPzT9UQ0cMSh/ i4QefaZv0HOuyUHC3JfwnDK6VTlaXvzV5BazBZBKAb1O7DA9kcnoqL/zSq17QJ/EME3C 0aofeS7LuIuVH7dmOMEfwTCa40cCVGXXTZGUduHb5k5XLxBPhMmX7SJGWCaLrlNw6rjG BClPioRfiUcphS71Ltv38g3gPP4qbtdIDjoi7NQRL84uBJG7nZ4N3GFNW+u3PJ5va6pn 3Oto8TK3F1Y6qLDdOQ/r8kpy+PBcG776dXoBevRK7oonLBVypBY9CyV/p4KFPK8XNYmd Ui1A== X-Gm-Message-State: AOAM531uhxI7YV5RoGmAcDJ1n61WomMFSR0dmUJSBTcCwM6nG0t/aYF3 IkZmSWBCda0qAVXrj1iqT2A= X-Google-Smtp-Source: ABdhPJxjBeKz+bjnoFzef0XBxYP3wxVL83OPI0s4GLwL1Z/ru492IPCB0tHy6nvnA/phj8VTYPSAZg== X-Received: by 2002:a2e:82c5:0:b0:247:e81f:8b02 with SMTP id n5-20020a2e82c5000000b00247e81f8b02mr24196768ljh.90.1651220570942; Fri, 29 Apr 2022 01:22:50 -0700 (PDT) Received: from localhost ([62.96.65.119]) by smtp.gmail.com with ESMTPSA id q3-20020a2e8743000000b0024f3d1daee6sm209010ljj.110.2022.04.29.01.22.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Apr 2022 01:22:50 -0700 (PDT) From: Thierry Reding To: Joerg Roedel Cc: Will Deacon , Robin Murphy , iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring Subject: [PATCH v3 1/3] dt-bindings: arm-smmu: Document nvidia, memory-controller property Date: Fri, 29 Apr 2022 10:22:41 +0200 Message-Id: <20220429082243.496000-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220429082243.496000-1-thierry.reding@gmail.com> References: <20220429082243.496000-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220429_012256_687710_E45484BC X-CRM114-Status: GOOD ( 14.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Thierry Reding On NVIDIA SoC's the ARM SMMU needs to interact with the memory controller in order to map memory clients to the corresponding stream IDs. Document how the nvidia,memory-controller property can be used to achieve this. Note that this is a backwards-incompatible change that is, however, necessary to ensure correctness. Without the new property, most of the devices would still work but it is not guaranteed that all will. Reviewed-by: Rob Herring Acked-by: Will Deacon Signed-off-by: Thierry Reding --- Changes in v2: - clarify why the new nvidia,memory-controller property is required .../devicetree/bindings/iommu/arm,smmu.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index da5381c8ee11..44606ad5aa39 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -157,6 +157,17 @@ properties: power-domains: maxItems: 1 + nvidia,memory-controller: + description: | + A phandle to the memory controller on NVIDIA Tegra186 and later SoCs. + The memory controller needs to be programmed with a mapping of memory + client IDs to ARM SMMU stream IDs. + + If this property is absent, the mapping programmed by early firmware + will be used and it is not guaranteed that IOMMU translations will be + enabled for any given device. + $ref: /schemas/types.yaml#/definitions/phandle + required: - compatible - reg @@ -179,6 +190,12 @@ allOf: reg: minItems: 1 maxItems: 2 + + # The reference to the memory controller is required to ensure that the + # memory client to stream ID mapping can be done synchronously with the + # IOMMU attachment. + required: + - nvidia,memory-controller else: properties: reg: From patchwork Fri Apr 29 08:22:42 2022 Content-Type: text/plain; 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Reviewed-by: Rob Herring Acked-by: Will Deacon Signed-off-by: Thierry Reding --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 44606ad5aa39..590cc8dc8323 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -62,8 +62,9 @@ properties: for improved performance. items: - enum: - - nvidia,tegra194-smmu - nvidia,tegra186-smmu + - nvidia,tegra194-smmu + - nvidia,tegra234-smmu - const: nvidia,smmu-500 - items: - const: arm,mmu-500 @@ -183,8 +184,9 @@ allOf: compatible: contains: enum: - - nvidia,tegra194-smmu - nvidia,tegra186-smmu + - nvidia,tegra194-smmu + - nvidia,tegra234-smmu then: properties: reg: From patchwork Fri Apr 29 08:22:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 12831623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2F24C433EF for ; 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Fri, 29 Apr 2022 01:22:54 -0700 (PDT) From: Thierry Reding To: Joerg Roedel Cc: Will Deacon , Robin Murphy , iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 3/3] iommu/arm-smmu: Support Tegra234 SMMU Date: Fri, 29 Apr 2022 10:22:43 +0200 Message-Id: <20220429082243.496000-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220429082243.496000-1-thierry.reding@gmail.com> References: <20220429082243.496000-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220429_012258_968590_124A0D8F X-CRM114-Status: GOOD ( 11.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Thierry Reding Allow the NVIDIA-specific ARM SMMU implementation to bind to the SMMU instances found on Tegra234. Acked-by: Robin Murphy Acked-by: Will Deacon Signed-off-by: Thierry Reding --- drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c index 2c25cce38060..658f3cc83278 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c @@ -211,7 +211,8 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) if (of_property_read_bool(np, "calxeda,smmu-secure-config-access")) smmu->impl = &calxeda_impl; - if (of_device_is_compatible(np, "nvidia,tegra194-smmu") || + if (of_device_is_compatible(np, "nvidia,tegra234-smmu") || + of_device_is_compatible(np, "nvidia,tegra194-smmu") || of_device_is_compatible(np, "nvidia,tegra186-smmu")) return nvidia_smmu_impl_init(smmu);