From patchwork Wed May 4 14:54:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12838021 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5ED3AC433EF for ; Wed, 4 May 2022 14:55:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231284AbiEDO7U (ORCPT ); Wed, 4 May 2022 10:59:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47120 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351557AbiEDO7Q (ORCPT ); Wed, 4 May 2022 10:59:16 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 2E4D42250C; Wed, 4 May 2022 07:55:40 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,198,1647270000"; d="scan'208";a="119939347" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 04 May 2022 23:55:39 +0900 Received: from localhost.localdomain (unknown [10.226.93.27]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 335584250F05; Wed, 4 May 2022 23:55:36 +0900 (JST) From: Phil Edworthy To: Michael Turquette , Stephen Boyd , Geert Uytterhoeven Cc: Phil Edworthy , linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Biju Das Subject: [PATCH 1/9] clk: renesas: r9a09g011: Add eth clock and reset entries Date: Wed, 4 May 2022 15:54:46 +0100 Message-Id: <20220504145454.71287-2-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504145454.71287-1-phil.edworthy@renesas.com> References: <20220504145454.71287-1-phil.edworthy@renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add ethernet clock/reset entries to CPG driver. Note that the AXI and CHI clocks are both enabled and disabled using the same register bit. Signed-off-by: Phil Edworthy Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven --- drivers/clk/renesas/r9a09g011-cpg.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/clk/renesas/r9a09g011-cpg.c b/drivers/clk/renesas/r9a09g011-cpg.c index 7f16a617dc8c..f0a958497f47 100644 --- a/drivers/clk/renesas/r9a09g011-cpg.c +++ b/drivers/clk/renesas/r9a09g011-cpg.c @@ -126,14 +126,18 @@ static const struct cpg_core_clk r9a09g011_core_clks[] __initconst = { }; static const struct rzg2l_mod_clk r9a09g011_mod_clks[] __initconst = { - DEF_MOD("gic", R9A09G011_GIC_CLK, CLK_SEL_B_D2, 0x400, 5), - DEF_MOD("syc_cnt_clk", R9A09G011_SYC_CNT_CLK, CLK_MAIN_24, 0x41c, 12), - DEF_MOD("urt_pclk", R9A09G011_URT_PCLK, CLK_SEL_E, 0x438, 4), - DEF_MOD("urt0_clk", R9A09G011_URT0_CLK, CLK_SEL_W0, 0x438, 5), - DEF_MOD("ca53", R9A09G011_CA53_CLK, CLK_DIV_A, 0x448, 0), + DEF_MOD("gic", R9A09G011_GIC_CLK, CLK_SEL_B_D2, 0x400, 5), + DEF_COUPLED("eth_axi", R9A09G011_ETH0_CLK_AXI, CLK_PLL2_200, 0x40c, 8), + DEF_COUPLED("eth_chi", R9A09G011_ETH0_CLK_CHI, CLK_PLL2_100, 0x40c, 8), + DEF_MOD("eth_clk_gptp", R9A09G011_ETH0_GPTP_EXT, CLK_PLL2_100, 0x40c, 9), + DEF_MOD("syc_cnt_clk", R9A09G011_SYC_CNT_CLK, CLK_MAIN_24, 0x41c, 12), + DEF_MOD("urt_pclk", R9A09G011_URT_PCLK, CLK_SEL_E, 0x438, 4), + DEF_MOD("urt0_clk", R9A09G011_URT0_CLK, CLK_SEL_W0, 0x438, 5), + DEF_MOD("ca53", R9A09G011_CA53_CLK, CLK_DIV_A, 0x448, 0), }; static const struct rzg2l_reset r9a09g011_resets[] = { + DEF_RST_MON(R9A09G011_ETH0_RST_HW_N, 0x608, 11, 11), DEF_RST_MON(R9A09G011_SYC_RST_N, 0x610, 9, 13), }; From patchwork Wed May 4 14:54:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12838022 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B92B9C433F5 for ; Wed, 4 May 2022 14:55:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344056AbiEDO72 (ORCPT ); Wed, 4 May 2022 10:59:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239051AbiEDO71 (ORCPT ); Wed, 4 May 2022 10:59:27 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 2650A1E3D1; Wed, 4 May 2022 07:55:51 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,198,1647270000"; d="scan'208";a="118715015" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 May 2022 23:55:50 +0900 Received: from localhost.localdomain (unknown [10.226.93.27]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id A4AF54250F05; Wed, 4 May 2022 23:55:46 +0900 (JST) From: Phil Edworthy To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven Cc: Phil Edworthy , Sergey Shtylyov , Sergei Shtylyov , netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Biju Das Subject: [PATCH 2/9] dt-bindings: net: renesas,etheravb: Document RZ/V2M SoC Date: Wed, 4 May 2022 15:54:47 +0100 Message-Id: <20220504145454.71287-3-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504145454.71287-1-phil.edworthy@renesas.com> References: <20220504145454.71287-1-phil.edworthy@renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Document the Ethernet AVB IP found on RZ/V2M SoC. It includes the Ethernet controller (E-MAC) and Dedicated Direct memory access controller (DMAC) for transferring transmitted Ethernet frames to and received Ethernet frames from respective storage areas in the URAM at high speed. The AVB-DMAC is compliant with IEEE 802.1BA, IEEE 802.1AS timing and synchronization protocol, IEEE 802.1Qav real-time transfer, and the IEEE 802.1Qat stream reservation protocol. R-Car has a pair of combined interrupt lines: ch22 = Line0_DiA | Line1_A | Line2_A ch23 = Line0_DiB | Line1_B | Line2_B Line0 for descriptor interrupts. Line1 for error related interrupts (which we call err_a and err_b). Line2 for management and gPTP related interrupts (mgmt_a and mgmt_b). RZ/V2M hardware has separate interrupt lines for each of these, but we keep the "ch22" name for Line0_DiA. We also keep the "ch24" name for the Line3 (MAC) interrupt. It has 3 clocks; the main AXI clock, the AMBA CHI clock and a gPTP reference clock. Signed-off-by: Phil Edworthy Reviewed-by: Biju Das --- .../bindings/net/renesas,etheravb.yaml | 82 ++++++++++++++----- 1 file changed, 61 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml index ee2ccacc39ff..6c5172ff2b18 100644 --- a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml +++ b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml @@ -43,6 +43,11 @@ properties: - renesas,etheravb-r8a779a0 # R-Car V3U - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 + - items: + - enum: + - renesas,etheravb-r9a09g011 # RZ/V2M + - const: renesas,etheravb-rzv2m # RZ/V2M compatible + - items: - enum: - renesas,r9a07g043-gbeth # RZ/G2UL @@ -160,16 +165,33 @@ allOf: - const: arp_ns rx-internal-delay-ps: false else: - properties: - interrupts: - minItems: 25 - maxItems: 25 - interrupt-names: - items: - pattern: '^ch[0-9]+$' - required: - - interrupt-names - - rx-internal-delay-ps + if: + properties: + compatible: + contains: + const: renesas,etheravb-rzv2m + then: + properties: + interrupts: + minItems: 29 + maxItems: 29 + interrupt-names: + items: + pattern: '^(ch[0-9]+)|dib|err_a|err_b|mgmt_a|mgmt_b$' + rx-internal-delay-ps: false + required: + - interrupt-names + else: + properties: + interrupts: + minItems: 25 + maxItems: 25 + interrupt-names: + items: + pattern: '^ch[0-9]+$' + required: + - interrupt-names + - rx-internal-delay-ps - if: properties: @@ -231,17 +253,35 @@ allOf: - const: chi - const: refclk else: - properties: - clocks: - minItems: 1 - items: - - description: AVB functional clock - - description: Optional TXC reference clock - clock-names: - minItems: 1 - items: - - const: fck - - const: refclk + if: + properties: + compatible: + contains: + const: renesas,etheravb-rzv2m + then: + properties: + clocks: + items: + - description: Main clock + - description: Coherent Hub Interface clock + - description: gPTP reference clock + clock-names: + items: + - const: axi + - const: chi + - const: gptp + else: + properties: + clocks: + minItems: 1 + items: + - description: AVB functional clock + - description: Optional TXC reference clock + clock-names: + minItems: 1 + items: + - const: fck + - const: refclk additionalProperties: false From patchwork Wed May 4 14:54:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12838027 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 545F4C433F5 for ; Wed, 4 May 2022 14:56:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351593AbiEDO76 (ORCPT ); Wed, 4 May 2022 10:59:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351571AbiEDO7j (ORCPT ); Wed, 4 May 2022 10:59:39 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 07FE32559F; Wed, 4 May 2022 07:56:01 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,198,1647270000"; d="scan'208";a="118715020" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 May 2022 23:56:01 +0900 Received: from localhost.localdomain (unknown [10.226.93.27]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 048524250F07; Wed, 4 May 2022 23:55:57 +0900 (JST) From: Phil Edworthy To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Geert Uytterhoeven Cc: Phil Edworthy , Sergey Shtylyov , Biju Das , Lad Prabhakar , netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 3/9] ravb: Separate use of GIC reg for PTME from multi_irqs Date: Wed, 4 May 2022 15:54:48 +0100 Message-Id: <20220504145454.71287-4-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504145454.71287-1-phil.edworthy@renesas.com> References: <20220504145454.71287-1-phil.edworthy@renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org When the HW has a single interrupt, the driver currently uses the PTME (Presentation Time Match Enable) bit in the GIC register to enable/disable the PTM irq. Otherwise, it uses the GIE/GID registers. However, other SoCs, e.g. RZ/V2M, have multiple irqs and use the GIC register PTME bit, so separate it out as it's own feature. Signed-off-by: Phil Edworthy Reviewed-by: Biju Das --- drivers/net/ethernet/renesas/ravb.h | 1 + drivers/net/ethernet/renesas/ravb_main.c | 1 + drivers/net/ethernet/renesas/ravb_ptp.c | 4 ++-- 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index 08062d73df10..15aa09d93ff0 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -1029,6 +1029,7 @@ struct ravb_hw_info { unsigned multi_irqs:1; /* AVB-DMAC and E-MAC has multiple irqs */ unsigned gptp:1; /* AVB-DMAC has gPTP support */ unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in config mode */ + unsigned gptp_ptm_gic:1; /* gPTP enables Presentation Time Match irq via GIC */ unsigned nc_queues:1; /* AVB-DMAC has RX and TX NC queues */ unsigned magic_pkt:1; /* E-MAC supports magic packet detection */ unsigned half_duplex:1; /* E-MAC supports half duplex mode */ diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index 525d66f71f02..de2792c03099 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -2434,6 +2434,7 @@ static const struct ravb_hw_info ravb_gen2_hw_info = { .rx_max_buf_size = SZ_2K, .aligned_tx = 1, .gptp = 1, + .gptp_ptm_gic = 1, .nc_queues = 1, .magic_pkt = 1, }; diff --git a/drivers/net/ethernet/renesas/ravb_ptp.c b/drivers/net/ethernet/renesas/ravb_ptp.c index c099656dd75b..f8e75dddcaf1 100644 --- a/drivers/net/ethernet/renesas/ravb_ptp.c +++ b/drivers/net/ethernet/renesas/ravb_ptp.c @@ -254,7 +254,7 @@ static int ravb_ptp_perout(struct ptp_clock_info *ptp, error = ravb_ptp_update_compare(priv, (u32)start_ns); if (!error) { /* Unmask interrupt */ - if (!info->multi_irqs) + if (info->gptp_ptm_gic) ravb_modify(ndev, GIC, GIC_PTME, GIC_PTME); else ravb_write(ndev, GIE_PTMS0, GIE); @@ -266,7 +266,7 @@ static int ravb_ptp_perout(struct ptp_clock_info *ptp, perout->period = 0; /* Mask interrupt */ - if (!info->multi_irqs) + if (info->gptp_ptm_gic) ravb_modify(ndev, GIC, GIC_PTME, 0); else ravb_write(ndev, GID_PTMD0, GID); From patchwork Wed May 4 14:54:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12838028 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BCFBC433F5 for ; Wed, 4 May 2022 14:56:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239051AbiEDPAP (ORCPT ); Wed, 4 May 2022 11:00:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351590AbiEDO75 (ORCPT ); Wed, 4 May 2022 10:59:57 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 668522CE3A; Wed, 4 May 2022 07:56:12 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,198,1647270000"; d="scan'208";a="118715028" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 May 2022 23:56:11 +0900 Received: from localhost.localdomain (unknown [10.226.93.27]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 6C3A84250F0B; Wed, 4 May 2022 23:56:08 +0900 (JST) From: Phil Edworthy To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Geert Uytterhoeven Cc: Phil Edworthy , Sergey Shtylyov , Biju Das , Lad Prabhakar , netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 4/9] ravb: Separate handling of irq enable/disable regs into feature Date: Wed, 4 May 2022 15:54:49 +0100 Message-Id: <20220504145454.71287-5-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504145454.71287-1-phil.edworthy@renesas.com> References: <20220504145454.71287-1-phil.edworthy@renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Currently, when the HW has a single interrupt, the driver uses the TIC, RIC0 registers to enable and disable RX/TX interrupts. When the HW has multiple interrupts, it uses the TIE, TID, RIE0, RID0 registers. However, other devices, e.g. RZ/V2M, have multiple irqs and use the TIC, RIC0 registers. Therefore, split this into a separate feature. Signed-off-by: Phil Edworthy Reviewed-by: Biju Das --- drivers/net/ethernet/renesas/ravb.h | 1 + drivers/net/ethernet/renesas/ravb_main.c | 5 +++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index 15aa09d93ff0..67a240665cd2 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -1027,6 +1027,7 @@ struct ravb_hw_info { unsigned tx_counters:1; /* E-MAC has TX counters */ unsigned carrier_counters:1; /* E-MAC has carrier counters */ unsigned multi_irqs:1; /* AVB-DMAC and E-MAC has multiple irqs */ + unsigned irq_en_dis_regs:1; /* Has separate irq enable and disable regs */ unsigned gptp:1; /* AVB-DMAC has gPTP support */ unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in config mode */ unsigned gptp_ptm_gic:1; /* gPTP enables Presentation Time Match irq via GIC */ diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index de2792c03099..d0b9688074ca 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -1124,7 +1124,7 @@ static bool ravb_queue_interrupt(struct net_device *ndev, int q) if (((ris0 & ric0) & BIT(q)) || ((tis & tic) & BIT(q))) { if (napi_schedule_prep(&priv->napi[q])) { /* Mask RX and TX interrupts */ - if (!info->multi_irqs) { + if (!info->irq_en_dis_regs) { ravb_write(ndev, ric0 & ~BIT(q), RIC0); ravb_write(ndev, tic & ~BIT(q), TIC); } else { @@ -1306,7 +1306,7 @@ static int ravb_poll(struct napi_struct *napi, int budget) /* Re-enable RX/TX interrupts */ spin_lock_irqsave(&priv->lock, flags); - if (!info->multi_irqs) { + if (!info->irq_en_dis_regs) { ravb_modify(ndev, RIC0, mask, mask); ravb_modify(ndev, TIC, mask, mask); } else { @@ -2410,6 +2410,7 @@ static const struct ravb_hw_info ravb_gen3_hw_info = { .internal_delay = 1, .tx_counters = 1, .multi_irqs = 1, + .irq_en_dis_regs = 1, .ccc_gac = 1, .nc_queues = 1, .magic_pkt = 1, From patchwork Wed May 4 14:54:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12838029 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43585C433EF for ; Wed, 4 May 2022 14:56:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351561AbiEDPAP (ORCPT ); Wed, 4 May 2022 11:00:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351579AbiEDPAB (ORCPT ); Wed, 4 May 2022 11:00:01 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id EFF0E19C2D; Wed, 4 May 2022 07:56:22 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,198,1647270000"; d="scan'208";a="119939371" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 04 May 2022 23:56:22 +0900 Received: from localhost.localdomain (unknown [10.226.93.27]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id D53B94250F07; Wed, 4 May 2022 23:56:18 +0900 (JST) From: Phil Edworthy To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Geert Uytterhoeven Cc: Phil Edworthy , Sergey Shtylyov , Biju Das , Lad Prabhakar , netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 5/9] ravb: Support separate Line0 (Desc), Line1 (Err) and Line2 (Mgmt) irqs Date: Wed, 4 May 2022 15:54:50 +0100 Message-Id: <20220504145454.71287-6-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504145454.71287-1-phil.edworthy@renesas.com> References: <20220504145454.71287-1-phil.edworthy@renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org R-Car has a combined interrupt line, ch22 = Line0_DiA | Line1_A | Line2_A. RZ/V2M has separate interrupt lines for each of these, so add a feature that allows the driver to get these interrupts and call the common handler. We keep the "ch22" name for Line0_DiA and "ch24" for Line3 interrupts to keep the code simple. Signed-off-by: Phil Edworthy Reviewed-by: Biju Das --- drivers/net/ethernet/renesas/ravb.h | 3 ++ drivers/net/ethernet/renesas/ravb_main.c | 41 ++++++++++++++++++++++-- 2 files changed, 42 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index 67a240665cd2..73976a392457 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -1028,6 +1028,7 @@ struct ravb_hw_info { unsigned carrier_counters:1; /* E-MAC has carrier counters */ unsigned multi_irqs:1; /* AVB-DMAC and E-MAC has multiple irqs */ unsigned irq_en_dis_regs:1; /* Has separate irq enable and disable regs */ + unsigned err_mgmt_irqs:1; /* Line1 (Err) and Line2 (Mgmt) irqs are separate */ unsigned gptp:1; /* AVB-DMAC has gPTP support */ unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in config mode */ unsigned gptp_ptm_gic:1; /* gPTP enables Presentation Time Match irq via GIC */ @@ -1079,6 +1080,8 @@ struct ravb_private { int msg_enable; int speed; int emac_irq; + int erra_irq; + int mgmta_irq; int rx_irqs[NUM_RX_QUEUE]; int tx_irqs[NUM_TX_QUEUE]; diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index d0b9688074ca..f12a23b9c391 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -1798,12 +1798,23 @@ static int ravb_open(struct net_device *ndev) ndev, dev, "ch19:tx_nc"); if (error) goto out_free_irq_nc_rx; + + if (info->err_mgmt_irqs) { + error = ravb_hook_irq(priv->erra_irq, ravb_multi_interrupt, + ndev, dev, "err_a"); + if (error) + goto out_free_irq_nc_tx; + error = ravb_hook_irq(priv->mgmta_irq, ravb_multi_interrupt, + ndev, dev, "mgmt_a"); + if (error) + goto out_free_irq_erra; + } } /* Device init */ error = ravb_dmac_init(ndev); if (error) - goto out_free_irq_nc_tx; + goto out_free_irq_mgmta; ravb_emac_init(ndev); /* Initialise PTP Clock driver */ @@ -1823,9 +1834,15 @@ static int ravb_open(struct net_device *ndev) /* Stop PTP Clock driver */ if (info->gptp) ravb_ptp_stop(ndev); -out_free_irq_nc_tx: +out_free_irq_mgmta: if (!info->multi_irqs) goto out_free_irq; + if (info->err_mgmt_irqs) + free_irq(priv->mgmta_irq, ndev); +out_free_irq_erra: + if (info->err_mgmt_irqs) + free_irq(priv->erra_irq, ndev); +out_free_irq_nc_tx: free_irq(priv->tx_irqs[RAVB_NC], ndev); out_free_irq_nc_rx: free_irq(priv->rx_irqs[RAVB_NC], ndev); @@ -2167,6 +2184,10 @@ static int ravb_close(struct net_device *ndev) free_irq(priv->rx_irqs[RAVB_BE], ndev); free_irq(priv->emac_irq, ndev); } + if (info->err_mgmt_irqs) { + free_irq(priv->erra_irq, ndev); + free_irq(priv->mgmta_irq, ndev); + } free_irq(ndev->irq, ndev); if (info->nc_queues) @@ -2665,6 +2686,22 @@ static int ravb_probe(struct platform_device *pdev) } } + if (info->err_mgmt_irqs) { + irq = platform_get_irq_byname(pdev, "err_a"); + if (irq < 0) { + error = irq; + goto out_release; + } + priv->erra_irq = irq; + + irq = platform_get_irq_byname(pdev, "mgmt_a"); + if (irq < 0) { + error = irq; + goto out_release; + } + priv->mgmta_irq = irq; + } + priv->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(priv->clk)) { error = PTR_ERR(priv->clk); From patchwork Wed May 4 14:54:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12838030 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89FA0C43217 for ; Wed, 4 May 2022 14:56:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351572AbiEDPAQ (ORCPT ); Wed, 4 May 2022 11:00:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351604AbiEDPAN (ORCPT ); Wed, 4 May 2022 11:00:13 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5EDE92DAB7; Wed, 4 May 2022 07:56:33 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,198,1647270000"; d="scan'208";a="119939378" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 04 May 2022 23:56:32 +0900 Received: from localhost.localdomain (unknown [10.226.93.27]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 3D8BD4250F07; Wed, 4 May 2022 23:56:28 +0900 (JST) From: Phil Edworthy To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Geert Uytterhoeven Cc: Phil Edworthy , Sergey Shtylyov , Biju Das , Lad Prabhakar , netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 6/9] ravb: Use separate clock for gPTP Date: Wed, 4 May 2022 15:54:51 +0100 Message-Id: <20220504145454.71287-7-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504145454.71287-1-phil.edworthy@renesas.com> References: <20220504145454.71287-1-phil.edworthy@renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org RZ/V2M has a separate gPTP reference clock that is used when the AVB-DMAC Mode Register (CCC) gPTP Clock Select (CSEL) bits are set to "01: High-speed peripheral bus clock". Therefore, add a feature that allows this clock to be used for gPTP. Signed-off-by: Phil Edworthy Reviewed-by: Biju Das Reviewed-by: Sergey Shtylyov --- drivers/net/ethernet/renesas/ravb.h | 2 ++ drivers/net/ethernet/renesas/ravb_main.c | 15 ++++++++++++++- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index 73976a392457..f8706897ea41 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -1032,6 +1032,7 @@ struct ravb_hw_info { unsigned gptp:1; /* AVB-DMAC has gPTP support */ unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in config mode */ unsigned gptp_ptm_gic:1; /* gPTP enables Presentation Time Match irq via GIC */ + unsigned gptp_ref_clk:1; /* gPTP has separate reference clock */ unsigned nc_queues:1; /* AVB-DMAC has RX and TX NC queues */ unsigned magic_pkt:1; /* E-MAC supports magic packet detection */ unsigned half_duplex:1; /* E-MAC supports half duplex mode */ @@ -1043,6 +1044,7 @@ struct ravb_private { void __iomem *addr; struct clk *clk; struct clk *refclk; + struct clk *gptp_clk; struct mdiobb_ctrl mdiobb; u32 num_rx_ring[NUM_RX_QUEUE]; u32 num_tx_ring[NUM_TX_QUEUE]; diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index f12a23b9c391..ded87cb51650 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -2496,11 +2496,15 @@ MODULE_DEVICE_TABLE(of, ravb_match_table); static int ravb_set_gti(struct net_device *ndev) { struct ravb_private *priv = netdev_priv(ndev); + const struct ravb_hw_info *info = priv->info; struct device *dev = ndev->dev.parent; unsigned long rate; uint64_t inc; - rate = clk_get_rate(priv->clk); + if (info->gptp_ref_clk) + rate = clk_get_rate(priv->gptp_clk); + else + rate = clk_get_rate(priv->clk); if (!rate) return -EINVAL; @@ -2715,6 +2719,15 @@ static int ravb_probe(struct platform_device *pdev) } clk_prepare_enable(priv->refclk); + if (info->gptp_ref_clk) { + priv->gptp_clk = devm_clk_get(&pdev->dev, "gptp"); + if (IS_ERR(priv->gptp_clk)) { + error = PTR_ERR(priv->gptp_clk); + goto out_release; + } + clk_prepare_enable(priv->gptp_clk); + } + ndev->max_mtu = info->rx_max_buf_size - (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); ndev->min_mtu = ETH_MIN_MTU; From patchwork Wed May 4 14:54:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12838032 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52419C433EF for ; Wed, 4 May 2022 14:57:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351640AbiEDPA2 (ORCPT ); Wed, 4 May 2022 11:00:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351596AbiEDPA0 (ORCPT ); Wed, 4 May 2022 11:00:26 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3CC102A73B; Wed, 4 May 2022 07:56:43 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,198,1647270000"; d="scan'208";a="118715050" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 May 2022 23:56:42 +0900 Received: from localhost.localdomain (unknown [10.226.93.27]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 257334250F0B; Wed, 4 May 2022 23:56:38 +0900 (JST) From: Phil Edworthy To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Geert Uytterhoeven Cc: Phil Edworthy , Sergey Shtylyov , Biju Das , Lad Prabhakar , netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH 7/9] ravb: Add support for RZ/V2M Date: Wed, 4 May 2022 15:54:52 +0100 Message-Id: <20220504145454.71287-8-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504145454.71287-1-phil.edworthy@renesas.com> References: <20220504145454.71287-1-phil.edworthy@renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org RZ/V2M Ethernet is very similar to R-Car Gen3 Ethernet-AVB, though some small parts are the same as R-Car Gen2. Other differences are: * It has separate data (DI), error (Line 1) and management (Line 2) irqs rather than one irq for all three. * Instead of using the High-speed peripheral bus clock for gPTP, it has a separate gPTP reference clock. Signed-off-by: Phil Edworthy Reviewed-by: Biju Das --- Note: gPTP was tested using an RZ/V2M EVK and an R-Car M3N Salvator-XS board, connected with a Summit X440 AVB switch, using ptp4l. --- drivers/net/ethernet/renesas/ravb_main.c | 27 ++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c index ded87cb51650..03b127faf52f 100644 --- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c @@ -2461,6 +2461,32 @@ static const struct ravb_hw_info ravb_gen2_hw_info = { .magic_pkt = 1, }; +static const struct ravb_hw_info ravb_rzv2m_hw_info = { + .rx_ring_free = ravb_rx_ring_free_rcar, + .rx_ring_format = ravb_rx_ring_format_rcar, + .alloc_rx_desc = ravb_alloc_rx_desc_rcar, + .receive = ravb_rx_rcar, + .set_rate = ravb_set_rate_rcar, + .set_feature = ravb_set_features_rcar, + .dmac_init = ravb_dmac_init_rcar, + .emac_init = ravb_emac_init_rcar, + .gstrings_stats = ravb_gstrings_stats, + .gstrings_size = sizeof(ravb_gstrings_stats), + .net_hw_features = NETIF_F_RXCSUM, + .net_features = NETIF_F_RXCSUM, + .stats_len = ARRAY_SIZE(ravb_gstrings_stats), + .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1, + .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3, + .rx_max_buf_size = SZ_2K, + .multi_irqs = 1, + .err_mgmt_irqs = 1, + .gptp = 1, + .gptp_ptm_gic = 1, + .gptp_ref_clk = 1, + .nc_queues = 1, + .magic_pkt = 1, +}; + static const struct ravb_hw_info gbeth_hw_info = { .rx_ring_free = ravb_rx_ring_free_gbeth, .rx_ring_format = ravb_rx_ring_format_gbeth, @@ -2488,6 +2514,7 @@ static const struct of_device_id ravb_match_table[] = { { .compatible = "renesas,etheravb-rcar-gen2", .data = &ravb_gen2_hw_info }, { .compatible = "renesas,etheravb-r8a7795", .data = &ravb_gen3_hw_info }, { .compatible = "renesas,etheravb-rcar-gen3", .data = &ravb_gen3_hw_info }, + { .compatible = "renesas,etheravb-rzv2m", .data = &ravb_rzv2m_hw_info }, { .compatible = "renesas,rzg2l-gbeth", .data = &gbeth_hw_info }, { } }; From patchwork Wed May 4 14:54:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12838031 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AD3FC433FE for ; Wed, 4 May 2022 14:57:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351588AbiEDPAj (ORCPT ); Wed, 4 May 2022 11:00:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351644AbiEDPAa (ORCPT ); Wed, 4 May 2022 11:00:30 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B23F02B18E; Wed, 4 May 2022 07:56:52 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,198,1647270000"; d="scan'208";a="118715078" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 May 2022 23:56:51 +0900 Received: from localhost.localdomain (unknown [10.226.93.27]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 640574250F0B; Wed, 4 May 2022 23:56:49 +0900 (JST) From: Phil Edworthy To: Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven Cc: Phil Edworthy , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Biju Das Subject: [PATCH 8/9] arm64: dts: renesas: r9a09g011: Add ethernet nodes Date: Wed, 4 May 2022 15:54:53 +0100 Message-Id: <20220504145454.71287-9-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504145454.71287-1-phil.edworthy@renesas.com> References: <20220504145454.71287-1-phil.edworthy@renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Add Ethernet nodes to SoC dtsi. Signed-off-by: Phil Edworthy Reviewed-by: Biju Das --- arch/arm64/boot/dts/renesas/r9a09g011.dtsi | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi index 27810f4ad4cb..5948d4f0047b 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi @@ -62,6 +62,57 @@ gic: interrupt-controller@82000000 { clock-names = "clk"; }; + avb: ethernet@a3300000 { + compatible = "renesas,etheravb-r9a09g011","renesas,etheravb-rzv2m"; + reg = <0 0xa3300000 0 0x800>; + interrupts = , /* ch0: Rx0 BE */ + , /* ch1: Rx1 NC */ + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , /* ch18: Tx0 BE */ + , /* ch19: Tx1 NC */ + , + , + , /* ch22: DiA */ + , /* DiB */ + , /* Line1_A */ + , /* Line1_B */ + , /* Line2_A */ + , /* Line2_B */ + ; /* ch24: Line3 MAC */ + interrupt-names = "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15", + "ch16", "ch17", "ch18", "ch19", + "ch20", "ch21", "ch22", "dib", + "err_a", "err_b", "mgmt_a", "mgmt_b", + "ch24"; + clocks = <&cpg CPG_MOD R9A09G011_ETH0_CLK_AXI>, + <&cpg CPG_MOD R9A09G011_ETH0_CLK_CHI>, + <&cpg CPG_MOD R9A09G011_ETH0_GPTP_EXT>; + clock-names = "axi", "chi", "gptp"; + resets = <&cpg R9A09G011_ETH0_RST_HW_N>; + power-domains = <&cpg>; + #address-cells = <1>; + #size-cells = <0>; + status = "disable"; + }; + cpg: clock-controller@a3500000 { compatible = "renesas,r9a09g011-cpg"; reg = <0 0xa3500000 0 0x1000>; From patchwork Wed May 4 14:54:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 12838033 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D4CAC433EF for ; Wed, 4 May 2022 14:57:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243441AbiEDPA7 (ORCPT ); Wed, 4 May 2022 11:00:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351601AbiEDPAi (ORCPT ); Wed, 4 May 2022 11:00:38 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 9C31D286F6; Wed, 4 May 2022 07:57:02 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,198,1647270000"; d="scan'208";a="118715133" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 04 May 2022 23:57:01 +0900 Received: from localhost.localdomain (unknown [10.226.93.27]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 4E18C4250F07; Wed, 4 May 2022 23:56:59 +0900 (JST) From: Phil Edworthy To: Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven Cc: Phil Edworthy , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Biju Das Subject: [PATCH 9/9] arm64: dts: renesas: rzv2m evk: Enable ethernet Date: Wed, 4 May 2022 15:54:54 +0100 Message-Id: <20220504145454.71287-10-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504145454.71287-1-phil.edworthy@renesas.com> References: <20220504145454.71287-1-phil.edworthy@renesas.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Enable Ethernet interface on RZ/V2M EVK. Signed-off-by: Phil Edworthy Reviewed-by: Biju Das --- arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts index 41cba82c2252..ec7099211cab 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts @@ -14,6 +14,7 @@ / { aliases { serial0 = &uart0; + ethernet0 = &avb; }; chosen { @@ -42,3 +43,16 @@ &extal_clk { &uart0 { status = "okay"; }; + +&avb { + renesas,no-ether-link; + phy-handle = <&phy0>; + phy-mode = "gmii"; + status = "okay"; + + phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id0022.1622", + "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +};