From patchwork Fri May 6 13:11:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juha-Pekka Heikkila X-Patchwork-Id: 12841101 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 280F8C433EF for ; Fri, 6 May 2022 13:11:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7D78611217A; Fri, 6 May 2022 13:11:14 +0000 (UTC) Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by gabe.freedesktop.org (Postfix) with ESMTPS id E32FA112176 for ; Fri, 6 May 2022 13:11:13 +0000 (UTC) Received: by mail-wr1-x42b.google.com with SMTP id v12so9957427wrv.10 for ; Fri, 06 May 2022 06:11:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=7X0+c5X4D2RU5wNoX3avM3Po6F4OpThOgwRy6Ib0igE=; b=OQ2SF8x7bj9b82fbGn2NyYzHatBHx1CMpxh1vIwQqVuGEf7puAxMtseya2MKHics7Y A2rGmcF7SKV11GD1uBZpv2H69EyNIuIaViwWVUq4yBkb5bSGMClSDl9vclpLyieZH1/U TmpfbZFLuHLakGF6oXdOmLp535SpcxSILVsjqwzoAWIfc/W9d1+9A/EdFYkCaYWN7Ra0 6dlHdH1AKahqc2dCHlE87+CZs1FNjfNgV+bCDlrbXM/z4LRp9+SRNlpMtdDozxf0r6EK hZL0fyO9C7Dz/2g0HWVAK4gQcZeYJm62+yjqsU6uj+qz8KNSCcWNzFR2nLZ12PqkUDhp vgzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=7X0+c5X4D2RU5wNoX3avM3Po6F4OpThOgwRy6Ib0igE=; b=Ov6gr2+v550pDvhkxwtd9LzOZMjoRIDqEOnw7MpLH7G0jweP99Un1mPqEpHt6TjwjO i0+dfB9DmUMPgjrrgAsNq84KDMdGNqRS4sSA9aL5Ogc/BEO70B15isgcerDwTJginWuH JY2KkPRHk2To9/98LbWChf4UhoG7uxjDrZFSqIY3ZxZBygASUltULGSbNcIjPHPSpn+T VzqBqvkt86OcKiaR0MOmsHC2pp0hWJBx2W5KIVO1TzCfS+h/h43JtcI3u9biNE7vLrOU 0Klbtpec9iaJ34eakj+9yib8hFkyNWFGDMkRcyTi5xdGQ8tWdvsc0SubmzqYArUqSIrj qj6Q== X-Gm-Message-State: AOAM5316prs9doJF6W/Am2q5DAOp2h/qZMUd2L7ssFezNVkkD8WyQVN4 pvJricAbLUnKCF+a50JAvXUoClXm9xU8Og== X-Google-Smtp-Source: ABdhPJzoOMcZOcl6gZv5vbD6GVj3tFBmPOA5dCUUmc3i/akj8GyFsVZSXYl2JqBWJPQCtagGkfyzMA== X-Received: by 2002:adf:de83:0:b0:20a:cbb5:903a with SMTP id w3-20020adfde83000000b0020acbb5903amr2641507wrl.544.1651842671976; Fri, 06 May 2022 06:11:11 -0700 (PDT) Received: from jheikkil-mobl.home (77-105-100-22.lpok.fi. [77.105.100.22]) by smtp.gmail.com with ESMTPSA id l1-20020a1ced01000000b003942a244f4fsm8769551wmh.40.2022.05.06.06.11.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 May 2022 06:11:11 -0700 (PDT) From: Juha-Pekka Heikkila To: intel-gfx@lists.freedesktop.org Date: Fri, 6 May 2022 16:11:08 +0300 Message-Id: <20220506131109.20942-1-juhapekka.heikkila@gmail.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/2] drm/i915/display: Add smem fallback allocation for dpt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add fallback smem allocation for dpt if stolen memory allocation failed. Signed-off-by: Juha-Pekka Heikkila Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/display/intel_dpt.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c index fb0e7e79e0cd..10008699656e 100644 --- a/drivers/gpu/drm/i915/display/intel_dpt.c +++ b/drivers/gpu/drm/i915/display/intel_dpt.c @@ -10,6 +10,7 @@ #include "intel_display_types.h" #include "intel_dpt.h" #include "intel_fb.h" +#include "gem/i915_gem_internal.h" struct i915_dpt { struct i915_address_space vm; @@ -128,6 +129,10 @@ struct i915_vma *intel_dpt_pin(struct i915_address_space *vm) void __iomem *iomem; struct i915_gem_ww_ctx ww; int err; + u64 pin_flags = 0; + + if (!i915_gem_object_is_lmem(dpt->obj)) + pin_flags |= PIN_MAPPABLE; wakeref = intel_runtime_pm_get(&i915->runtime_pm); atomic_inc(&i915->gpu_error.pending_fb_pin); @@ -138,7 +143,7 @@ struct i915_vma *intel_dpt_pin(struct i915_address_space *vm) continue; vma = i915_gem_object_ggtt_pin_ww(dpt->obj, &ww, NULL, 0, 4096, - HAS_LMEM(i915) ? 0 : PIN_MAPPABLE); + pin_flags); if (IS_ERR(vma)) { err = PTR_ERR(vma); continue; @@ -248,10 +253,13 @@ intel_dpt_create(struct intel_framebuffer *fb) size = round_up(size * sizeof(gen8_pte_t), I915_GTT_PAGE_SIZE); - if (HAS_LMEM(i915)) - dpt_obj = i915_gem_object_create_lmem(i915, size, I915_BO_ALLOC_CONTIGUOUS); - else + dpt_obj = i915_gem_object_create_lmem(i915, size, I915_BO_ALLOC_CONTIGUOUS); + if (IS_ERR(dpt_obj) && i915_ggtt_has_aperture(to_gt(i915)->ggtt)) dpt_obj = i915_gem_object_create_stolen(i915, size); + if (IS_ERR(dpt_obj) && !HAS_LMEM(i915)) { + drm_dbg_kms(&i915->drm, "Allocating dpt from smem\n"); + dpt_obj = i915_gem_object_create_internal(i915, size); + } if (IS_ERR(dpt_obj)) return ERR_CAST(dpt_obj); From patchwork Fri May 6 13:11:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juha-Pekka Heikkila X-Patchwork-Id: 12841102 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4E2E9C433F5 for ; Fri, 6 May 2022 13:11:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1083811217D; Fri, 6 May 2022 13:11:16 +0000 (UTC) Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by gabe.freedesktop.org (Postfix) with ESMTPS id DEE46112179 for ; Fri, 6 May 2022 13:11:14 +0000 (UTC) Received: by mail-wr1-x436.google.com with SMTP id k2so9975779wrd.5 for ; Fri, 06 May 2022 06:11:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=PoWrmb14+umfaTXUFOYTh10BM2aQ55bYDFeH9VrAbb0=; b=LCFqhtBeWX5W4YlGSBaoOAztNAMqh56SdLBvla60mJecNWm9gS0mYMoLt8nSU980cy AE7th+fx0ISzNrW+eSbn95+Wg6+jh/eXVgdUhdHQ6b1diWIeyFYYOYmT8pVDopWHbdpu 1F60eaXEmigNBLJjNR90crIXy4BwqyxiqXVCuOdnOcFrEAxeJ94DxQydbWz9WFGG1isw p7TRnVnbCrYWbkMbfpdtJ9gKwX4tmNcHVY+kzLgEC3pkiMtGdohdVGaogGx/Jp2L4Qbd qW587j4V9GSjlJVRnZw4A+VYhxw5kRf73aDQUj5Po0BTokUkjxqKb0MuArmMgKpf+4J6 yk4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PoWrmb14+umfaTXUFOYTh10BM2aQ55bYDFeH9VrAbb0=; b=57ZapDHmT06HW+jeGVFiGwTHhTREZ20Cxf4IAAyNN6bQqwvSaodu5aMnv7qs4vcPDJ /uNfcRMlhoeYnwNtDT3PGTtw8KeRrn32UCHLBe+qBXJL1BF0EiTsuDZlxEn9BxqxLGhf f6q/n5cAUM010CBvPb9eJXCtIT5QCMTIybuAmhrBg7ymHHmHvsiHNmffnNgFxWy0l7Tf IdPedImniIM9DQJYjCJjGlqzhKEJXiByWl4/1QSnyhYRgOrOUsRqcRTSLYJ+mnnl2ffL Jr9UnFtHgSlg4RS/JTHvM1wlc7goj/Ot7aZihXDHnD9v/x7FuqvFtas77IvyGHkHdypd Wl8w== X-Gm-Message-State: AOAM533Fbc4PZ9zGTRSG0gXVDl/uG3G/zRM4VnMcJO79ZT7mPLBWNeKS QG1AuFasrAkCGyMyt1QPeXWMUoCsd+aXBA== X-Google-Smtp-Source: ABdhPJzoUbYX8nb3my+NZiKRn4ca+Sb3MjSRWyTLLs/1wPNutofFyDLSOVFb8lMPLlQ2NamGYp86oA== X-Received: by 2002:a5d:510a:0:b0:20c:4452:3161 with SMTP id s10-20020a5d510a000000b0020c44523161mr2704976wrt.31.1651842672984; Fri, 06 May 2022 06:11:12 -0700 (PDT) Received: from jheikkil-mobl.home (77-105-100-22.lpok.fi. [77.105.100.22]) by smtp.gmail.com with ESMTPSA id l1-20020a1ced01000000b003942a244f4fsm8769551wmh.40.2022.05.06.06.11.12 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 May 2022 06:11:12 -0700 (PDT) From: Juha-Pekka Heikkila To: intel-gfx@lists.freedesktop.org Date: Fri, 6 May 2022 16:11:09 +0300 Message-Id: <20220506131109.20942-2-juhapekka.heikkila@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20220506131109.20942-1-juhapekka.heikkila@gmail.com> References: <20220506131109.20942-1-juhapekka.heikkila@gmail.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Fix i915_vma_pin_iomap() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: CQ Tang Display might allocate a smem object and call i915_vma_pin_iomap(), the existing code will fail. This fix was suggested by Chris P Wilson, that we pin the smem with i915_gem_object_pin_map_unlocked(). Signed-off-by: CQ Tang Signed-off-by: Juha-Pekka Heikkila Cc: Chris Wilson Cc: Jari Tahvanainen Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/i915_vma.c | 34 ++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index 162e8d83691b..8ce016ef3dba 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@ -550,13 +550,6 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma) if (WARN_ON_ONCE(vma->obj->flags & I915_BO_ALLOC_GPU_ONLY)) return IO_ERR_PTR(-EINVAL); - if (!i915_gem_object_is_lmem(vma->obj)) { - if (GEM_WARN_ON(!i915_vma_is_map_and_fenceable(vma))) { - err = -ENODEV; - goto err; - } - } - GEM_BUG_ON(!i915_vma_is_ggtt(vma)); GEM_BUG_ON(!i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND)); GEM_BUG_ON(i915_vma_verify_bind_complete(vma)); @@ -572,17 +565,31 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma) if (i915_gem_object_is_lmem(vma->obj)) ptr = i915_gem_object_lmem_io_map(vma->obj, 0, vma->obj->base.size); - else + else if (i915_vma_is_map_and_fenceable(vma)) ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap, vma->node.start, vma->node.size); + else { + ptr = (void __iomem *) + i915_gem_object_pin_map_unlocked(vma->obj, + I915_MAP_WC); + if (IS_ERR(ptr)) { + err = PTR_ERR(ptr); + goto err; + } + ptr = page_pack_bits(ptr, 1); + } + if (ptr == NULL) { err = -ENOMEM; goto err; } if (unlikely(cmpxchg(&vma->iomap, NULL, ptr))) { - io_mapping_unmap(ptr); + if (page_unmask_bits(ptr)) + __i915_gem_object_release_map(vma->obj); + else + io_mapping_unmap(ptr); ptr = vma->iomap; } } @@ -596,7 +603,7 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma) i915_vma_set_ggtt_write(vma); /* NB Access through the GTT requires the device to be awake. */ - return ptr; + return page_mask_bits(ptr); err_unpin: __i915_vma_unpin(vma); @@ -614,6 +621,8 @@ void i915_vma_unpin_iomap(struct i915_vma *vma) { GEM_BUG_ON(vma->iomap == NULL); + /* XXX We keep the mapping until __i915_vma_unbind()/evict() */ + i915_vma_flush_writes(vma); i915_vma_unpin_fence(vma); @@ -1761,7 +1770,10 @@ static void __i915_vma_iounmap(struct i915_vma *vma) if (vma->iomap == NULL) return; - io_mapping_unmap(vma->iomap); + if (page_unmask_bits(vma->iomap)) + __i915_gem_object_release_map(vma->obj); + else + io_mapping_unmap(vma->iomap); vma->iomap = NULL; }