From patchwork Wed Jan 9 18:56:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 10754823 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6C03B13B5 for ; Wed, 9 Jan 2019 18:57:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5C33F28702 for ; Wed, 9 Jan 2019 18:57:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4D69B28D0E; Wed, 9 Jan 2019 18:57:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0150F28702 for ; Wed, 9 Jan 2019 18:57:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 511D16ECC4; Wed, 9 Jan 2019 18:57:37 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by gabe.freedesktop.org (Postfix) with ESMTPS id 16F496ECC6 for ; Wed, 9 Jan 2019 18:57:36 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: ezequiel) with ESMTPSA id 019C6276DA0 From: Ezequiel Garcia To: dri-devel@lists.freedesktop.org Subject: [PATCH 1/3] drm/rockchip: Fix typo in VOP macros argument Date: Wed, 9 Jan 2019 15:56:37 -0300 Message-Id: <20190109185639.5093-2-ezequiel@collabora.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190109185639.5093-1-ezequiel@collabora.com> References: <20190109185639.5093-1-ezequiel@collabora.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniele Castagna , Tomasz Figa , linux-rockchip@lists.infradead.org, Sean Paul , "Kristian H . Kristensen" , kernel@collabora.com, Ezequiel Garcia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Fix a small typo in the macros VOP argument. The macro argument is currently wrongly named "x", and then never used. The code built fine almost by accident, as the macros are always used in a context where a proper "vop" symbol exists. This fix is almost cosmetic, as the resulting code shouldn't change. Signed-off-by: Ezequiel Garcia --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 7ad9067b3110..fe800f784c18 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -45,21 +45,21 @@ #include "rockchip_drm_vop.h" #include "rockchip_rgb.h" -#define VOP_WIN_SET(x, win, name, v) \ +#define VOP_WIN_SET(vop, win, name, v) \ vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name) -#define VOP_SCL_SET(x, win, name, v) \ +#define VOP_SCL_SET(vop, win, name, v) \ vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name) -#define VOP_SCL_SET_EXT(x, win, name, v) \ +#define VOP_SCL_SET_EXT(vop, win, name, v) \ vop_reg_set(vop, &win->phy->scl->ext->name, \ win->base, ~0, v, #name) -#define VOP_WIN_YUV2YUV_SET(x, win_yuv2yuv, name, v) \ +#define VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, name, v) \ do { \ if (win_yuv2yuv && win_yuv2yuv->name.mask) \ vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \ } while (0) -#define VOP_WIN_YUV2YUV_COEFFICIENT_SET(x, win_yuv2yuv, name, v) \ +#define VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, win_yuv2yuv, name, v) \ do { \ if (win_yuv2yuv && win_yuv2yuv->phy->name.mask) \ vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \ @@ -85,8 +85,8 @@ #define VOP_INTR_GET_TYPE(vop, name, type) \ vop_get_intr_type(vop, &vop->data->intr->name, type) -#define VOP_WIN_GET(x, win, name) \ - vop_read_reg(x, win->offset, win->phy->name) +#define VOP_WIN_GET(vop, win, name) \ + vop_read_reg(vop, win->offset, win->phy->name) #define VOP_WIN_GET_YRGBADDR(vop, win) \ vop_readl(vop, win->base + win->phy->yrgb_mst.offset) From patchwork Wed Jan 9 18:56:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 10754829 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7855E6C2 for ; Wed, 9 Jan 2019 18:57:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 674DC28702 for ; Wed, 9 Jan 2019 18:57:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5B62128D0E; Wed, 9 Jan 2019 18:57:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E7BAA28702 for ; Wed, 9 Jan 2019 18:57:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CB6B76ECC6; Wed, 9 Jan 2019 18:57:40 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4C8AF6ECC6 for ; Wed, 9 Jan 2019 18:57:39 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: ezequiel) with ESMTPSA id 619DB276DA9 From: Ezequiel Garcia To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/3] drm/rockchip: Separate RK3288 from RK3368 win01 registers Date: Wed, 9 Jan 2019 15:56:38 -0300 Message-Id: <20190109185639.5093-3-ezequiel@collabora.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190109185639.5093-1-ezequiel@collabora.com> References: <20190109185639.5093-1-ezequiel@collabora.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniele Castagna , Tomasz Figa , linux-rockchip@lists.infradead.org, Sean Paul , "Kristian H . Kristensen" , kernel@collabora.com, Ezequiel Garcia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This commit splits the registers for RK3288 from those for RK3328, RK3368 and RK3399. It seems RK3288 does not support plane x-y-mirroring, and so in order to support this for the other SoCs, we need to have separate set of registers for win0 and win1. Signed-off-by: Ezequiel Garcia --- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 31 +++++++++++++++++---- 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index fe752df4e038..4f7000b5f9ed 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -550,6 +550,25 @@ static const struct vop_intr rk3368_vop_intr = { .clear = VOP_REG_MASK_SYNC(RK3368_INTR_CLEAR, 0x3fff, 0), }; +static const struct vop_win_phy rk3368_win01_data = { + .scl = &rk3288_win_full_scl, + .data_formats = formats_win_full, + .nformats = ARRAY_SIZE(formats_win_full), + .enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0), + .format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1), + .rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12), + .act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0), + .dsp_info = VOP_REG(RK3368_WIN0_DSP_INFO, 0x0fff0fff, 0), + .dsp_st = VOP_REG(RK3368_WIN0_DSP_ST, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(RK3368_WIN0_YRGB_MST, 0xffffffff, 0), + .uv_mst = VOP_REG(RK3368_WIN0_CBR_MST, 0xffffffff, 0), + .yrgb_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 0), + .uv_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 16), + .src_alpha_ctl = VOP_REG(RK3368_WIN0_SRC_ALPHA_CTRL, 0xff, 0), + .dst_alpha_ctl = VOP_REG(RK3368_WIN0_DST_ALPHA_CTRL, 0xff, 0), + .channel = VOP_REG(RK3368_WIN0_CTRL2, 0xff, 0), +}; + static const struct vop_win_phy rk3368_win23_data = { .data_formats = formats_win_lite, .nformats = ARRAY_SIZE(formats_win_lite), @@ -566,9 +585,9 @@ static const struct vop_win_phy rk3368_win23_data = { }; static const struct vop_win_data rk3368_vop_win_data[] = { - { .base = 0x00, .phy = &rk3288_win01_data, + { .base = 0x00, .phy = &rk3368_win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, - { .base = 0x40, .phy = &rk3288_win01_data, + { .base = 0x40, .phy = &rk3368_win01_data, .type = DRM_PLANE_TYPE_OVERLAY }, { .base = 0x00, .phy = &rk3368_win23_data, .type = DRM_PLANE_TYPE_OVERLAY }, @@ -679,7 +698,7 @@ static const struct vop_data rk3399_vop_big = { }; static const struct vop_win_data rk3399_vop_lit_win_data[] = { - { .base = 0x00, .phy = &rk3288_win01_data, + { .base = 0x00, .phy = &rk3368_win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, { .base = 0x00, .phy = &rk3368_win23_data, .type = DRM_PLANE_TYPE_CURSOR}, @@ -766,11 +785,11 @@ static const struct vop_intr rk3328_vop_intr = { }; static const struct vop_win_data rk3328_vop_win_data[] = { - { .base = 0xd0, .phy = &rk3288_win01_data, + { .base = 0xd0, .phy = &rk3368_win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, - { .base = 0x1d0, .phy = &rk3288_win01_data, + { .base = 0x1d0, .phy = &rk3368_win01_data, .type = DRM_PLANE_TYPE_OVERLAY }, - { .base = 0x2d0, .phy = &rk3288_win01_data, + { .base = 0x2d0, .phy = &rk3368_win01_data, .type = DRM_PLANE_TYPE_CURSOR }, }; From patchwork Wed Jan 9 18:56:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 10754831 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AD85F6C2 for ; Wed, 9 Jan 2019 18:57:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9920928702 for ; Wed, 9 Jan 2019 18:57:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8C8ED28D53; Wed, 9 Jan 2019 18:57:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1B86728702 for ; Wed, 9 Jan 2019 18:57:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 328B66ECC7; Wed, 9 Jan 2019 18:57:44 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by gabe.freedesktop.org (Postfix) with ESMTPS id A71276ECC8 for ; Wed, 9 Jan 2019 18:57:42 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: ezequiel) with ESMTPSA id BA8392756F0 From: Ezequiel Garcia To: dri-devel@lists.freedesktop.org Subject: [PATCH 3/3] drm/rockchip: Add reflection properties Date: Wed, 9 Jan 2019 15:56:39 -0300 Message-Id: <20190109185639.5093-4-ezequiel@collabora.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190109185639.5093-1-ezequiel@collabora.com> References: <20190109185639.5093-1-ezequiel@collabora.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniele Castagna , Tomasz Figa , linux-rockchip@lists.infradead.org, Sean Paul , "Kristian H . Kristensen" , kernel@collabora.com, Ezequiel Garcia Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Daniele Castagna Add the KMS plane rotation property to the DRM rockchip driver, for SoCs RK3328, RK3368 and RK3399. RK3288 only supports rotation at the display level (i.e. CRTC), but for now we are only interested in plane rotation. This commit only adds support for the value of reflect-y and reflect-x (i.e. mirroring). Note that y-mirroring is not compatible with YUV. The following modetest commands would test this feature, where 30 is the plane ID, and 49 = rotate_0 + relect_y + reflect_x. X mirror: modetest -s 43@33:1920x1080@XR24 -w 30:rotation:17 Y mirror: modetest -s 43@33:1920x1080@XR24 -w 30:rotation:33 XY mirror: modetest -s 43@33:1920x1080@XR24 -w 30:rotation:49 Signed-off-by: Daniele Castagna Signed-off-by: Ezequiel Garcia --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 33 +++++++++++++++++++++ drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 2 ++ drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 3 ++ 3 files changed, 38 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index fe800f784c18..5185a31318f5 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -88,6 +88,9 @@ #define VOP_WIN_GET(vop, win, name) \ vop_read_reg(vop, win->offset, win->phy->name) +#define VOP_WIN_HAS_REG(win, name) \ + !!(win->phy->name.mask) + #define VOP_WIN_GET_YRGBADDR(vop, win) \ vop_readl(vop, win->base + win->phy->yrgb_mst.offset) @@ -711,6 +714,11 @@ static int vop_plane_atomic_check(struct drm_plane *plane, return -EINVAL; } + if (fb->format->is_yuv && state->rotation & DRM_MODE_REFLECT_Y) { + DRM_ERROR("Invalid Source: Yuv format does not support this rotation\n"); + return -EINVAL; + } + return 0; } @@ -789,6 +797,13 @@ static void vop_plane_atomic_update(struct drm_plane *plane, offset += (src->y1 >> 16) * fb->pitches[0]; dma_addr = rk_obj->dma_addr + offset + fb->offsets[0]; + /* + * For y-mirroring we need to move address + * to the beginning of the last line. + */ + if (state->rotation & DRM_MODE_REFLECT_Y) + dma_addr += (actual_h - 1) * fb->pitches[0]; + format = vop_convert_format(fb->format->format); spin_lock(&vop->reg_lock); @@ -797,6 +812,10 @@ static void vop_plane_atomic_update(struct drm_plane *plane, VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4)); VOP_WIN_SET(vop, win, yrgb_mst, dma_addr); VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, y2r_en, is_yuv); + VOP_WIN_SET(vop, win, y_mir_en, + (state->rotation & DRM_MODE_REFLECT_Y) ? 1 : 0); + VOP_WIN_SET(vop, win, x_mir_en, + (state->rotation & DRM_MODE_REFLECT_X) ? 1 : 0); if (is_yuv) { int hsub = drm_format_horz_chroma_subsampling(fb->format->format); @@ -1311,6 +1330,18 @@ static irqreturn_t vop_isr(int irq, void *data) return ret; } +static void vop_plane_add_properties(struct drm_plane *plane, + const struct vop_win_data *win_data) +{ + unsigned int flags = 0; + + flags |= VOP_WIN_HAS_REG(win_data, x_mir_en) ? DRM_MODE_REFLECT_X : 0; + flags |= VOP_WIN_HAS_REG(win_data, y_mir_en) ? DRM_MODE_REFLECT_Y : 0; + if (flags) + drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, + DRM_MODE_ROTATE_0 | flags); +} + static int vop_create_crtc(struct vop *vop) { const struct vop_data *vop_data = vop->data; @@ -1348,6 +1379,7 @@ static int vop_create_crtc(struct vop *vop) plane = &vop_win->base; drm_plane_helper_add(plane, &plane_helper_funcs); + vop_plane_add_properties(plane, win_data); if (plane->type == DRM_PLANE_TYPE_PRIMARY) primary = plane; else if (plane->type == DRM_PLANE_TYPE_CURSOR) @@ -1385,6 +1417,7 @@ static int vop_create_crtc(struct vop *vop) goto err_cleanup_crtc; } drm_plane_helper_add(&vop_win->base, &plane_helper_funcs); + vop_plane_add_properties(&vop_win->base, win_data); } port = of_get_child_by_name(dev->of_node, "port"); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index aed467cd81b9..04ed401d2325 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -146,6 +146,8 @@ struct vop_win_phy { struct vop_reg uv_mst; struct vop_reg yrgb_vir; struct vop_reg uv_vir; + struct vop_reg y_mir_en; + struct vop_reg x_mir_en; struct vop_reg dst_alpha_ctl; struct vop_reg src_alpha_ctl; diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 4f7000b5f9ed..204d861b8f35 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -557,6 +557,8 @@ static const struct vop_win_phy rk3368_win01_data = { .enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0), .format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1), .rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12), + .x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21), + .y_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 22), .act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0), .dsp_info = VOP_REG(RK3368_WIN0_DSP_INFO, 0x0fff0fff, 0), .dsp_st = VOP_REG(RK3368_WIN0_DSP_ST, 0x1fff1fff, 0), @@ -576,6 +578,7 @@ static const struct vop_win_phy rk3368_win23_data = { .enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4), .format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5), .rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20), + .y_mir_en = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15), .dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0), .dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0), .yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),