From patchwork Tue May 24 09:35:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 12859898 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C4FDC4332F for ; Tue, 24 May 2022 09:35:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235690AbiEXJfQ (ORCPT ); Tue, 24 May 2022 05:35:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235694AbiEXJfP (ORCPT ); Tue, 24 May 2022 05:35:15 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D37305FF3D; Tue, 24 May 2022 02:35:13 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id 3223E1F42BE9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653384912; bh=/HUYMQUZzdBAjQXE3aaXZwy4OOxFI8w5rmaGmz21Fek=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bam8Hv+/gwV41nT/XOqLQaKPSnGOtK97i9xkzVh/TtlvLEvimHUaivlBprBgN3QGS PjGbwHRz2hID4cFt6uOsbEK83LU4au39vdbkn8aIB/eA6lAy3/i4YL+0MIEsT9zDjw BnxH0JO+7u99irflF/mGFagkAMFYnhKjkTpe3dyC7yLma+RBX0wli7743MdbgAfVY8 L8Qc4B59tS3CEfpffYyilrPwcTq8lANrGMJvCipI9rLfmLbqhl2V8cAdjTX1pN9oHD uXYxIUVEKTmlOVzp+X0Kcx+PSLuM6R176sb7zlOe3iVXWFjMd3wku9XnNwix50IhEn 1kM+8PiTObalA== From: AngeloGioacchino Del Regno To: dmitry.torokhov@gmail.com Cc: matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, mkorpershoek@baylibre.com, linux-input@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/3] Input: mtk-pmic-keys - Transfer per-key bit in mtk_pmic_keys_regs Date: Tue, 24 May 2022 11:35:03 +0200 Message-Id: <20220524093505.85438-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220524093505.85438-1-angelogioacchino.delregno@collabora.com> References: <20220524093505.85438-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org Place the key bit in struct mtk_pmic_keys_regs to enhance this driver's flexibility, in preparation for adding support for more PMICs. While at it, remove the definition of MTK_PMIC_RST_KEY_MASK as we are now dynamically setting the keymask relatively to the keys that are defined in the newly added rst_en_mask variable, on a per-key basis. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Mattijs Korpershoek --- drivers/input/keyboard/mtk-pmic-keys.c | 30 ++++++++++++++++---------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index d2f0db245ff6..2509a349a173 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -20,7 +20,6 @@ #define MTK_PMIC_RST_DU_MASK GENMASK(9, 8) #define MTK_PMIC_RST_DU_SHIFT 8 -#define MTK_PMIC_RST_KEY_MASK GENMASK(6, 5) #define MTK_PMIC_PWRKEY_RST BIT(6) #define MTK_PMIC_HOMEKEY_RST BIT(5) @@ -33,15 +32,17 @@ struct mtk_pmic_keys_regs { u32 deb_mask; u32 intsel_reg; u32 intsel_mask; + u32 rst_en_mask; }; #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \ - _intsel_reg, _intsel_mask) \ + _intsel_reg, _intsel_mask, _rst_mask) \ { \ .deb_reg = _deb_reg, \ .deb_mask = _deb_mask, \ .intsel_reg = _intsel_reg, \ .intsel_mask = _intsel_mask, \ + .rst_en_mask = _rst_mask, \ } struct mtk_pmic_regs { @@ -52,30 +53,32 @@ struct mtk_pmic_regs { static const struct mtk_pmic_regs mt6397_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS, - 0x8, MT6397_INT_RSV, 0x10), + 0x8, MT6397_INT_RSV, 0x10, MTK_PMIC_PWRKEY_RST), .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2, - 0x10, MT6397_INT_RSV, 0x8), + 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_HOMEKEY_RST), .pmic_rst_reg = MT6397_TOP_RST_MISC, }; static const struct mtk_pmic_regs mt6323_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, - 0x2, MT6323_INT_MISC_CON, 0x10), + 0x2, MT6323_INT_MISC_CON, 0x10, MTK_PMIC_PWRKEY_RST), .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, - 0x4, MT6323_INT_MISC_CON, 0x8), + 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_HOMEKEY_RST), .pmic_rst_reg = MT6323_TOP_RST_MISC, }; static const struct mtk_pmic_regs mt6358_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, - 0x2, MT6358_PSC_TOP_INT_CON0, 0x5), + 0x2, MT6358_PSC_TOP_INT_CON0, 0x5, + MTK_PMIC_PWRKEY_RST), .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, - 0x8, MT6358_PSC_TOP_INT_CON0, 0xa), + 0x8, MT6358_PSC_TOP_INT_CON0, 0xa, + MTK_PMIC_HOMEKEY_RST), .pmic_rst_reg = MT6358_TOP_RST_MISC, }; @@ -104,10 +107,14 @@ enum mtk_pmic_keys_lp_mode { static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, u32 pmic_rst_reg) { + const struct mtk_pmic_keys_regs *kregs_home, *kregs_pwr; u32 long_press_mode, long_press_debounce; u32 value, mask; int error; + kregs_home = keys->keys[MTK_PMIC_HOMEKEY_INDEX].regs; + kregs_pwr = keys->keys[MTK_PMIC_PWRKEY_INDEX].regs; + error = of_property_read_u32(keys->dev->of_node, "power-off-time-sec", &long_press_debounce); if (error) @@ -124,15 +131,16 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, switch (long_press_mode) { case LP_TWOKEY: - value |= MTK_PMIC_HOMEKEY_RST; + value |= kregs_home->rst_en_mask; fallthrough; case LP_ONEKEY: - value |= MTK_PMIC_PWRKEY_RST; + value |= kregs_pwr->rst_en_mask; fallthrough; case LP_DISABLE: - mask |= MTK_PMIC_RST_KEY_MASK; + mask |= kregs_home->rst_en_mask; + mask |= kregs_pwr->rst_en_mask; break; default: From patchwork Tue May 24 09:35:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 12859900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98AD9C43217 for ; Tue, 24 May 2022 09:35:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235685AbiEXJfR (ORCPT ); Tue, 24 May 2022 05:35:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235695AbiEXJfP (ORCPT ); Tue, 24 May 2022 05:35:15 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DA465FF1E; Tue, 24 May 2022 02:35:14 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id D11401F42BEA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653384913; bh=rg+O5GDCFPT74K8q7Q+BQyRmVOj5osZx/xFCPhBlHuk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bdOeDcJPmzWFsvEE+/BaU4R23GwaCQ12+xxG98ifXPrfHLgn17HL2LEMlmcKthnch qDPCGDAVhZpwKVk7JSeeSt4W+u008+NfjdtTgSvX6aONLcZg8YpP3Z9NpFAQ3VKsKC S1urtQuqGFfWHeC/k9vlWdR4wr8i3oFUwjS6N5Lx4rOtoCZnBiHKQ32kqMvq/GCKsW 2QjTKqtbeNBhTw0EgdRKo1FQ1YWFUyr7tIji2uJYjTjPt0Uh7TtA6RTv8+qm7+J2CX 43AOw/ndKVIGwI5/VaFJx3Zjy88O8uX+8CyKrFONo2wd2g+432QklU4swND6DolHDL 4aq6t+9je/yGQ== From: AngeloGioacchino Del Regno To: dmitry.torokhov@gmail.com Cc: matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, mkorpershoek@baylibre.com, linux-input@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] Input: mtk-pmic-keys - Move long press debounce mask to mtk_pmic_regs Date: Tue, 24 May 2022 11:35:04 +0200 Message-Id: <20220524093505.85438-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220524093505.85438-1-angelogioacchino.delregno@collabora.com> References: <20220524093505.85438-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org As the second and last step of preparation to add support for more PMICs in this driver, move the long press debounce mask to struct mtk_pmic_regs and use that in mtk_pmic_keys_lp_reset_setup() instead of directly using the definition. While at it, remove the definition for MTK_PMIC_RST_DU_SHIFT as we are able to calculate it dynamically and spares us some unnecessary new definitions around for future per-PMIC variations of RST_DU_MASK. Lastly, it was necessary to change the function signature of mtk_pmic_keys_lp_reset_setup() to now pass a pointer to the main mtk_pmic_regs structure, since that's where the reset debounce mask now resides. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Mattijs Korpershoek --- drivers/input/keyboard/mtk-pmic-keys.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index 2509a349a173..6404081253ea 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -19,7 +19,6 @@ #include #define MTK_PMIC_RST_DU_MASK GENMASK(9, 8) -#define MTK_PMIC_RST_DU_SHIFT 8 #define MTK_PMIC_PWRKEY_RST BIT(6) #define MTK_PMIC_HOMEKEY_RST BIT(5) @@ -48,6 +47,7 @@ struct mtk_pmic_keys_regs { struct mtk_pmic_regs { const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT]; u32 pmic_rst_reg; + u32 rst_lprst_mask; /* Long-press reset timeout bitmask */ }; static const struct mtk_pmic_regs mt6397_regs = { @@ -58,6 +58,7 @@ static const struct mtk_pmic_regs mt6397_regs = { MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2, 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_HOMEKEY_RST), .pmic_rst_reg = MT6397_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, }; static const struct mtk_pmic_regs mt6323_regs = { @@ -68,6 +69,7 @@ static const struct mtk_pmic_regs mt6323_regs = { MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_HOMEKEY_RST), .pmic_rst_reg = MT6323_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, }; static const struct mtk_pmic_regs mt6358_regs = { @@ -80,6 +82,7 @@ static const struct mtk_pmic_regs mt6358_regs = { 0x8, MT6358_PSC_TOP_INT_CON0, 0xa, MTK_PMIC_HOMEKEY_RST), .pmic_rst_reg = MT6358_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, }; struct mtk_pmic_keys_info { @@ -105,7 +108,7 @@ enum mtk_pmic_keys_lp_mode { }; static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, - u32 pmic_rst_reg) + const struct mtk_pmic_regs *regs) { const struct mtk_pmic_keys_regs *kregs_home, *kregs_pwr; u32 long_press_mode, long_press_debounce; @@ -120,8 +123,8 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, if (error) long_press_debounce = 0; - mask = MTK_PMIC_RST_DU_MASK; - value = long_press_debounce << MTK_PMIC_RST_DU_SHIFT; + mask = regs->rst_lprst_mask; + value = long_press_debounce << (ffs(regs->rst_lprst_mask) - 1); error = of_property_read_u32(keys->dev->of_node, "mediatek,long-press-mode", @@ -147,7 +150,7 @@ static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, break; } - regmap_update_bits(keys->regmap, pmic_rst_reg, mask, value); + regmap_update_bits(keys->regmap, regs->pmic_rst_reg, mask, value); } static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data) @@ -351,7 +354,7 @@ static int mtk_pmic_keys_probe(struct platform_device *pdev) return error; } - mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg); + mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs); platform_set_drvdata(pdev, keys); From patchwork Tue May 24 09:35:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 12859899 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 876D3C433FE for ; Tue, 24 May 2022 09:35:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235708AbiEXJfR (ORCPT ); Tue, 24 May 2022 05:35:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235701AbiEXJfP (ORCPT ); Tue, 24 May 2022 05:35:15 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F1725EDEE; Tue, 24 May 2022 02:35:15 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id 7A2871F42BEB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653384914; bh=Xhl1Ow9x+DfI22vAa93ClvjHOF/I+FiiBOeSds25YTo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l4vFnxIF9ogphwvw7dLm0NgNSMeMWAg7IAzMqwNoXMo13W3QMH4cQ2y0+HmUCjGkT 87u3iSPM5l8YK6rEv2YFa6SWQDeYUzJ5EoiUO9qEZWXsfvTbKgqoyZJshIaxftCT+L tCNqi2r/77M7huV+MV+auYaOS7jQcrq308P9vGll0J5tCX81bJHLqXqS4MdMV8BLN3 jyAWjfapKTQQv2TxQtvnVPPSTEpghzpViKaTiRctQfYX8GSptUdCTAWh+pnk2ae9sW nSiZHizCH10aAZjE/rEcoyxE2p13kg67RXqlATeYaXK6BzgZbPtwm1SX+ZQ8qAPkEW uuJTFltedrGtg== From: AngeloGioacchino Del Regno To: dmitry.torokhov@gmail.com Cc: matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, mkorpershoek@baylibre.com, linux-input@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] Input: mtk-pmic-keys - Add support for MT6331 PMIC keys Date: Tue, 24 May 2022 11:35:05 +0200 Message-Id: <20220524093505.85438-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220524093505.85438-1-angelogioacchino.delregno@collabora.com> References: <20220524093505.85438-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org Add support for PMIC Keys of the MT6331 PMIC. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Mattijs Korpershoek --- drivers/input/keyboard/mtk-pmic-keys.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboard/mtk-pmic-keys.c index 6404081253ea..9b34da0ec260 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -22,6 +23,10 @@ #define MTK_PMIC_PWRKEY_RST BIT(6) #define MTK_PMIC_HOMEKEY_RST BIT(5) +#define MTK_PMIC_MT6331_RST_DU_MASK GENMASK(13, 12) +#define MTK_PMIC_MT6331_PWRKEY_RST BIT(9) +#define MTK_PMIC_MT6331_HOMEKEY_RST BIT(8) + #define MTK_PMIC_PWRKEY_INDEX 0 #define MTK_PMIC_HOMEKEY_INDEX 1 #define MTK_PMIC_MAX_KEY_COUNT 2 @@ -72,6 +77,19 @@ static const struct mtk_pmic_regs mt6323_regs = { .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, }; +static const struct mtk_pmic_regs mt6331_regs = { + .keys_regs[MTK_PMIC_PWRKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x2, + MT6331_INT_MISC_CON, 0x4, + MTK_PMIC_MT6331_PWRKEY_RST), + .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = + MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x4, + MT6331_INT_MISC_CON, 0x2, + MTK_PMIC_MT6331_HOMEKEY_RST), + .pmic_rst_reg = MT6331_TOP_RST_MISC, + .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK, +}; + static const struct mtk_pmic_regs mt6358_regs = { .keys_regs[MTK_PMIC_PWRKEY_INDEX] = MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, @@ -255,6 +273,9 @@ static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { }, { .compatible = "mediatek,mt6323-keys", .data = &mt6323_regs, + }, { + .compatible = "mediatek,mt6331-keys", + .data = &mt6331_regs, }, { .compatible = "mediatek,mt6358-keys", .data = &mt6358_regs,