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Thu, 02 Jun 2022 11:01:27 -0700 (PDT) Received: from orangepi3.mydomain.example ([195.234.74.2]) by smtp.gmail.com with ESMTPSA id kx16-20020a170907775000b00706e8ac43b8sm1972348ejc.199.2022.06.02.11.01.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Jun 2022 11:01:24 -0700 (PDT) From: Roman Stratiienko To: mripard@kernel.org, wens@csie.org, jernej.skrabec@gmail.com, airlied@linux.ie, daniel@ffwll.ch, samuel@sholland.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, megi@xff.cz Cc: Roman Stratiienko Subject: [PATCH] drm/sun4i: sun8i: Add the ability to keep scaler enabled for VI layer Date: Thu, 2 Jun 2022 18:01:18 +0000 Message-Id: <20220602180118.66170-1-r.stratiienko@gmail.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220602_110137_413225_94385D21 X-CRM114-Status: GOOD ( 15.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to DE2.0/DE3.0 manual VI scaler enable register is double buffered, but de facto it doesn't, or the hardware has the shadow register latching issues which causes single-frame picture corruption after changing the state of scaler enable register. Allow the user to keep the scaler always enabled, preventing the UI glitches on the transition from scaled to unscaled state. NOTE: UI layer scaler has more registers with double-buffering issue and can't be workarounded in the same manner. You may find a python test and a demo video for this issue at [1] [1]: https://github.com/GloDroid/glodroid_tests/issues/4 Signed-off-by: Roman Stratiienko --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 12 ++++++++++++ drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 4 +++- 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 71ab0a00b4de..15cad0330f66 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -27,6 +27,18 @@ #include "sun8i_vi_layer.h" #include "sunxi_engine.h" +/* According to DE2.0/DE3.0 manual VI scaler enable register is double + * buffered, but de facto it doesn't, or the hardware has the shadow + * register latching issues which causes single-frame picture corruption + * after changing the state of scaler enable register. + * Allow the user to keep the scaler always enabled, preventing the UI + * glitches on the transition from scaled to unscaled state. + */ +int sun8i_vi_keep_scaler_enabled; +MODULE_PARM_DESC(keep_vi_scaler_enabled, + "Keep VI scaler enabled (1 = enabled, 0 = disabled (default))"); +module_param_named(keep_vi_scaler_enabled, sun8i_vi_keep_scaler_enabled, int, 0644); + struct de2_fmt_info { u32 drm_fmt; u32 de2_fmt; diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 662ba1018cc4..f005ab883503 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -17,6 +17,8 @@ #include "sun8i_vi_layer.h" #include "sun8i_vi_scaler.h" +extern int sun8i_vi_keep_scaler_enabled; + static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, int overlay, bool enable, unsigned int zpos) { @@ -149,7 +151,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, */ subsampled = format->hsub > 1 || format->vsub > 1; - if (insize != outsize || subsampled || hphase || vphase) { + if (insize != outsize || subsampled || hphase || vphase || sun8i_vi_keep_scaler_enabled) { unsigned int scanline, required; struct drm_display_mode *mode; u32 hscale, vscale, fps;