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Mon, 6 Jun 2022 09:06:27 +0000 From: Li Jun To: gregkh@linuxfoundation.org, balbi@kernel.org Cc: linux-usb@vger.kernel.org, Thinh.Nguyen@synopsys.com, jindong.yue@nxp.com Subject: [PATCH v2] usb: dwc3: add power down scale setting Date: Mon, 6 Jun 2022 16:52:53 +0800 Message-Id: <1654505573-2501-1-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 X-ClientProxiedBy: SI2P153CA0006.APCP153.PROD.OUTLOOK.COM (2603:1096:4:140::22) To PA4PR04MB9640.eurprd04.prod.outlook.com (2603:10a6:102:261::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e5a4ef2b-7d84-4560-8ea3-08da479bd6dc X-MS-TrafficTypeDiagnostic: AM6PR04MB5237:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ZisYXorZMH6fRAE7YZWnOt2iUXRwL2Fd6DyYNh26bgCzmg33u37RbJqfNEqJdfsdp/gC49VGArdKlxIya57vUUB1Z2nUVZp8fzLveIV2eyFq4fdkAUgpMWh3f1qMtm50NZOdbx3qAU4zkvXeXXtT8sd00gHnvVNWtHPXmvO6q5XsfjTF9wqA+t3jd0UWtj9owyZ6ERtB3y0E9dOq2yr17ycf0tMue7lrqF2DFzznHWQvpdYZEE43oFyudExh/LRjN6nPbTXXpmuoeVxWp9VWpG2Na2weK8mFuusw+wWcCeeDiLXEn0e4B/mEtBHtQeaBm7+NQFXiNiBrwxbAQn1CSuhuJyvUFJY6N7jNxQIYnIYMZMKb+YswI2D9HR2ti7kTZGiyvNRgCxsDUa/LKV6bM2epGuoW2NCpHoyhNLcnqvEtpUiLSOI72DNgTRVVOVX+yEd+0Sm7Emex/BvlFe3ej9W3nCnTIYXF1G0r7YOk4YoXWGo9YS5deDTdo/VBySGroviBPq+OCEzSTBixw29ljdSMDMxxU8awYsjUau2aDvcFjJJq9uDBGc07jRz0IofEXb4CNPejdeG+Ew77i847oYD+JRKfezb9KlnPk+IAaeLIqBduI8i5y24k+2RMVsiHm5N1Hjf+RMnuKd/Fkl7otnS0DMSp9OrhfdkLX0flpSGGnm1ChubTsrGuqqDgYXyp1Td/mrs+ToLzaXOVW1EXXw== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PA4PR04MB9640.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(52116002)(2906002)(6666004)(2616005)(6486002)(6506007)(38100700002)(38350700002)(83380400001)(36756003)(5660300002)(6512007)(26005)(4326008)(186003)(8936002)(86362001)(316002)(66556008)(8676002)(508600001)(66476007)(66946007);DIR:OUT;SFP:1101; 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The Power Down Scale field specifies how many suspend_clk periods fit into a 16 kHz clock period. When performing the division, round up the remainder. For example, when using an 8-bit/16-bit/32-bit PHY and 25-MHz Suspend clock, Power Down Scale = 25000 kHz/16 kHz = 13'd1563 (rounder up) So use the suspend clock rate to calculate it. Signed-off-by: Li Jun Reviewed-by: Thinh Nguyen --- Changes for v2: - Add PwrDnScale field update condition: less than the calculated value or more than 3x the calculated value. - Correct 16k from 16384 to 16000. - Delare variables in separate lines. drivers/usb/dwc3/core.c | 30 ++++++++++++++++++++++++++++++ drivers/usb/dwc3/core.h | 1 + 2 files changed, 31 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index e027c0420dc3..37c34690d11b 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1029,6 +1029,33 @@ static void dwc3_set_incr_burst_type(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg); } +static void dwc3_set_power_down_clk_scale(struct dwc3 *dwc) +{ + u32 scale; + u32 reg; + + if (!dwc->susp_clk) + return; + + /* + * The power down scale field specifies how many suspend_clk + * periods fit into a 16KHz clock period. When performing + * the division, round up the remainder. + * + * Only update the power down scale when the default scale: + * Less than the calculated value from clk_get_rate(); or + * Ridiculously high that's more than 3x the calculated value. + */ + scale = DIV_ROUND_UP(clk_get_rate(dwc->susp_clk), 16000); + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + if ((reg & DWC3_GCTL_PWRDNSCALE_MASK) < DWC3_GCTL_PWRDNSCALE(scale) || + (reg & DWC3_GCTL_PWRDNSCALE_MASK) > DWC3_GCTL_PWRDNSCALE(scale*3)) { + reg &= ~(DWC3_GCTL_PWRDNSCALE_MASK); + reg |= DWC3_GCTL_PWRDNSCALE(scale); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); + } +} + /** * dwc3_core_init - Low-level initialization of DWC3 Core * @dwc: Pointer to our controller context structure @@ -1105,6 +1132,9 @@ static int dwc3_core_init(struct dwc3 *dwc) if (ret) goto err1; + /* Set power down scale of suspend_clk */ + dwc3_set_power_down_clk_scale(dwc); + /* Adjust Frame Length */ dwc3_frame_length_adjustment(dwc); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 81c486b3941c..722808d8c0af 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -231,6 +231,7 @@ /* Global Configuration Register */ #define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19) +#define DWC3_GCTL_PWRDNSCALE_MASK GENMASK(31, 19) #define DWC3_GCTL_U2RSTECN BIT(16) #define DWC3_GCTL_RAMCLKSEL(x) (((x) & DWC3_GCTL_CLK_MASK) << 6) #define DWC3_GCTL_CLK_BUS (0)