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[78.107.206.185]) by smtp.googlemail.com with ESMTPSA id v30-20020a056512049e00b00479526185a0sm364948lfq.118.2022.06.11.12.57.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 Jun 2022 12:57:59 -0700 (PDT) From: Andrey Konovalov To: bjorn.andersson@linaro.org, agross@kernel.org Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, vinod.koul@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrey Konovalov Subject: [PATCH] arm64: dts: qcom: qcs404: fix default pinctrl settings for blsp1_spi1 Date: Sat, 11 Jun 2022 22:57:13 +0300 Message-Id: <20220611195713.131597-1-andrey.konovalov@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The current settings refer to "blsp_spi1" function which isn't defined. For this reason an attempt to enable blsp1_spi1 interface results in the probe failure below: [ 3.492900] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.502460] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.517725] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.532998] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.548277] spi_qup: probe of 78b6000.spi failed with error -22 Fix this by making the functions used in qcs404.dtsi to match the contents of drivers/pinctrl/qcom/pinctrl-qcs404.c. Signed-off-by: Andrey Konovalov --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index d912166b7552..0d9e1f19aa67 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -669,8 +669,25 @@ blsp1_spi0_default: blsp1-spi0-default { }; blsp1_spi1_default: blsp1-spi1-default { - pins = "gpio22", "gpio23", "gpio24", "gpio25"; - function = "blsp_spi1"; + mosi { + pins = "gpio22"; + function = "blsp_spi_mosi_a1"; + }; + + miso { + pins = "gpio23"; + function = "blsp_spi_miso_a1"; + }; + + cs_n { + pins = "gpio24"; + function = "blsp_spi_cs_n_a1"; + }; + + clk { + pins = "gpio25"; + function = "blsp_spi_clk_a1"; + }; }; blsp1_spi2_default: blsp1-spi2-default {