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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id 21-20020a170906329500b006fe8a4ec62fsm1186760ejw.4.2022.06.16.13.25.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 13:25:20 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v2 1/7] media: Add P010 tiled format Date: Thu, 16 Jun 2022 22:25:07 +0200 Message-Id: <20220616202513.351039-2-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220616202513.351039-1-jernej.skrabec@gmail.com> References: <20220616202513.351039-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Ezequiel Garcia Add P010 tiled format Signed-off-by: Ezequiel Garcia [rebased and updated pixel format name] Signed-off-by: Jernej Skrabec --- drivers/media/v4l2-core/v4l2-common.c | 1 + drivers/media/v4l2-core/v4l2-ioctl.c | 1 + include/uapi/linux/videodev2.h | 1 + 3 files changed, 3 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index 1e38ad8906a2..e0fbe6ba4b6c 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -278,6 +278,7 @@ const struct v4l2_format_info *v4l2_format_info(u32 format) /* Tiled YUV formats */ { .format = V4L2_PIX_FMT_NV12_4L4, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 1, 2, 0, 0 }, .hdiv = 2, .vdiv = 2 }, + { .format = V4L2_PIX_FMT_P010_4L4, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 1, .comp_planes = 2, .bpp = { 2, 4, 0, 0 }, .hdiv = 2, .vdiv = 2 }, /* YUV planar formats, non contiguous variant */ { .format = V4L2_PIX_FMT_YUV420M, .pixel_enc = V4L2_PIXEL_ENC_YUV, .mem_planes = 3, .comp_planes = 3, .bpp = { 1, 1, 1, 0 }, .hdiv = 2, .vdiv = 2 }, diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index e2526701294e..e24d38c0a178 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1310,6 +1310,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_NV12_4L4: descr = "Y/CbCr 4:2:0 (4x4 Linear)"; break; case V4L2_PIX_FMT_NV12_16L16: descr = "Y/CbCr 4:2:0 (16x16 Linear)"; break; case V4L2_PIX_FMT_NV12_32L32: descr = "Y/CbCr 4:2:0 (32x32 Linear)"; break; + case V4L2_PIX_FMT_P010_4L4: descr = "P010 tiled"; break; case V4L2_PIX_FMT_NV12M: descr = "Y/CbCr 4:2:0 (N-C)"; break; case V4L2_PIX_FMT_NV21M: descr = "Y/CrCb 4:2:0 (N-C)"; break; case V4L2_PIX_FMT_NV16M: descr = "Y/CbCr 4:2:2 (N-C)"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index 5311ac4fde35..32bedeb04152 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -630,6 +630,7 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_NV12_4L4 v4l2_fourcc('V', 'T', '1', '2') /* 12 Y/CbCr 4:2:0 4x4 tiles */ #define V4L2_PIX_FMT_NV12_16L16 v4l2_fourcc('H', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */ #define V4L2_PIX_FMT_NV12_32L32 v4l2_fourcc('S', 'T', '1', '2') /* 12 Y/CbCr 4:2:0 32x32 tiles */ +#define V4L2_PIX_FMT_P010_4L4 v4l2_fourcc('T', '0', '1', '0') /* 12 Y/CbCr 4:2:0 10-bit 4x4 macroblocks */ /* Tiled YUV formats, non contiguous planes */ #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */ From patchwork Thu Jun 16 20:25:08 2022 Content-Type: text/plain; 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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id 21-20020a170906329500b006fe8a4ec62fsm1186760ejw.4.2022.06.16.13.25.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 13:25:21 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v2 2/7] media: hantro: Support format filtering by depth Date: Thu, 16 Jun 2022 22:25:08 +0200 Message-Id: <20220616202513.351039-3-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220616202513.351039-1-jernej.skrabec@gmail.com> References: <20220616202513.351039-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In preparation for supporting 10-bit formats, add mechanism which will filter formats based on pixel depth. Hantro G2 supports only one decoding format natively and that is based on bit depth of current video frame. Additionally, it makes no sense to upconvert bitness, so filter those out too. Signed-off-by: Jernej Skrabec Reviewed-by: Ezequiel Garcia --- drivers/staging/media/hantro/hantro.h | 4 ++ drivers/staging/media/hantro/hantro_v4l2.c | 48 ++++++++++++++++++++-- drivers/staging/media/hantro/hantro_v4l2.h | 1 + 3 files changed, 50 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h index 26308bb29adc..2989ebc631cc 100644 --- a/drivers/staging/media/hantro/hantro.h +++ b/drivers/staging/media/hantro/hantro.h @@ -227,6 +227,7 @@ struct hantro_dev { * * @ctrl_handler: Control handler used to register controls. * @jpeg_quality: User-specified JPEG compression quality. + * @bit_depth: Bit depth of current frame * * @codec_ops: Set of operations related to codec mode. * @postproc: Post-processing context. @@ -252,6 +253,7 @@ struct hantro_ctx { struct v4l2_ctrl_handler ctrl_handler; int jpeg_quality; + int bit_depth; const struct hantro_codec_ops *codec_ops; struct hantro_postproc_ctx postproc; @@ -277,6 +279,7 @@ struct hantro_ctx { * @enc_fmt: Format identifier for encoder registers. * @frmsize: Supported range of frame sizes (only for bitstream formats). * @postprocessed: Indicates if this format needs the post-processor. + * @match_depth: Indicates if format bit depth must match video bit depth */ struct hantro_fmt { char *name; @@ -287,6 +290,7 @@ struct hantro_fmt { enum hantro_enc_fmt enc_fmt; struct v4l2_frmsize_stepwise frmsize; bool postprocessed; + bool match_depth; }; struct hantro_reg { diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c index 29cc61d53b71..334f18a4120d 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -64,6 +64,42 @@ hantro_get_postproc_formats(const struct hantro_ctx *ctx, return ctx->dev->variant->postproc_fmts; } +int hantro_get_format_depth(u32 fourcc) +{ + switch (fourcc) { + case V4L2_PIX_FMT_P010: + case V4L2_PIX_FMT_P010_4L4: + return 10; + default: + return 8; + } +} + +static bool +hantro_check_depth_match(const struct hantro_ctx *ctx, + const struct hantro_fmt *fmt) +{ + int fmt_depth, ctx_depth = 8; + + if (!fmt->match_depth && !fmt->postprocessed) + return true; + + /* 0 means default depth, which is 8 */ + if (ctx->bit_depth) + ctx_depth = ctx->bit_depth; + + fmt_depth = hantro_get_format_depth(fmt->fourcc); + + /* + * Allow only downconversion for postproc formats for now. + * It may be possible to relax that on some HW. + */ + if (!fmt->match_depth) + return fmt_depth <= ctx_depth; + + return fmt_depth == ctx_depth; +} + static const struct hantro_fmt * hantro_find_format(const struct hantro_ctx *ctx, u32 fourcc) { @@ -91,7 +127,8 @@ hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) formats = hantro_get_formats(ctx, &num_fmts); for (i = 0; i < num_fmts; i++) { if (bitstream == (formats[i].codec_mode != - HANTRO_MODE_NONE)) + HANTRO_MODE_NONE) && + hantro_check_depth_match(ctx, &formats[i])) return &formats[i]; } return NULL; @@ -162,11 +199,13 @@ static int vidioc_enum_fmt(struct file *file, void *priv, formats = hantro_get_formats(ctx, &num_fmts); for (i = 0; i < num_fmts; i++) { bool mode_none = formats[i].codec_mode == HANTRO_MODE_NONE; + fmt = &formats[i]; if (skip_mode_none == mode_none) continue; + if (!hantro_check_depth_match(ctx, fmt)) + continue; if (j == f->index) { - fmt = &formats[i]; f->pixelformat = fmt->fourcc; return 0; } @@ -182,8 +221,11 @@ static int vidioc_enum_fmt(struct file *file, void *priv, return -EINVAL; formats = hantro_get_postproc_formats(ctx, &num_fmts); for (i = 0; i < num_fmts; i++) { + fmt = &formats[i]; + + if (!hantro_check_depth_match(ctx, fmt)) + continue; if (j == f->index) { - fmt = &formats[i]; f->pixelformat = fmt->fourcc; return 0; } diff --git a/drivers/staging/media/hantro/hantro_v4l2.h b/drivers/staging/media/hantro/hantro_v4l2.h index 18bc682c8556..b17e84c82582 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.h +++ b/drivers/staging/media/hantro/hantro_v4l2.h @@ -22,5 +22,6 @@ extern const struct v4l2_ioctl_ops hantro_ioctl_ops; extern const struct vb2_ops hantro_queue_ops; void hantro_reset_fmts(struct hantro_ctx *ctx); +int hantro_get_format_depth(u32 fourcc); #endif /* HANTRO_V4L2_H_ */ From patchwork Thu Jun 16 20:25:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 12884781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FD52C43334 for ; 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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id 21-20020a170906329500b006fe8a4ec62fsm1186760ejw.4.2022.06.16.13.25.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 13:25:22 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v2 3/7] media: hantro: postproc: Fix buffer size calculation Date: Thu, 16 Jun 2022 22:25:09 +0200 Message-Id: <20220616202513.351039-4-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220616202513.351039-1-jernej.skrabec@gmail.com> References: <20220616202513.351039-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org When allocating aux buffers for postprocessing, it's assumed that base buffer size is the same as that of output. Coincidentally, that's true most of the time, but not always. 10-bit source also needs aux buffer size which is appropriate for 10-bit native format, even if the output format is 8-bit. Similarly, mv sizes and other extra buffer size also depends on source width/height, not destination. Reviewed-by: Ezequiel Garcia Signed-off-by: Jernej Skrabec --- .../staging/media/hantro/hantro_postproc.c | 24 +++++++++++++------ drivers/staging/media/hantro/hantro_v4l2.c | 2 +- drivers/staging/media/hantro/hantro_v4l2.h | 2 ++ 3 files changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c index ab168c1c0d28..b77cc55e43ea 100644 --- a/drivers/staging/media/hantro/hantro_postproc.c +++ b/drivers/staging/media/hantro/hantro_postproc.c @@ -12,6 +12,7 @@ #include "hantro_hw.h" #include "hantro_g1_regs.h" #include "hantro_g2_regs.h" +#include "hantro_v4l2.h" #define HANTRO_PP_REG_WRITE(vpu, reg_name, val) \ { \ @@ -174,18 +175,27 @@ int hantro_postproc_alloc(struct hantro_ctx *ctx) struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; struct vb2_queue *cap_queue = &m2m_ctx->cap_q_ctx.q; unsigned int num_buffers = cap_queue->num_buffers; + struct v4l2_pix_format_mplane pix_mp; + const struct hantro_fmt *fmt; unsigned int i, buf_size; - buf_size = ctx->dst_fmt.plane_fmt[0].sizeimage; + /* this should always pick native format */ + fmt = hantro_get_default_fmt(ctx, false); + if (!fmt) + return -EINVAL; + v4l2_fill_pixfmt_mp(&pix_mp, fmt->fourcc, ctx->src_fmt.width, + ctx->src_fmt.height); + + buf_size = pix_mp.plane_fmt[0].sizeimage; if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_H264_SLICE) - buf_size += hantro_h264_mv_size(ctx->dst_fmt.width, - ctx->dst_fmt.height); + buf_size += hantro_h264_mv_size(pix_mp.width, + pix_mp.height); else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_VP9_FRAME) - buf_size += hantro_vp9_mv_size(ctx->dst_fmt.width, - ctx->dst_fmt.height); + buf_size += hantro_vp9_mv_size(pix_mp.width, + pix_mp.height); else if (ctx->vpu_src_fmt->fourcc == V4L2_PIX_FMT_HEVC_SLICE) - buf_size += hantro_hevc_mv_size(ctx->dst_fmt.width, - ctx->dst_fmt.height); + buf_size += hantro_hevc_mv_size(pix_mp.width, + pix_mp.height); for (i = 0; i < num_buffers; ++i) { struct hantro_aux_buf *priv = &ctx->postproc.dec_q[i]; diff --git a/drivers/staging/media/hantro/hantro_v4l2.c b/drivers/staging/media/hantro/hantro_v4l2.c index 334f18a4120d..2c7a805289e7 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.c +++ b/drivers/staging/media/hantro/hantro_v4l2.c @@ -118,7 +118,7 @@ hantro_find_format(const struct hantro_ctx *ctx, u32 fourcc) return NULL; } -static const struct hantro_fmt * +const struct hantro_fmt * hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream) { const struct hantro_fmt *formats; diff --git a/drivers/staging/media/hantro/hantro_v4l2.h b/drivers/staging/media/hantro/hantro_v4l2.h index b17e84c82582..64f6f57e9d7a 100644 --- a/drivers/staging/media/hantro/hantro_v4l2.h +++ b/drivers/staging/media/hantro/hantro_v4l2.h @@ -23,5 +23,7 @@ extern const struct vb2_ops hantro_queue_ops; void hantro_reset_fmts(struct hantro_ctx *ctx); int hantro_get_format_depth(u32 fourcc); +const struct hantro_fmt * +hantro_get_default_fmt(const struct hantro_ctx *ctx, bool bitstream); #endif /* HANTRO_V4L2_H_ */ From patchwork Thu Jun 16 20:25:10 2022 Content-Type: text/plain; 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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id 21-20020a170906329500b006fe8a4ec62fsm1186760ejw.4.2022.06.16.13.25.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 13:25:23 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v2 4/7] media: hantro: postproc: Fix legacy regs configuration Date: Thu, 16 Jun 2022 22:25:10 +0200 Message-Id: <20220616202513.351039-5-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220616202513.351039-1-jernej.skrabec@gmail.com> References: <20220616202513.351039-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Some postproc legacy registers were set in VP9 code. Move them to postproc and fix their value. Reviewed-by: Ezequiel Garcia Signed-off-by: Jernej Skrabec --- drivers/staging/media/hantro/hantro_g2_vp9_dec.c | 8 -------- drivers/staging/media/hantro/hantro_postproc.c | 10 ++++++++++ 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c index 91c21b634fab..c9cb11fd95af 100644 --- a/drivers/staging/media/hantro/hantro_g2_vp9_dec.c +++ b/drivers/staging/media/hantro/hantro_g2_vp9_dec.c @@ -515,16 +515,8 @@ static void config_bit_depth(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_params) { if (ctx->dev->variant->legacy_regs) { - u8 pp_shift = 0; - hantro_reg_write(ctx->dev, &g2_bit_depth_y, dec_params->bit_depth); hantro_reg_write(ctx->dev, &g2_bit_depth_c, dec_params->bit_depth); - hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, dec_params->bit_depth); - - if (dec_params->bit_depth > 8) - pp_shift = 16 - dec_params->bit_depth; - - hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); hantro_reg_write(ctx->dev, &g2_pix_shift, 0); } else { hantro_reg_write(ctx->dev, &g2_bit_depth_y_minus8, dec_params->bit_depth - 8); diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c index b77cc55e43ea..8933b4af73ed 100644 --- a/drivers/staging/media/hantro/hantro_postproc.c +++ b/drivers/staging/media/hantro/hantro_postproc.c @@ -130,6 +130,16 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset); } + if (ctx->dev->variant->legacy_regs) { + int out_depth = hantro_get_format_depth(ctx->dst_fmt.pixelformat); + u8 pp_shift = 0; + + if (out_depth > 8) + pp_shift = 16 - out_depth; + + hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, out_depth); + hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); + } hantro_reg_write(vpu, &g2_out_rs_e, 1); } From patchwork Thu Jun 16 20:25:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 12884785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A96D3C43334 for ; Thu, 16 Jun 2022 20:25:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378587AbiFPUZc (ORCPT ); Thu, 16 Jun 2022 16:25:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378552AbiFPUZ0 (ORCPT ); Thu, 16 Jun 2022 16:25:26 -0400 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 168CB5B89B; Thu, 16 Jun 2022 13:25:26 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id x5so3696029edi.2; Thu, 16 Jun 2022 13:25:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=i3J94croFMFgt0EIDJ5nBaYvM7f2XLJQTjqgj/3/ZjU=; b=OjI41978muhCWJpsmE5/OwT4NeZE6oN7hB1HJMp+1zL5tIB2+dDizaiyju2FcUW9qX HIT9QQh11RNhiIn6kAMoJlJ0V1HcIwjQ0byUUh6vDi+Cgz473YAWz60fsAqksaBeOlfo wM6zf5PwHxslOSTrTzTA2LEYc1LmySjTyVOZl+H8czBl3PtiWqTCeNe/xE8Sw9rcDXoD Iowbhe4w+W0cfFkDnWAiYdrkDU0J8lnv8aZ4dgWrEwgnnQ75Sdx22inr6Td2NzeCf1Le kg0V6sUw4MclDdS2J5e7nU/G0cTj+f+OQRZs17+zHUJ5UxwRGgx7r88R08oeK8LFHMPR cvAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=i3J94croFMFgt0EIDJ5nBaYvM7f2XLJQTjqgj/3/ZjU=; b=VrUonxT75aVYJuRf6oqRxjAp6aV7xfvb4eHaimL+Qk6WxAqIc1Xet08TG2JxFX5Rq1 AyNm5YtU25C+dcZv1j3N80Ekv9SwejgDYWoO+1YGgtK+v1n/rWoQ4ppt6KdsAw8sRxb/ 3mtsuieXwfAMa7nplgZoVccksXN4KdjDBg+LtmGn/jr6j0yd+C/ilt8HO28zvzgDrW6M Z1B42mncQ+Xlq0Yxf8kjUFfSSqHmkKSLghxCb3KZA50E2T75K0GsF8Ggaz69raIO4vko J+kSWTBx7ii9UOfeq2z/HA1gN1PjX1lviCAKKIYwMFk6nIkJkLxLZehLB6sPn0SVWcuq mNjA== X-Gm-Message-State: AJIora9++XAerLk+OxT0iZ7KeTHcYgogip75gn1gsFdrEeUbtIgLDgqK hmj16ndNEP/Zq6iUHNdL7kk= X-Google-Smtp-Source: AGRyM1v1iQnrIcKC/5Ullqm08UvUYs8tXFYALDcMtA4733HLWtfij5akuBYqnFfWLR2YvuEHSDo7UA== X-Received: by 2002:a05:6402:2788:b0:431:3f86:1d4e with SMTP id b8-20020a056402278800b004313f861d4emr8890198ede.238.1655411124688; Thu, 16 Jun 2022 13:25:24 -0700 (PDT) Received: from kista.localdomain (213-161-3-76.dynamic.telemach.net. [213.161.3.76]) by smtp.gmail.com with ESMTPSA id 21-20020a170906329500b006fe8a4ec62fsm1186760ejw.4.2022.06.16.13.25.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 13:25:24 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v2 5/7] media: hantro: postproc: Properly calculate chroma offset Date: Thu, 16 Jun 2022 22:25:11 +0200 Message-Id: <20220616202513.351039-6-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220616202513.351039-1-jernej.skrabec@gmail.com> References: <20220616202513.351039-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Currently chroma offset calculation assumes only 1 byte per luma, with no consideration for stride. Take necessary information from destination pixel format which makes calculation completely universal. Signed-off-by: Jernej Skrabec Reviewed-by: Ezequiel Garcia --- drivers/staging/media/hantro/hantro_postproc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c index 8933b4af73ed..a0928c508434 100644 --- a/drivers/staging/media/hantro/hantro_postproc.c +++ b/drivers/staging/media/hantro/hantro_postproc.c @@ -113,12 +113,14 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) { struct hantro_dev *vpu = ctx->dev; struct vb2_v4l2_buffer *dst_buf; - size_t chroma_offset = ctx->dst_fmt.width * ctx->dst_fmt.height; int down_scale = down_scale_factor(ctx); + size_t chroma_offset; dma_addr_t dst_dma; dst_buf = hantro_get_dst_buf(ctx); dst_dma = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); + chroma_offset = ctx->dst_fmt.plane_fmt[0].bytesperline * + ctx->dst_fmt.height; if (down_scale) { hantro_reg_write(vpu, &g2_down_scale_e, 1); From patchwork Thu Jun 16 20:25:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 12884786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B211C43334 for ; Thu, 16 Jun 2022 20:25:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378590AbiFPUZd (ORCPT ); Thu, 16 Jun 2022 16:25:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378560AbiFPUZ2 (ORCPT ); Thu, 16 Jun 2022 16:25:28 -0400 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06C435B895; Thu, 16 Jun 2022 13:25:27 -0700 (PDT) Received: by mail-ed1-x52f.google.com with SMTP id w27so3679933edl.7; Thu, 16 Jun 2022 13:25:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HUtwgF4GgsHpYDtVHC8Pb/yKV/u5JGnJVytpp+Tyji0=; b=VIBDDCUA7EDMjVpT7zkHkhn7oucpO9dZAr5RdMH8gLUJQNdX3s4Brv/8/b4gDkHChp trvTGuGn0WbWO5iyJ3yO2ZcLMyvit3ym4DojDUX4g+U05h36fR1Q3lv0bgzcMKZ0rE4g muKKz08J638DasHXxeksMC4PJNMCGDq+c1J420zvrZ3SZ2/6icHBpNB++uCf1/uGeiIv uaYDK9NrM5YldDGbYZR1mKiqexWykA/Jjo+lC8qK/wKX36/HlMmkduUXDE07ZgLQLXVP h/bd7fOU1a7kcJS5M8XiEk0FbE9I1n1kehh2GS2o/fj28Z3wZz31hY0oUuzd2Ht67ps+ 8L2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HUtwgF4GgsHpYDtVHC8Pb/yKV/u5JGnJVytpp+Tyji0=; b=ngE9rncF4jficjYx9WcOK/hyKV7Ouiv8iwy1AF3P3d3lUB/cryTS/T8n6vf5CZyozN 49fqo9KmorHJPJujMlEOUnK9t+Dvlbz1C6Eha0CywOvVxejw6lhhDiGYxcZkEEP76v+p /TgEKtBLvgV2EsxkAXCCD7gJXSsAI1I9L2RdgDO66CENVPTypO+gvsyaXlkvc4A7LnNP kfAOSFWCckF+hy/gtaxE5QPqAdXsJVzp/BidgjMJv+GyOWU0O04xddxNZFibrv+GJtpt ZlFSA9rlnn+xAHDi3gkN/8ZNd9hh5FJwWJWFPJZxi00gJ9ZV1EeiyrLc5GHRt3LILi58 xDLw== X-Gm-Message-State: AJIora9vLa18M9Qd8hPp6ud2KjH7sNeFJ56jP68K/LtEi1D+FIUjAkg1 UCypstp/7UpnZCnPSmPx5pw= X-Google-Smtp-Source: AGRyM1s+LCS6ApVWlV0wlYNA8FpbdeKqTi9OLHoLWn7sfH9jMC4sAuP2R7t34r/FaNjWdPfi107VfQ== X-Received: by 2002:a05:6402:5114:b0:42f:b5f3:1f96 with SMTP id m20-20020a056402511400b0042fb5f31f96mr8758001edd.260.1655411125683; Thu, 16 Jun 2022 13:25:25 -0700 (PDT) Received: from kista.localdomain (213-161-3-76.dynamic.telemach.net. [213.161.3.76]) by smtp.gmail.com with ESMTPSA id 21-20020a170906329500b006fe8a4ec62fsm1186760ejw.4.2022.06.16.13.25.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 13:25:25 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v2 6/7] media: hantro: Store VP9 bit depth in context Date: Thu, 16 Jun 2022 22:25:12 +0200 Message-Id: <20220616202513.351039-7-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220616202513.351039-1-jernej.skrabec@gmail.com> References: <20220616202513.351039-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Now that we have proper infrastructure for postprocessing 10-bit formats, store VP9 bit depth in context. Signed-off-by: Jernej Skrabec Reviewed-by: Ezequiel Garcia --- drivers/staging/media/hantro/hantro_drv.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index 01d33dcb0467..afddf7ac0731 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -324,6 +324,24 @@ static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl) return 0; } +static int hantro_vp9_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct hantro_ctx *ctx; + + ctx = container_of(ctrl->handler, + struct hantro_ctx, ctrl_handler); + + switch (ctrl->id) { + case V4L2_CID_STATELESS_VP9_FRAME: + ctx->bit_depth = ctrl->p_new.p_vp9_frame->bit_depth; + break; + default: + return -EINVAL; + } + + return 0; +} + static const struct v4l2_ctrl_ops hantro_ctrl_ops = { .try_ctrl = hantro_try_ctrl, }; @@ -336,6 +354,10 @@ static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = { .s_ctrl = hantro_hevc_s_ctrl, }; +static const struct v4l2_ctrl_ops hantro_vp9_ctrl_ops = { + .s_ctrl = hantro_vp9_s_ctrl, +}; + #define HANTRO_JPEG_ACTIVE_MARKERS (V4L2_JPEG_ACTIVE_MARKER_APP0 | \ V4L2_JPEG_ACTIVE_MARKER_COM | \ V4L2_JPEG_ACTIVE_MARKER_DQT | \ @@ -503,6 +525,7 @@ static const struct hantro_ctrl controls[] = { .codec = HANTRO_VP9_DECODER, .cfg = { .id = V4L2_CID_STATELESS_VP9_FRAME, + .ops = &hantro_vp9_ctrl_ops, }, }, { .codec = HANTRO_VP9_DECODER, From patchwork Thu Jun 16 20:25:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 12884784 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13CF9CCA47A for ; Thu, 16 Jun 2022 20:25:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378582AbiFPUZa (ORCPT ); Thu, 16 Jun 2022 16:25:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378566AbiFPUZ3 (ORCPT ); Thu, 16 Jun 2022 16:25:29 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0EEB25B8BC; Thu, 16 Jun 2022 13:25:28 -0700 (PDT) Received: by mail-ej1-x62c.google.com with SMTP id n10so4853270ejk.5; Thu, 16 Jun 2022 13:25:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=S51F3Je5QDB420YRCT+3HINCDkvBOXZdT2bwWLedeKE=; b=BBO69XMOO3d5o5uHjrczeLA5BMwcMouFDIOARWkmT7GrhDj6Rh6l5caepWk2XyUIgc 8Gn6BFxCb/irQ78FHD46MDFyUe++lQlzDybuxYEKQruT4YzuMgS1/e1DVP7usIvj7Q9X Ewj9G4WoKZNd0dvus4bQrhzYuebUrtVeyoGgpil8lVAyK7q1B+lzU0yXZOfLwflgtFFN sW/TsuU5WcdYSz2jwALtvwoXQHEYjZufP3cwKXuQx5I5lUdTG07sSwrnEKNsClJM5x2E XiY/uI/N0i8RQL7O/XkrKQa4DQicNwX95RPUS0nizP/gJn0YtQsFdS/AhuTcb3pg+zoy luug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=S51F3Je5QDB420YRCT+3HINCDkvBOXZdT2bwWLedeKE=; b=jXeE9Kr2eLvd3at1rjym2+MEpAmcDSB/irZDph983U/ad2FsozVEwsF0jo6zaCL/0q RNKvLSizjGeb3t8/Yj7JSp7Dr4LeN/1RXoUAdfbJSMkSRdinb3Vbge2W4rYVpwS6uqWn tRUDtoVZzHxQmka1Zm3X5d3GFIz4NaIum+2PMNRAzTp5SMVsisemi/vpyJwyN5oPH3q8 xOHSLvupXy7FhUKAJs0rtRglqwhL27A465egv7BOGqmeyBGfJu7TmQIVeOhFVEXqZ2HG Z9RVeJsQQWWD9YRm6HxfyTy94nFyNNoAK2npiQDY3ltJdJkhCDYK+RLaLXlDNWAQLXKG ydzg== X-Gm-Message-State: AJIora+3fGIxp1fYInzx85ldlue7mt9EJLVPLkLfwe56NC4XOBR57KbR yeK51wjcI35ZfXXIxsFkD7w= X-Google-Smtp-Source: AGRyM1sDaGC+6BR752Es4zGOOLY2CRsRtcQIh1wgtcW8aG69QcftAAgu5n+sP0gTrl7CxcEdIodS2Q== X-Received: by 2002:a17:907:8b87:b0:715:e127:b64d with SMTP id tb7-20020a1709078b8700b00715e127b64dmr5996239ejc.481.1655411126677; Thu, 16 Jun 2022 13:25:26 -0700 (PDT) Received: from kista.localdomain (213-161-3-76.dynamic.telemach.net. [213.161.3.76]) by smtp.gmail.com with ESMTPSA id 21-20020a170906329500b006fe8a4ec62fsm1186760ejw.4.2022.06.16.13.25.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jun 2022 13:25:26 -0700 (PDT) From: Jernej Skrabec To: ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de Cc: mchehab@kernel.org, hverkuil-cisco@xs4all.nl, benjamin.gaignard@collabora.com, nicolas.dufresne@collabora.com, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jernej Skrabec Subject: [PATCH v2 7/7] media: hantro: sunxi: Enable 10-bit decoding Date: Thu, 16 Jun 2022 22:25:13 +0200 Message-Id: <20220616202513.351039-8-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220616202513.351039-1-jernej.skrabec@gmail.com> References: <20220616202513.351039-1-jernej.skrabec@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Now that infrastructure for 10-bit decoding exists, enable it for Allwinner H6. Signed-off-by: Jernej Skrabec Reviewed-by: Ezequiel Garcia --- drivers/staging/media/hantro/sunxi_vpu_hw.c | 27 +++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/staging/media/hantro/sunxi_vpu_hw.c b/drivers/staging/media/hantro/sunxi_vpu_hw.c index fbeac81e59e1..02ce8b064a8f 100644 --- a/drivers/staging/media/hantro/sunxi_vpu_hw.c +++ b/drivers/staging/media/hantro/sunxi_vpu_hw.c @@ -23,12 +23,39 @@ static const struct hantro_fmt sunxi_vpu_postproc_fmts[] = { .step_height = 32, }, }, + { + .fourcc = V4L2_PIX_FMT_P010, + .codec_mode = HANTRO_MODE_NONE, + .postprocessed = true, + .frmsize = { + .min_width = FMT_MIN_WIDTH, + .max_width = FMT_UHD_WIDTH, + .step_width = 32, + .min_height = FMT_MIN_HEIGHT, + .max_height = FMT_UHD_HEIGHT, + .step_height = 32, + }, + }, }; static const struct hantro_fmt sunxi_vpu_dec_fmts[] = { { .fourcc = V4L2_PIX_FMT_NV12_4L4, .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, + .frmsize = { + .min_width = FMT_MIN_WIDTH, + .max_width = FMT_UHD_WIDTH, + .step_width = 32, + .min_height = FMT_MIN_HEIGHT, + .max_height = FMT_UHD_HEIGHT, + .step_height = 32, + }, + }, + { + .fourcc = V4L2_PIX_FMT_P010_4L4, + .codec_mode = HANTRO_MODE_NONE, + .match_depth = true, .frmsize = { .min_width = FMT_MIN_WIDTH, .max_width = FMT_UHD_WIDTH,