From patchwork Tue Jun 21 16:33:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12889525 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2BAEC433EF for ; Tue, 21 Jun 2022 16:33:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352412AbiFUQdu (ORCPT ); Tue, 21 Jun 2022 12:33:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350998AbiFUQds (ORCPT ); Tue, 21 Jun 2022 12:33:48 -0400 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 073C9140A1; Tue, 21 Jun 2022 09:33:48 -0700 (PDT) Received: by mail-ej1-x634.google.com with SMTP id v1so28608230ejg.13; Tue, 21 Jun 2022 09:33:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=15+HpU1LWB4LAxkhCvwaxGq511OUYw5iXFZyQQCZrLo=; b=BJAfwfXXspb75BwMg2QxmS5n7niNvezSsSqBCKW3I8ZCwPSM9OyvwwSFX9jD2vNkXZ cFHY2lKdLK5kC2/LsWLwDFUm4JswWIcvzVOkifFW9NtFZyrMUaoBpIWkOE6srRiBLJe/ 9kc5ksfBTy7+8BXgES44LJb7oYk/pdWfMjxKcT3zZmjeraCLkfG9X8V55665S7U3LSiH 2CrLrjDKA3gF6ifIkUzpiix/jvvKwr5tO0rBtOJwPaFtyXiJXtiJZg9bUYAOpBIkWOyt FpxDf/U821rQJE57MApy3Psb+tU2j8vtqEY93K6mn7UjvUblkndFJq8pRwGv8R0U9f8C d5lQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=15+HpU1LWB4LAxkhCvwaxGq511OUYw5iXFZyQQCZrLo=; b=CgU8lEeH8H5ygJkgc2lDYUYJmUhXFBHpFey/BNcbTQkqN4xmKURJQVRcmE4GD1y7Nr l8sh/UEzjII8vej4AzkDWvwuUpHHBg4az8k2g73MqivvZiiyNtt0cjpnDLopj0LkvnpY pN2l6SJPx3mrC2pSKv6olmhNKoA3OIvdLjwj0+XgW4JCmze6Xfv+ZLjAkM3grGHQgCO2 AdFj020BAty/3JZKct/Y08aeRfEx/cqFlkC6s2XfSglrv7ZUKAM+fqgyCVcpNhZPbqbb hkyiKg6eWKh8jEgHfpTCo/EtZMUDJAFijo5vjmDFHYBTw0Br3o5OLomxCYTqYOV3h21d +LbQ== X-Gm-Message-State: AJIora9xoGnlkn+aLXibHC4mYuy0P0mhTHdM1gRGH40UflvaZzLFZL2Y VmSaHkaszLiX2LIZhtCN9e4= X-Google-Smtp-Source: AGRyM1v5QMgQTDCniTHaBREuzbUpJe/GwTAtweqPyHDGkHtmFVtH1vCYMJdfCrhcTbOs28ZLswTsTA== X-Received: by 2002:a17:906:73d7:b0:722:e88b:1b31 with SMTP id n23-20020a17090673d700b00722e88b1b31mr1523243ejl.350.1655829226298; Tue, 21 Jun 2022 09:33:46 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id g5-20020a50d5c5000000b004356c0d7436sm9557663edj.42.2022.06.21.09.33.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 09:33:44 -0700 (PDT) From: Christian Marangi To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v2 1/3] dt-bindings: clock: add pcm reset for ipq806x lcc Date: Tue, 21 Jun 2022 18:33:24 +0200 Message-Id: <20220621163326.16858-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add pcm reset define for ipq806x lcc. Signed-off-by: Christian Marangi Reviewed-by: Dmitry Baryshkov Acked-by: Rob Herring --- v2: - Fix Sob tag include/dt-bindings/clock/qcom,lcc-ipq806x.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/clock/qcom,lcc-ipq806x.h b/include/dt-bindings/clock/qcom,lcc-ipq806x.h index 25b92bbf0ab4..e0fb4acf4ba8 100644 --- a/include/dt-bindings/clock/qcom,lcc-ipq806x.h +++ b/include/dt-bindings/clock/qcom,lcc-ipq806x.h @@ -19,4 +19,6 @@ #define SPDIF_CLK 10 #define AHBIX_CLK 11 +#define LCC_PCM_RESET 0 + #endif From patchwork Tue Jun 21 16:33:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12889526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B565CCA473 for ; Tue, 21 Jun 2022 16:33:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352907AbiFUQdv (ORCPT ); Tue, 21 Jun 2022 12:33:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352822AbiFUQdu (ORCPT ); Tue, 21 Jun 2022 12:33:50 -0400 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FD05140A1; Tue, 21 Jun 2022 09:33:49 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id kq6so28613577ejb.11; Tue, 21 Jun 2022 09:33:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TMot/xekbMLoSetb5C/KpO7AbnsR7HF/KXErfGdxKtA=; b=kKvdixKuSH09T9ojHlWs5P8s6ZFYSQiF+EkDI5PW9D1wsZRKhF04fplB24kfglnUaF Blfbi9kk0kctPb5kAx0wx5YswlflzMTTeBnNK5yEOuPkJ/vCeXl+lVAfeJTpiq66AUTE wmmkRQ3KeUEoHOvrNnjgc1I8bHfUPcxLp2q7WD/CkWDeR9lBTlC7Id5Pz1buM+G8NCQf wDvTYJTb5MSIOvQwZ7bqnd6T8eWhN94B37YKhBcZjNRTjHwCijCyq31p0o6/ImAXwM25 UMwViWoeYxlrfLQ6dzE3CoYkTGjPz5CFKQfD3P3D9IxzyO6ceT9ibgxeu/nlruzaAjZX yBng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TMot/xekbMLoSetb5C/KpO7AbnsR7HF/KXErfGdxKtA=; b=bq2y4ME/n2tzRDBsyw6GmngDtJkLsLIQxP9302lKkt1gcGhmwd2kX49F25BYbzRfG3 jUeCo9f3S+J0zHiGehNuv6nWXMD9BRGGkOdYuKoVGpg8Vr5DsAxdCuzsHf56mLoPduXO 3Bs+nxfLAvTP+2ardbk30zM/spYTBoZoFSQCAJdyrEJ6Sq2nxQqyJwUmGmU/tzAxigV8 bIjkvIBb84w9NBLpLe9jllRwgxSX06urb3Wi40LDcth53Q73EZOxsTuXIRzG2hb9f0EJ kyi+fKQDl7FWi5TYd8ViTnw52qkdR1TV4nOcbh+VcDvqNsHy1mYw3euom/oNz+d5AlQl NkLg== X-Gm-Message-State: AJIora/abAsi5pOU9MzsTplE0Ir4ss47QQe2LlA8fGIqKkE7z0KPBF05 l/MM5w3M0UueKFc8jUh09MY= X-Google-Smtp-Source: AGRyM1uOOMzFmUVzpViVCXKpRq0eC0pGB3ZVYU1xLuKOdbmkIHox7he1uiWKcYg4PbEMpfqQaLNBjw== X-Received: by 2002:a17:906:434f:b0:711:eb76:c320 with SMTP id z15-20020a170906434f00b00711eb76c320mr26566422ejm.636.1655829228106; Tue, 21 Jun 2022 09:33:48 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id g5-20020a50d5c5000000b004356c0d7436sm9557663edj.42.2022.06.21.09.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 09:33:47 -0700 (PDT) From: Christian Marangi To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v2 2/3] clk: qcom: lcc-ipq806x: add reset definition Date: Tue, 21 Jun 2022 18:33:25 +0200 Message-Id: <20220621163326.16858-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220621163326.16858-1-ansuelsmth@gmail.com> References: <20220621163326.16858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add reset definition for lcc-ipq806x. Signed-off-by: Christian Marangi Reviewed-by: Dmitry Baryshkov --- v2: - Fix Sob tag drivers/clk/qcom/lcc-ipq806x.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c index 1a2be4aeb31d..ba90bebba597 100644 --- a/drivers/clk/qcom/lcc-ipq806x.c +++ b/drivers/clk/qcom/lcc-ipq806x.c @@ -22,6 +22,7 @@ #include "clk-branch.h" #include "clk-regmap-divider.h" #include "clk-regmap-mux.h" +#include "reset.h" static struct clk_pll pll4 = { .l_reg = 0x4, @@ -405,6 +406,10 @@ static struct clk_regmap *lcc_ipq806x_clks[] = { [AHBIX_CLK] = &ahbix_clk.clkr, }; +static const struct qcom_reset_map lcc_ipq806x_resets[] = { + [LCC_PCM_RESET] = { 0x54, 13 }, +}; + static const struct regmap_config lcc_ipq806x_regmap_config = { .reg_bits = 32, .reg_stride = 4, @@ -417,6 +422,8 @@ static const struct qcom_cc_desc lcc_ipq806x_desc = { .config = &lcc_ipq806x_regmap_config, .clks = lcc_ipq806x_clks, .num_clks = ARRAY_SIZE(lcc_ipq806x_clks), + .resets = lcc_ipq806x_resets, + .num_resets = ARRAY_SIZE(lcc_ipq806x_resets), }; static const struct of_device_id lcc_ipq806x_match_table[] = { From patchwork Tue Jun 21 16:33:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12889527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91107C43334 for ; Tue, 21 Jun 2022 16:33:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353154AbiFUQdx (ORCPT ); Tue, 21 Jun 2022 12:33:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48792 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353036AbiFUQdw (ORCPT ); Tue, 21 Jun 2022 12:33:52 -0400 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E449A140A1; Tue, 21 Jun 2022 09:33:50 -0700 (PDT) Received: by mail-ed1-x533.google.com with SMTP id ej4so16177876edb.7; Tue, 21 Jun 2022 09:33:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6e6BRQh3YyDffgzUxuFfBfk4yDxOwjIQUZDD8w+p1fg=; b=c2hMbgy0NvH9isC6XH0a6iK4WVDRuA8aodpZV5vJcyBmbEjRTaY58YpVP/z6qYi8WJ PL2W0HuWj+CEG/4Ot2GHxgfZxaO1Hv0pAAZOG54VJyard5FQs1XtPE/78cWnzRRyVBU9 wLyiaLC6d72aaH/DKhrtjhE6Qxqr1YgJLZBGyH3nTpSFZlYhx4TWfaU25QAPirsBKkQe BEbFFmW/sSez5cYPNjDtMdxcB0oVdOE/m8za6+jDNbGYztpAQYjh84oCuE7LAawcA2qQ WvDIBQ+x6DwswTB4dQu2+S0MrkIvfQeE9h8e0bLzJ+5qnvbGi7ePzb1ZDyZSrNwAl4hs pYgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6e6BRQh3YyDffgzUxuFfBfk4yDxOwjIQUZDD8w+p1fg=; b=j0CLB0+YIlglT1GDU1yKlX73QBol07J8PxhZzEmatBNwr8ecXqMNzaf7daDl02D2ft 4EFmj5EFeeXtyO934GaRkFMVqjj16Pc55f03BfVFAlW6sOuH2DLt5fIbIFx5HkfPqH7m P+AWLI+znioOd/mZj97hZURz+4XdXO7NAbZwXADVDT9sKR3FgK6cjtxNxcPZ0bFEBYB9 zXMZpipLJFiUrRY4ayqv7J6+g8A81bvVPPf6ky96I+jU+/lgcEjeeOrW2O3M76HuKUum 2cvZ+RC+hJm166A95mr6gGjEQGwWlzTw0ZeuNxMuEbO0v6SWWDIfPmG8jVdY4k1NPS/4 o8PA== X-Gm-Message-State: AJIora+peJsazrLflDeuM0EkqwQcCtlVYoFNPmLU9TGblOv+iCtGgcv4 x7XFLGZzJloElwz9E5cM2Nb9ym/x4fw= X-Google-Smtp-Source: AGRyM1tVogMNGQJ8hMLGtktujSSyK3CWte3nRvoVY+etuUzVvkZbnUkqSdbe+/nS3va9ANrk9JYAfQ== X-Received: by 2002:a05:6402:43c7:b0:435:8a92:e8d0 with SMTP id p7-20020a05640243c700b004358a92e8d0mr9737582edc.174.1655829229352; Tue, 21 Jun 2022 09:33:49 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id g5-20020a50d5c5000000b004356c0d7436sm9557663edj.42.2022.06.21.09.33.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jun 2022 09:33:49 -0700 (PDT) From: Christian Marangi To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v2 3/3] clk: qcom: lcc-ipq806x: convert to parent data Date: Tue, 21 Jun 2022 18:33:26 +0200 Message-Id: <20220621163326.16858-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220621163326.16858-1-ansuelsmth@gmail.com> References: <20220621163326.16858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert lcc-ipq806x driver to parent_data API. Signed-off-by: Christian Marangi --- v2: - Fix Sob tag drivers/clk/qcom/lcc-ipq806x.c | 79 +++++++++++++++++++--------------- 1 file changed, 44 insertions(+), 35 deletions(-) diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c index ba90bebba597..c07ca8dc6e3a 100644 --- a/drivers/clk/qcom/lcc-ipq806x.c +++ b/drivers/clk/qcom/lcc-ipq806x.c @@ -24,6 +24,10 @@ #include "clk-regmap-mux.h" #include "reset.h" +static const struct clk_parent_data gcc_pxo[] = { + { .fw_name = "pxo", .name = "pxo" }, +}; + static struct clk_pll pll4 = { .l_reg = 0x4, .m_reg = 0x8, @@ -34,7 +38,7 @@ static struct clk_pll pll4 = { .status_bit = 16, .clkr.hw.init = &(struct clk_init_data){ .name = "pll4", - .parent_names = (const char *[]){ "pxo" }, + .parent_data = gcc_pxo, .num_parents = 1, .ops = &clk_pll_ops, }, @@ -64,9 +68,9 @@ static const struct parent_map lcc_pxo_pll4_map[] = { { P_PLL4, 2 } }; -static const char * const lcc_pxo_pll4[] = { - "pxo", - "pll4_vote", +static const struct clk_parent_data lcc_pxo_pll4[] = { + { .fw_name = "pxo", .name = "pxo" }, + { .fw_name = "pll4_vote", .name = "pll4_vote" }, }; static struct freq_tbl clk_tbl_aif_mi2s[] = { @@ -131,18 +135,14 @@ static struct clk_rcg mi2s_osr_src = { .enable_mask = BIT(9), .hw.init = &(struct clk_init_data){ .name = "mi2s_osr_src", - .parent_names = lcc_pxo_pll4, - .num_parents = 2, + .parent_data = lcc_pxo_pll4, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_ops, .flags = CLK_SET_RATE_GATE, }, }, }; -static const char * const lcc_mi2s_parents[] = { - "mi2s_osr_src", -}; - static struct clk_branch mi2s_osr_clk = { .halt_reg = 0x50, .halt_bit = 1, @@ -152,7 +152,9 @@ static struct clk_branch mi2s_osr_clk = { .enable_mask = BIT(17), .hw.init = &(struct clk_init_data){ .name = "mi2s_osr_clk", - .parent_names = lcc_mi2s_parents, + .parent_hws = (const struct clk_hw*[]){ + &mi2s_osr_src.clkr.hw, + }, .num_parents = 1, .ops = &clk_branch_ops, .flags = CLK_SET_RATE_PARENT, @@ -167,7 +169,9 @@ static struct clk_regmap_div mi2s_div_clk = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "mi2s_div_clk", - .parent_names = lcc_mi2s_parents, + .parent_hws = (const struct clk_hw*[]){ + &mi2s_osr_src.clkr.hw, + }, .num_parents = 1, .ops = &clk_regmap_div_ops, }, @@ -183,7 +187,9 @@ static struct clk_branch mi2s_bit_div_clk = { .enable_mask = BIT(15), .hw.init = &(struct clk_init_data){ .name = "mi2s_bit_div_clk", - .parent_names = (const char *[]){ "mi2s_div_clk" }, + .parent_hws = (const struct clk_hw*[]){ + &mi2s_div_clk.clkr.hw, + }, .num_parents = 1, .ops = &clk_branch_ops, .flags = CLK_SET_RATE_PARENT, @@ -191,6 +197,10 @@ static struct clk_branch mi2s_bit_div_clk = { }, }; +static const struct clk_parent_data lcc_mi2s_bit_div_codec_clk[] = { + { .hw = &mi2s_bit_div_clk.clkr.hw, }, + { .fw_name = "mi2s_codec_clk", .name = "mi2s_codec_clk" }, +}; static struct clk_regmap_mux mi2s_bit_clk = { .reg = 0x48, @@ -199,11 +209,8 @@ static struct clk_regmap_mux mi2s_bit_clk = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "mi2s_bit_clk", - .parent_names = (const char *[]){ - "mi2s_bit_div_clk", - "mi2s_codec_clk", - }, - .num_parents = 2, + .parent_data = lcc_mi2s_bit_div_codec_clk, + .num_parents = ARRAY_SIZE(lcc_mi2s_bit_div_codec_clk), .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, @@ -245,8 +252,8 @@ static struct clk_rcg pcm_src = { .enable_mask = BIT(9), .hw.init = &(struct clk_init_data){ .name = "pcm_src", - .parent_names = lcc_pxo_pll4, - .num_parents = 2, + .parent_data = lcc_pxo_pll4, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_ops, .flags = CLK_SET_RATE_GATE, }, @@ -262,7 +269,9 @@ static struct clk_branch pcm_clk_out = { .enable_mask = BIT(11), .hw.init = &(struct clk_init_data){ .name = "pcm_clk_out", - .parent_names = (const char *[]){ "pcm_src" }, + .parent_hws = (const struct clk_hw*[]){ + &pcm_src.clkr.hw, + }, .num_parents = 1, .ops = &clk_branch_ops, .flags = CLK_SET_RATE_PARENT, @@ -270,6 +279,11 @@ static struct clk_branch pcm_clk_out = { }, }; +static const struct clk_parent_data lcc_pcm_clk_out_codec_clk[] = { + { .hw = &pcm_clk_out.clkr.hw, }, + { .fw_name = "pcm_codec_clk", .name = "pcm_codec_clk" }, +}; + static struct clk_regmap_mux pcm_clk = { .reg = 0x54, .shift = 10, @@ -277,11 +291,8 @@ static struct clk_regmap_mux pcm_clk = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "pcm_clk", - .parent_names = (const char *[]){ - "pcm_clk_out", - "pcm_codec_clk", - }, - .num_parents = 2, + .parent_data = lcc_pcm_clk_out_codec_clk, + .num_parents = ARRAY_SIZE(lcc_pcm_clk_out_codec_clk), .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, @@ -325,18 +336,14 @@ static struct clk_rcg spdif_src = { .enable_mask = BIT(9), .hw.init = &(struct clk_init_data){ .name = "spdif_src", - .parent_names = lcc_pxo_pll4, - .num_parents = 2, + .parent_data = lcc_pxo_pll4, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_ops, .flags = CLK_SET_RATE_GATE, }, }, }; -static const char * const lcc_spdif_parents[] = { - "spdif_src", -}; - static struct clk_branch spdif_clk = { .halt_reg = 0xd4, .halt_bit = 1, @@ -346,7 +353,9 @@ static struct clk_branch spdif_clk = { .enable_mask = BIT(12), .hw.init = &(struct clk_init_data){ .name = "spdif_clk", - .parent_names = lcc_spdif_parents, + .parent_hws = (const struct clk_hw*[]){ + &spdif_src.clkr.hw, + }, .num_parents = 1, .ops = &clk_branch_ops, .flags = CLK_SET_RATE_PARENT, @@ -384,8 +393,8 @@ static struct clk_rcg ahbix_clk = { .enable_mask = BIT(11), .hw.init = &(struct clk_init_data){ .name = "ahbix", - .parent_names = lcc_pxo_pll4, - .num_parents = 2, + .parent_data = lcc_pxo_pll4, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_lcc_ops, }, },