From patchwork Thu Jun 23 20:00:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12893148 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35C1FCCA483 for ; Thu, 23 Jun 2022 20:01:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229554AbiFWUBr (ORCPT ); Thu, 23 Jun 2022 16:01:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60226 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230204AbiFWUBn (ORCPT ); Thu, 23 Jun 2022 16:01:43 -0400 Received: from NAM02-SN1-obe.outbound.protection.outlook.com (mail-sn1anam02on2064.outbound.protection.outlook.com [40.107.96.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E201C3969B; Thu, 23 Jun 2022 13:01:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=WU23p7FnamMhP+cZHe0e3YTlIJZl9LDBIeo2iN7iuFOv748N8uk39W4Ad2yuDYWNzNtzKiu5Xq5ZrvVK00rld1xy+ntDUTxNxYWBqDg6nLg2acyxkM3J306N/RZxrBL+7Wp081mwbQCrwdVoVongAz7XghYcVZ0OizoUhDm5BuJ7vS5tWB9AeX7mi0QKsFdCYbs0ab0qQwGZ9S0mgkhlO5dQEOy88TfwjzBcVAEowty2WYWWbZe9pqYBLoWo0GTUGx8ivOZQm44dkLi/blU2AGcYKa9JFRsmCeHr1Onhs8vFSmP6Nhcv6amDzVMlgq2CeRULDJLivuu1suaE4HdZrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=W1+1KQnxBFEB/SzR59OiFF1wSnYuPbtifHaTOkG7BzM=; b=nAB75WhXnlm1ILoBDlpZcynDctGsJRgg67FYYQXlV8raJmfOmLm7mm7X+Snl93KwycXgmGmlPhUUepTy8EiHW8RcmvZshiIZ3jizgt4skFnHHdYzCfDVm0HDuht51YhFSbLpOrmx4wefMujuXu6mdhvABtYZSPwfR4e+33rBsngitZre/UMm4KdU2+2ACChe1ZgRkRtKjfNjxy/JRoSDMcQbBLEZGcZp7xBBtxX4GLEr3J3TDCF5RO9D4Ults/f+NKJi54S3j2fu+052DJ3S1A5bBuoVZo24XMqVb2J+lrmr3aMMbnXAF8cGcRtEd1x8qdzRFUTXjf/xHHKukzU/5w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.234) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=W1+1KQnxBFEB/SzR59OiFF1wSnYuPbtifHaTOkG7BzM=; b=CBlhzdc3L0lhcjW0JcMDwtL4IDVYYRq0wbIhgkGbzh65g3l1pFnYnynXy9zsWsm2e4toD5cUL0KBhvHnZKFA3Hef5FySKwxf55kmBDDkkNqaNdnjtOwLwHTz8yMcUIZ7kR0ChLCRpR/K7EOhLMHe82Sa+ChWK1omvxuYaQ2zIt54LtIyx+U7XeS15Az548rca9nSZ0niudWn/SgbX+QATOKc/PPqlMCoQYih2VVGJaMDwXGMpjJfEXcJpgYcp7vKekcAPW34E6VmIh4w7Z9OVejOGHPAYVg3FN7koazNP2IhMy72+Z/gaEzQBqvISHtceG7yrp9nUYDiLBFJUYmGQw== Received: from DS7PR03CA0319.namprd03.prod.outlook.com (2603:10b6:8:2b::27) by CH0PR12MB5123.namprd12.prod.outlook.com (2603:10b6:610:be::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5373.15; Thu, 23 Jun 2022 20:01:34 +0000 Received: from DM6NAM11FT025.eop-nam11.prod.protection.outlook.com (2603:10b6:8:2b:cafe::99) by DS7PR03CA0319.outlook.office365.com (2603:10b6:8:2b::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5373.16 via Frontend Transport; Thu, 23 Jun 2022 20:01:34 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.234) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.234 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.234; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.234) by DM6NAM11FT025.mail.protection.outlook.com (10.13.172.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5373.15 via Frontend Transport; Thu, 23 Jun 2022 20:01:34 +0000 Received: from rnnvmail203.nvidia.com (10.129.68.9) by DRHQMAIL101.nvidia.com (10.27.9.10) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Thu, 23 Jun 2022 20:01:33 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Thu, 23 Jun 2022 13:01:32 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.986.26 via Frontend Transport; Thu, 23 Jun 2022 13:01:30 -0700 From: Nicolin Chen To: , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 1/5] iommu: Return -EMEDIUMTYPE for incompatible domain and device/group Date: Thu, 23 Jun 2022 13:00:25 -0700 Message-ID: <20220623200029.26007-2-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220623200029.26007-1-nicolinc@nvidia.com> References: <20220623200029.26007-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 95bcdada-814f-4b20-0cfd-08da55532ca1 X-MS-TrafficTypeDiagnostic: CH0PR12MB5123:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: G9IgKU9rbo8WwoOhnrTZzFq3LGw3K6XQ6HGoFY0WebknY5dagO8EqJw6TEkPUxmByxtHZ73LEHt1k2QCWU9No2NqliNIkXVTaE1QUueRK+UEivrY5qNamAAse8FqsUuJmZXeaOu+a3H4xaY1BtunEcWO72pXB66AhG+4+CpV3w8E1PiJjnnVdCtnJnqdoxGdxCzejSNMZr2BDA7DxC/tlj+IQyazCm++/RkIozeClNX5jCBTTFXdgZXq4rRWuQFsO3UJhv8/fp4sBsGDnoLiDI7c5AzpMkQLKZTmRxBS8I68yb/D0qiDlmxLJIr07Yh0lzLp8TCDEDUHb8ZK6W177UqWXuhkSWe/iDn7rQ+C6a9aGrswku2iqrg/8O1aS4bANQoRwe3d5j9wtOZaI2QdDqRu0j6tJrvjQAzZdgpS5oPDa4PWkQjUROk2NBoMfSi/kwF/RmEmIouJAIAMednBrvjbbvQy3e5CuOQ7KSV8BZuX8bH09I/sSC2ZyzeEseJROOoiHDbsXjTjpi+H7ep5PSECGf/6XA0Xj4chPN/SYxqfccRfFUCjWSQD8CXl9MPLH0pC6wXe/UPIHQ0Ko/mfW9ZTBlAF8C5iFIXtVqmBbkrvCbPMuJ8GcC+47iKTdFX3yJEA0NKOlMjAO2tCEgDIyi0u3YgwHAYgb/KZz6fsESwYWJGJX08hpdTbF5TuK/cHuCE7onBoP91EUiu/G8EWUBFwv1dEyFQLLnUCPrCqxGYIxJ19iJY7j9mHE7KkqRsC9v1xpIg/ubBlao7XJ72mF/8O3zKKQNYGJ0YtyvXw3dtlhjwh8UykXcWsC/pv5tFK2rCWIXaG0ietjFrezsusCfQJOWqF7ffjUK8l4enTdgvrXYPFYArV07u358JPfFSy7iiRdFlfIVzVM8rgV2XuNasPlz4LrlzrehFjx496QfA93UYH2cdzoA2dwV/a4FQj9UbBSNgPBK9YuYiL7lTsOA== X-Forefront-Antispam-Report: CIP:12.22.5.234;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(136003)(346002)(396003)(376002)(39860400002)(46966006)(40470700004)(36840700001)(356005)(921005)(478600001)(41300700001)(6666004)(26005)(30864003)(36860700001)(40480700001)(70586007)(8936002)(82310400005)(83380400001)(82740400003)(2906002)(81166007)(7416002)(7406005)(7696005)(5660300002)(186003)(2616005)(47076005)(426003)(110136005)(8676002)(336012)(1076003)(40460700003)(54906003)(36756003)(4326008)(316002)(86362001)(70206006)(334744004)(36900700001)(2101003)(83996005)(473944003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jun 2022 20:01:34.4182 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 95bcdada-814f-4b20-0cfd-08da55532ca1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.234];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT025.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5123 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Cases like VFIO wish to attach a device to an existing domain that was not allocated specifically from the device. This raises a condition where the IOMMU driver can fail the domain attach because the domain and device are incompatible with each other. This is a soft failure that can be resolved by using a different domain. Provide a dedicated errno from the IOMMU driver during attach that the reason attached failed is because of domain incompatability. EMEDIUMTYPE is chosen because it is never used within the iommu subsystem today and evokes a sense that the 'medium' aka the domain is incompatible. VFIO can use this to know attach is a soft failure and it should continue searching. Otherwise the attach will be a hard failure and VFIO will return the code to userspace. Update all drivers to return EMEDIUMTYPE in their failure paths that are related to domain incompatability. Also remove adjacent error prints for these soft failures, to prevent a kernel log spam, since -EMEDIUMTYPE is clear enough to indicate an incompatability error. Add kdocs describing this behavior. Suggested-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/iommu/amd/iommu.c | 2 +- drivers/iommu/apple-dart.c | 4 +-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 15 +++-------- drivers/iommu/arm/arm-smmu/arm-smmu.c | 6 ++--- drivers/iommu/arm/arm-smmu/qcom_iommu.c | 9 ++----- drivers/iommu/intel/iommu.c | 10 +++----- drivers/iommu/iommu.c | 28 +++++++++++++++++++++ drivers/iommu/ipmmu-vmsa.c | 4 +-- drivers/iommu/mtk_iommu_v1.c | 2 +- drivers/iommu/omap-iommu.c | 3 +-- drivers/iommu/s390-iommu.c | 2 +- drivers/iommu/sprd-iommu.c | 6 ++--- drivers/iommu/tegra-gart.c | 2 +- drivers/iommu/virtio-iommu.c | 3 +-- 14 files changed, 49 insertions(+), 47 deletions(-) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 840831d5d2ad..ad499658a6b6 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -1662,7 +1662,7 @@ static int attach_device(struct device *dev, if (domain->flags & PD_IOMMUV2_MASK) { struct iommu_domain *def_domain = iommu_get_dma_domain(dev); - ret = -EINVAL; + ret = -EMEDIUMTYPE; if (def_domain->type != IOMMU_DOMAIN_IDENTITY) goto out; diff --git a/drivers/iommu/apple-dart.c b/drivers/iommu/apple-dart.c index 8af0242a90d9..e58dc310afd7 100644 --- a/drivers/iommu/apple-dart.c +++ b/drivers/iommu/apple-dart.c @@ -495,10 +495,10 @@ static int apple_dart_attach_dev(struct iommu_domain *domain, if (cfg->stream_maps[0].dart->force_bypass && domain->type != IOMMU_DOMAIN_IDENTITY) - return -EINVAL; + return -EMEDIUMTYPE; if (!cfg->stream_maps[0].dart->supports_bypass && domain->type == IOMMU_DOMAIN_IDENTITY) - return -EINVAL; + return -EMEDIUMTYPE; ret = apple_dart_finalize_domain(domain, cfg); if (ret) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 88817a3376ef..5b64138f549d 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2420,24 +2420,15 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) goto out_unlock; } } else if (smmu_domain->smmu != smmu) { - dev_err(dev, - "cannot attach to SMMU %s (upstream of %s)\n", - dev_name(smmu_domain->smmu->dev), - dev_name(smmu->dev)); - ret = -ENXIO; + ret = -EMEDIUMTYPE; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && master->ssid_bits != smmu_domain->s1_cfg.s1cdmax) { - dev_err(dev, - "cannot attach to incompatible domain (%u SSID bits != %u)\n", - smmu_domain->s1_cfg.s1cdmax, master->ssid_bits); - ret = -EINVAL; + ret = -EMEDIUMTYPE; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && smmu_domain->stall_enabled != master->stall_enabled) { - dev_err(dev, "cannot attach to stall-%s domain\n", - smmu_domain->stall_enabled ? "enabled" : "disabled"); - ret = -EINVAL; + ret = -EMEDIUMTYPE; goto out_unlock; } diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index 2ed3594f384e..072cac5ab5a4 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1135,10 +1135,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) struct arm_smmu_device *smmu; int ret; - if (!fwspec || fwspec->ops != &arm_smmu_ops) { - dev_err(dev, "cannot attach to SMMU, is it on the same bus?\n"); - return -ENXIO; - } + if (!fwspec || fwspec->ops != &arm_smmu_ops) + return -EMEDIUMTYPE; /* * FIXME: The arch/arm DMA API code tries to attach devices to its own diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c index 4c077c38fbd6..8372f985c14a 100644 --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c @@ -381,13 +381,8 @@ static int qcom_iommu_attach_dev(struct iommu_domain *domain, struct device *dev * Sanity check the domain. We don't support domains across * different IOMMUs. */ - if (qcom_domain->iommu != qcom_iommu) { - dev_err(dev, "cannot attach to IOMMU %s while already " - "attached to domain on IOMMU %s\n", - dev_name(qcom_domain->iommu->dev), - dev_name(qcom_iommu->dev)); - return -EINVAL; - } + if (qcom_domain->iommu != qcom_iommu) + return -EMEDIUMTYPE; return 0; } diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 44016594831d..db5fb799e350 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4323,19 +4323,15 @@ static int prepare_domain_attach_device(struct iommu_domain *domain, return -ENODEV; if (dmar_domain->force_snooping && !ecap_sc_support(iommu->ecap)) - return -EOPNOTSUPP; + return -EMEDIUMTYPE; /* check if this iommu agaw is sufficient for max mapped address */ addr_width = agaw_to_width(iommu->agaw); if (addr_width > cap_mgaw(iommu->cap)) addr_width = cap_mgaw(iommu->cap); - if (dmar_domain->max_addr > (1LL << addr_width)) { - dev_err(dev, "%s: iommu width (%d) is not " - "sufficient for the mapped address (%llx)\n", - __func__, addr_width, dmar_domain->max_addr); - return -EFAULT; - } + if (dmar_domain->max_addr > (1LL << addr_width)) + return -EMEDIUMTYPE; dmar_domain->gaw = addr_width; /* diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 847ad47a2dfd..5b0afe39275e 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1972,6 +1972,20 @@ static int __iommu_attach_device(struct iommu_domain *domain, return ret; } +/** + * iommu_attach_device - Attach a device to an IOMMU domain + * @domain: IOMMU domain to attach + * @dev: Device that will be attached + * + * Returns 0 on success and error code on failure + * + * Specifically, -EMEDIUMTYPE is returned as a soft failure if the domain and + * the device are incompatible in some way. This indicates that a caller should + * try another existing IOMMU domain or allocate a new one. And note that it's + * recommended to keep kernel print free when reporting -EMEDIUMTYPE error, as + * this function can be called to test compatibility with domains that will fail + * the test, which will result in a kernel log spam. + */ int iommu_attach_device(struct iommu_domain *domain, struct device *dev) { struct iommu_group *group; @@ -2098,6 +2112,20 @@ static int __iommu_attach_group(struct iommu_domain *domain, return ret; } +/** + * iommu_attach_group - Attach an IOMMU group to an IOMMU domain + * @domain: IOMMU domain to attach + * @group: IOMMU group that will be attached + * + * Returns 0 on success and error code on failure + * + * Specifically, -EMEDIUMTYPE is returned as a soft failure if the domain and + * the device are incompatible in some way. This indicates that a caller should + * try another existing IOMMU domain or allocate a new one. And note that it's + * recommended to keep kernel print free when reporting -EMEDIUMTYPE error, as + * this function can be called to test compatibility with domains that will fail + * the test, which will result in a kernel log spam. + */ int iommu_attach_group(struct iommu_domain *domain, struct iommu_group *group) { int ret; diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c index 8fdb84b3642b..82d63394b166 100644 --- a/drivers/iommu/ipmmu-vmsa.c +++ b/drivers/iommu/ipmmu-vmsa.c @@ -628,9 +628,7 @@ static int ipmmu_attach_device(struct iommu_domain *io_domain, * Something is wrong, we can't attach two devices using * different IOMMUs to the same domain. */ - dev_err(dev, "Can't attach IPMMU %s to domain on IPMMU %s\n", - dev_name(mmu->dev), dev_name(domain->mmu->dev)); - ret = -EINVAL; + ret = -EMEDIUMTYPE; } else dev_info(dev, "Reusing IPMMU context %u\n", domain->context_id); diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index e1cb51b9866c..5386d889429d 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -304,7 +304,7 @@ static int mtk_iommu_v1_attach_device(struct iommu_domain *domain, struct device /* Only allow the domain created internally. */ mtk_mapping = data->mapping; if (mtk_mapping->domain != domain) - return 0; + return -EMEDIUMTYPE; if (!data->m4u_dom) { data->m4u_dom = dom; diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c index d9cf2820c02e..6bc8925726bf 100644 --- a/drivers/iommu/omap-iommu.c +++ b/drivers/iommu/omap-iommu.c @@ -1471,8 +1471,7 @@ omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) /* only a single client device can be attached to a domain */ if (omap_domain->dev) { - dev_err(dev, "iommu domain is already attached\n"); - ret = -EBUSY; + ret = -EMEDIUMTYPE; goto out; } diff --git a/drivers/iommu/s390-iommu.c b/drivers/iommu/s390-iommu.c index c898bcbbce11..ddcb78b284bb 100644 --- a/drivers/iommu/s390-iommu.c +++ b/drivers/iommu/s390-iommu.c @@ -127,7 +127,7 @@ static int s390_iommu_attach_device(struct iommu_domain *domain, /* Allow only devices with identical DMA range limits */ } else if (domain->geometry.aperture_start != zdev->start_dma || domain->geometry.aperture_end != zdev->end_dma) { - rc = -EINVAL; + rc = -EMEDIUMTYPE; spin_unlock_irqrestore(&s390_domain->list_lock, flags); goto out_restore; } diff --git a/drivers/iommu/sprd-iommu.c b/drivers/iommu/sprd-iommu.c index bd409bab6286..f6ae230ca1cd 100644 --- a/drivers/iommu/sprd-iommu.c +++ b/drivers/iommu/sprd-iommu.c @@ -237,10 +237,8 @@ static int sprd_iommu_attach_device(struct iommu_domain *domain, struct sprd_iommu_domain *dom = to_sprd_domain(domain); size_t pgt_size = sprd_iommu_pgt_size(domain); - if (dom->sdev) { - pr_err("There's already a device attached to this domain.\n"); - return -EINVAL; - } + if (dom->sdev) + return -EMEDIUMTYPE; dom->pgt_va = dma_alloc_coherent(sdev->dev, pgt_size, &dom->pgt_pa, GFP_KERNEL); if (!dom->pgt_va) diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c index a6700a40a6f8..011c33e6ae31 100644 --- a/drivers/iommu/tegra-gart.c +++ b/drivers/iommu/tegra-gart.c @@ -112,7 +112,7 @@ static int gart_iommu_attach_dev(struct iommu_domain *domain, spin_lock(&gart->dom_lock); if (gart->active_domain && gart->active_domain != domain) { - ret = -EBUSY; + ret = -EMEDIUMTYPE; } else if (dev_iommu_priv_get(dev) != domain) { dev_iommu_priv_set(dev, domain); gart->active_domain = domain; diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index 25be4b822aa0..a41a62dccb4d 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -733,8 +733,7 @@ static int viommu_attach_dev(struct iommu_domain *domain, struct device *dev) */ ret = viommu_domain_finalise(vdev, domain); } else if (vdomain->viommu != vdev->viommu) { - dev_err(dev, "cannot attach to foreign vIOMMU\n"); - ret = -EXDEV; + ret = -EMEDIUMTYPE; } mutex_unlock(&vdomain->mutex); From patchwork Thu Jun 23 20:00:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12893147 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 94436C433EF for ; Thu, 23 Jun 2022 20:01:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230473AbiFWUBp (ORCPT ); Thu, 23 Jun 2022 16:01:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230192AbiFWUBn (ORCPT ); Thu, 23 Jun 2022 16:01:43 -0400 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2041.outbound.protection.outlook.com [40.107.236.41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A424396A9; Thu, 23 Jun 2022 13:01:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Co4GHUa5WYY6rVCIoyjlQRDERyL3FGc5U3ZiV0/YSevyIG5k5c1Lq68AttlssKew+EIsWlygIXgNMxMFgdwZEgvZyP5Yaahox9TC+zRtChniEK3Eew8hWyn8kxG02++2hcXaviStyjEqJ3+fDWBKIJa7C7D3btlemFm3jFG4BFaoB1EiGCb6Zd+4JFVFREwEW7vE+1vOSnTnj3En//IoXr5w/9D5R8HXFLJmfmsNshxu9YdA2iIt+oPJzLGgk/9Wv9Iyc+ui2itbgmPJ5EJQB+ERaBwwkkm1Zih5Ry68LhE1jg4UcOEBZ4wfLqLUtckWAeX3MLalnckgRG+ltN/0YQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=cgJ77wZrDNZZI/c74qOyQalK+y4UD39aNlCVjefkCFU=; b=jcQNyoDxf9DZ28cF1cY8UrK5SXvOHuE98dl7iyP0PjcjWC+kM26bgPbljF3H+CESlLLM7Uxev0Be/1yztLTewuTx/qOzgSRSy+Si7jekukMgMixSOiNmBAs8PHaq8MgAl/mHuevqs5FZBYS8lwb8U0gBp6OlVL4CrlP9WrNqC7HF9wYTpsAxh37G0PA0s9fwHMSIcsWuRZrRL9uLy+ojVZ7hRPqwfpAUHZMfrW1ZKgiJ6rjuK+GO/EGSma5mMSDTxvYhP7oA97c/evHB7C9WS0voO7/BlXS7W3gZtd0oheBbxTqOV2BkaBXH8SmH0TJ7B7I2XIQiepvlFQDHCQycUg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.236) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=cgJ77wZrDNZZI/c74qOyQalK+y4UD39aNlCVjefkCFU=; b=UdqzXgp2vPSZy6Lt6lbHAFTnWPiadhpa8O1Y/fnR2uJ/8E5TW7TdKCZyzC6zGdSi5Fnn4j3ABwyZ1rvIEZo3LEF3E3h3p8g9c22R69nDANYUj2yN2C6HIRuCy6Uf06uuIpsxZGNE+q+iYBZIMHXsWLKROxJvlTo4pxbqjLjBK1Fnlis9BhEe8COX0+LCC1z2Mh5R3iMuNoUuz1oa0kWLOSSMv4SH9twNtyEPY/EmZSHTBYKqwUx5TK5rj+vdWg0aVvpw2kKc3R3Q4BRkd0j34oGAzEOmeWOFi0rUkHP9RSEKjI1UktHX+vNvhRm8bVJGLpAC5zv5D4/F+y9f3Y8ecQ== Received: from DM6PR03CA0077.namprd03.prod.outlook.com (2603:10b6:5:333::10) by CH2PR12MB3813.namprd12.prod.outlook.com (2603:10b6:610:2c::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5353.18; Thu, 23 Jun 2022 20:01:37 +0000 Received: from DM6NAM11FT021.eop-nam11.prod.protection.outlook.com (2603:10b6:5:333:cafe::a0) by DM6PR03CA0077.outlook.office365.com (2603:10b6:5:333::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5373.15 via Frontend Transport; Thu, 23 Jun 2022 20:01:37 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.236) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.236) by DM6NAM11FT021.mail.protection.outlook.com (10.13.173.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5373.15 via Frontend Transport; Thu, 23 Jun 2022 20:01:37 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Thu, 23 Jun 2022 20:01:36 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail204.nvidia.com (10.129.68.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Thu, 23 Jun 2022 13:01:35 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.986.26 via Frontend Transport; Thu, 23 Jun 2022 13:01:33 -0700 From: Nicolin Chen To: , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 2/5] vfio/iommu_type1: Prefer to reuse domains vs match enforced cache coherency Date: Thu, 23 Jun 2022 13:00:26 -0700 Message-ID: <20220623200029.26007-3-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220623200029.26007-1-nicolinc@nvidia.com> References: <20220623200029.26007-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 75f04611-1fe9-4f3a-87e4-08da55532e48 X-MS-TrafficTypeDiagnostic: CH2PR12MB3813:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3ANiL2ol6JRxsySqqh5zZx+M9SaAgOzRGLmWTi+hka87xak42yNXAmkib7DaHXljd212hiDpFUmRgWRDgqD0cjwSyXDZBuOAbV5EVT0j78H7acGoDFjleMUtDsEzENZ3/z8isiISbIpHQTRMzRSXUQZdyYzb6BeYLprTY8jtcYQSiCxVKWfLWoF182VqwiDfWOI5Uc885D5AOxnRqibLg+mlk8ijioJwWpdikqkyRM0YTCjBpep573T5KSb4V0KXpYqia/TaJYtuGggA9CtvJ00Wxy8+CiduZKj5LJXMiRzQIN007IEIz7gG0eZQXEV1NC3hjEZ4kEBXPZ348m3VO8ylFGfuZc8L2pmqv2P+BW30FewDzZcDWdkFgPFjKJCEvZq623uS1FB9SaC0RK6L/y9vy6HINy0OdKVqztPmGBdilDea1N+e/okIIeVr0cvRNrfPnJSiaaXa3xoYUoCYVBDZgwiTzt1XRPR4wiCNjhOk+Zh4V8XiOn957EZlDxglmK63NeXhmjkNYse2KNuQl+59uLmkBGZps7/dgBz6hhlksXTDy1fSkYLQylmYtpgXOjCIcBztRcEYhZ7bKBTwgb74i+nBLIEHtjmrXS3YqHF6NlIyzFg6N498MXP2NyRR4W658yDkwOYQDLIIw3VjcnJXANUL4kYjKb9mMJW2EVxj7Y7rd1xYQeRmpYQVq6DNgVBPWxUGAJ0y8BF2W390Cs3CgCK2ES7i51IwdNrugJQeb2IDjypeq5umq2BRYjgGOKqxa8GeYsh2dEpFziEhIwIlF2h2mmsP/DD/V1/DgBmezoP8fWXzeFdxYApib4FPFnq8naJQ9D8gM0qo31k036HySx0oTkGmquRD7ckNeCiaAL7mM5WNYfK1c0fWPmrpULTI6WP56IsVoqAsiSQoCw== X-Forefront-Antispam-Report: CIP:12.22.5.236;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(376002)(346002)(39860400002)(396003)(136003)(40470700004)(36840700001)(46966006)(8936002)(36860700001)(7416002)(41300700001)(336012)(356005)(1076003)(40460700003)(83380400001)(36756003)(186003)(47076005)(70586007)(5660300002)(70206006)(426003)(2616005)(82310400005)(26005)(7696005)(478600001)(8676002)(6666004)(110136005)(54906003)(921005)(316002)(2906002)(82740400003)(7406005)(86362001)(4326008)(40480700001)(81166007)(83996005)(36900700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jun 2022 20:01:37.2248 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 75f04611-1fe9-4f3a-87e4-08da55532e48 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT021.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB3813 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Jason Gunthorpe The KVM mechanism for controlling wbinvd is based on OR of the coherency property of all devices attached to a guest, no matter whether those devices are attached to a single domain or multiple domains. On the other hand, the benefit to using separate domains was that those devices attached to domains supporting enforced cache coherency always mapped with the attributes necessary to provide that feature, therefore if a non-enforced domain was dropped, the associated group removal would re-trigger an evaluation by KVM. In practice however, the only known cases of such mixed domains included an Intel IGD device behind an IOMMU lacking snoop control, where such devices do not support hotplug, therefore this scenario lacks testing and is not considered sufficiently relevant to support. After all, KVM won't take advantage of trying to push a device that could do enforced cache coherency to a dedicated domain vs re-using an existing domain, which is non-coherent. Simplify this code and eliminate the test. This removes the only logic that needed to have a dummy domain attached prior to searching for a matching domain and simplifies the next patches. It's unclear whether we want to further optimize the Intel driver to update the domain coherency after a device is detached from it, at least not before KVM can be verified to handle such dynamics in related emulation paths (wbinvd, vcpu load, write_cr0, ept, etc.). In reality we don't see an usage requiring such optimization as the only device which imposes such non-coherency is Intel GPU which even doesn't support hotplug/hot remove. Signed-off-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen Reviewed-by: Lu Baolu --- drivers/vfio/vfio_iommu_type1.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index c13b9290e357..f4e3b423a453 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2285,9 +2285,7 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, * testing if they're on the same bus_type. */ list_for_each_entry(d, &iommu->domain_list, next) { - if (d->domain->ops == domain->domain->ops && - d->enforce_cache_coherency == - domain->enforce_cache_coherency) { + if (d->domain->ops == domain->domain->ops) { iommu_detach_group(domain->domain, group->iommu_group); if (!iommu_attach_group(d->domain, group->iommu_group)) { From patchwork Thu Jun 23 20:00:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12893149 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7530CC433EF for ; Thu, 23 Jun 2022 20:01:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229929AbiFWUBs (ORCPT ); Thu, 23 Jun 2022 16:01:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231202AbiFWUBp (ORCPT ); Thu, 23 Jun 2022 16:01:45 -0400 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2041.outbound.protection.outlook.com [40.107.236.41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6636396A8; Thu, 23 Jun 2022 13:01:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=iEn3xq36up9V6E08QdW1kFJoHBnAzOm6wJdSUEPaObx3Hdtc3u34kXi+CQ8TWco5GZibzYJ4LzYnST+wZz5eM+t91weB83DV036bpkQNxGEX7YiYWKWYOzDeuGTzuGjZYB48gKUG0X2hDxqubSfR/2usY3dwjALkDF1HpZnIph5ev77kMueUVuLppjx0b3bBnUfvh14UIG+cr2DW/yYGTRMwCkGJFVhzlGYS8UTixGyPRCjMg+NN8fTjM/Osu6sqOwzSmYXEtzRKEzX3CRhgRJKx3I9qeefGNvzs/4ag6aReINUctkhc1hRH/WHX4CLCnZzK3NRghKp+AWmGuoLgtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=iiLl+1qlIiZ2p5XtsJlrm1t+tPCrFaHsdr1121XcM/M=; b=cSsFYOQufHDidw4MlQq+Y8ii74VoyK3eE13t1gwOFIhH2oSLiaY/iAOkCmU65RpZjVboajK9Ka9ey41M0CiT8Z8L2TcLKV9ynBKKRcn+cpSQ7RQfxHC53+xXR2ICGYlw/y7zPB80lZyPdSwXIkqQ3PhFibHgiEUuVnIV4wYM1JoeVmiCG4uykquGpmNsn7XlKnhwUx6uMzt1L5uPAKOgL8ZolDDUGi+Ska3TuQWKcdI1vjhxV6Vp/TJ5G2/kzaQEy2fRGHxSG9ZCw1ljyf+308bWTfUQzZF12+Zrpf+x+N4BwESbVRTrlFtZTzLsJYq1BXH8dQAS2d7CZELXxZZS6A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.235) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=iiLl+1qlIiZ2p5XtsJlrm1t+tPCrFaHsdr1121XcM/M=; b=JGW4LEKhNUZbyIo9qiAvbZXZS7j83x/X3izclI6zn572DClh36vUR49ILOeqIhvDNCRTRy2+3kLk1AjZskdSWcra2J4W2vKH/AGUoB9NHcAuCmEX2CzdLWHuOMlfcLRfqgVID5Mb9MbNARRGQBQSX0cAr4RYGv52TKkNvEEhbiIVRnKv+ZmInCwWqRYWpxvMFf4Hfx9dL+abrcwgdlSFzoU0fJjsk8b4GAtQHpShfAvKuClQG4BDRcFPjzP5mpLmockK0IVQXoJb1vH1sNS8aYMI00Snk9kG6/FmYigXL/BrzLuR8GCVpGoGd/9Oc2jL0oCZYOrNTmHWAbPFNF//2Q== Received: from BN9PR03CA0783.namprd03.prod.outlook.com (2603:10b6:408:13f::8) by SN6PR12MB2751.namprd12.prod.outlook.com (2603:10b6:805:6c::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5373.15; Thu, 23 Jun 2022 20:01:40 +0000 Received: from BN8NAM11FT032.eop-nam11.prod.protection.outlook.com (2603:10b6:408:13f:cafe::eb) by BN9PR03CA0783.outlook.office365.com (2603:10b6:408:13f::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5373.16 via Frontend Transport; Thu, 23 Jun 2022 20:01:40 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.235) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.235 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.235; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.235) by BN8NAM11FT032.mail.protection.outlook.com (10.13.177.88) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5373.15 via Frontend Transport; Thu, 23 Jun 2022 20:01:39 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Thu, 23 Jun 2022 20:01:39 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail204.nvidia.com (10.129.68.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Thu, 23 Jun 2022 13:01:38 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.986.26 via Frontend Transport; Thu, 23 Jun 2022 13:01:36 -0700 From: Nicolin Chen To: , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 3/5] vfio/iommu_type1: Remove the domain->ops comparison Date: Thu, 23 Jun 2022 13:00:27 -0700 Message-ID: <20220623200029.26007-4-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220623200029.26007-1-nicolinc@nvidia.com> References: <20220623200029.26007-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: be33d66a-062a-445e-9b6a-08da55532fe8 X-MS-TrafficTypeDiagnostic: SN6PR12MB2751:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: cowBanVnRs74asRIkEry4va1+JrzBKVdez/9Msww3cMrrv4yrQEY50xIGLlhvMk0CpVor5zl3+aRZKKTyZv0dy7BlE/KNXar+T5Sike4FS8mD1pk/gwis8Yf7SUJwKSeUzSoRcvg4KDz4NPHZ03/7aorBvmNRWL7PB/EhwDKUHU3NlwrnNNjD5FTe0gHtU8kAiVBzOKigzQSHLowZWLQ1xxFfcWCm6MZtHKQUjzF7mKY9kOSN8nTAbU+Uyj0xmwRhzoib+VJb6IWwF4/dKsm4i8nYnjnFtTKN+b7xdw0oai82ZxjT3ifvCbq+hnwGwzSN+pkcUH/jorv51dBVGNDPt3xlMu126MT1tC3ij2vFUEr5CaAyyD6MFpDK+GRRk+U8c4s5EuvTlN/GwgMiwZBHktnpewvwiJOWDmQPrqBo/vnhgz5IcjduDrW/Y/Kmev/UBI+KcTR9Tv64bRDtC5//zfUT0+t7hAi2J3IWQ78fEwofgB+YqEMjyBVu/QH8HcL6LhRHtM6vdFNB07cJPaCT/9f1DfvTdfGdMNUOTBn+yLPmta9/cKQi8eqK132k5iwi6qzYRnrkb/ja5u/TUe6zkxghqANeJkprZoNrSe+XgmFRVSMa5/v5G/IiyS+z1pT8ZW69G0KrD8eeAdISMwyntOfrbuKM2BTRLIjF4gSwOirah9B/7neysp+drV8ldW2LsTcRmaqwPKKfwa0a2/0bVvf5NQyZYS8Nd5qjOZ84zHcbddq6nB0dswMC1h781bzSbO2nbci3+Cal3M8psnch5jhqyNv0btXgfRlLsApZLZbQYSQ2OCzxlplcqwvDaEQo5aesjNxbR4dIlgfs6yqhqPW1HkeWE3Am3MuZtt97iOyqP+miqwfn+ZWTofqegyBsEnfpYp3vqogl+RlrUYZw7T0DNfNmuwApokdQL+yTpgCk06oWO418Ib1ib5ty6CPOrJOP0x+kwEMM3txjgIcJLCpiVbWR92d6KyjYCNVg/G0giAVcrGp3r8mBi2ts4sMv/5nixIfz9KR/PYCUgt+KA== X-Forefront-Antispam-Report: CIP:12.22.5.235;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(346002)(396003)(376002)(136003)(39860400002)(40470700004)(36840700001)(46966006)(40480700001)(7406005)(83380400001)(426003)(336012)(86362001)(2616005)(70206006)(6666004)(70586007)(4326008)(8676002)(186003)(8936002)(7416002)(5660300002)(36860700001)(47076005)(1076003)(81166007)(82740400003)(316002)(40460700003)(41300700001)(921005)(356005)(26005)(478600001)(7696005)(36756003)(2906002)(82310400005)(110136005)(54906003)(966005)(36900700001)(83996005)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jun 2022 20:01:39.9047 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: be33d66a-062a-445e-9b6a-08da55532fe8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.235];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT032.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR12MB2751 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The domain->ops validation was added, as a precaution, for mixed-driver systems. Per Robin's remarks, * While bus_set_iommu() still exists, the core code prevents multiple drivers from registering, so we can't really run into a situation of having a mixed-driver system: https://lore.kernel.org/kvm/6e1280c5-4b22-ebb3-3912-6c72bc169982@arm.com/ * And there's plenty more significant problems than this to fix; in future when many can be permitted, we will rely on the IOMMU core code to check the domain->ops: https://lore.kernel.org/kvm/6575de6d-94ba-c427-5b1e-967750ddff23@arm.com/ So remove the check in VFIO for simplicity. Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/vfio/vfio_iommu_type1.c | 32 +++++++++++--------------------- 1 file changed, 11 insertions(+), 21 deletions(-) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index f4e3b423a453..11be5f95580b 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2277,29 +2277,19 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, domain->domain->ops->enforce_cache_coherency( domain->domain); - /* - * Try to match an existing compatible domain. We don't want to - * preclude an IOMMU driver supporting multiple bus_types and being - * able to include different bus_types in the same IOMMU domain, so - * we test whether the domains use the same iommu_ops rather than - * testing if they're on the same bus_type. - */ + /* Try to match an existing compatible domain */ list_for_each_entry(d, &iommu->domain_list, next) { - if (d->domain->ops == domain->domain->ops) { - iommu_detach_group(domain->domain, group->iommu_group); - if (!iommu_attach_group(d->domain, - group->iommu_group)) { - list_add(&group->next, &d->group_list); - iommu_domain_free(domain->domain); - kfree(domain); - goto done; - } - - ret = iommu_attach_group(domain->domain, - group->iommu_group); - if (ret) - goto out_domain; + iommu_detach_group(domain->domain, group->iommu_group); + if (!iommu_attach_group(d->domain, group->iommu_group)) { + list_add(&group->next, &d->group_list); + iommu_domain_free(domain->domain); + kfree(domain); + goto done; } + + ret = iommu_attach_group(domain->domain, group->iommu_group); + if (ret) + goto out_domain; } vfio_test_domain_fgsp(domain); From patchwork Thu Jun 23 20:00:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12893150 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20ED0C43334 for ; Thu, 23 Jun 2022 20:02:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231305AbiFWUB6 (ORCPT ); Thu, 23 Jun 2022 16:01:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230451AbiFWUBt (ORCPT ); Thu, 23 Jun 2022 16:01:49 -0400 Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2082.outbound.protection.outlook.com [40.107.92.82]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EAE863A722; Thu, 23 Jun 2022 13:01:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=e/9CMReayZBOn1ygd2ecmJGVY7DOuKrYNstgTJpspixhjSxAANL45XZIHR2l80dcr4ELNMW+beEl9hzPvd4csnntZvdaowb57OXnt4hI6Baa7zUPf/HtxLKQyMVhinq3ywdcNVQRdN9j2h1Y0KFkGznrbJaIhIyTGpj1M2giu1w8RoQXg3ZvRqW/sBi4YHVt/QexLyqb5vcUbqW7lEQ8/3lWpw76dUnC+MouOW09VZ/76o4vtbtT4FF/Gz/KwGLxoB/W1wM9QqLRB2WHt1jVXxzeVQ+Q1P3fFbmNmw1tz3qtkyFhtJitguK4xLgPx6iotp3+JO/Tus/18C/80RhdPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RpJ/cMMHOAAeva/rgHTbXEVWpkRp2h2y74yQttJGbTk=; b=FQWAHQZGhsItCcQKja7seG8UpyYPFdzzke4oqz8uMokFGt0YnBYm4nPhi4jeumbDzCWSsWwyMylqsrXZvywjg0pBVGi2ADR/WW1D5JEdAdpHp3WtPp334sMqtXgWMHCThKq6Ct3jOb3blBE242yv2hlkmbQZLT+jyc7EX090eSFx+/xC2I0OZCzzRK4Gt82AWvnek1KG/4f/CKkkLQvSCnhvYQu33kSX46BNfQRPltA3PkcjNg22Z8YvShqdVWQBhunthvEEclWyzJ1LYrnwrji7RTJfNXJ4PlTZiX7pa1ZFbTb3GF1FwGvFAWyac6yPqQlWLs1EvLOR/8KoBOUPOw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.238) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RpJ/cMMHOAAeva/rgHTbXEVWpkRp2h2y74yQttJGbTk=; b=o3qYFm4x16wY3f/OJcRnIND/ctz0sMPykoUZj3znGdj80GTBQqH9a+n8UuSFOE1Rk4HPVXZ0PBel0c1oT1HgLuK9tGY7psd+0arUr1RRmcVaTZEmYxPlXniv8OKUBsrS84jF9JgU26qkdV6dV9CZSFRNUR63x2+I/mEblAIQ2EqpmSGcuqIebMIlrdcIKrU6Bv2Hx+6XrBZL2hki943AzG+R6PW8SyXvESEmGDWT+RmFD1rrdnJyddrgKW7i04SL5CYpvakYtLgiw9aP/cf6SpIpgiY4Quke6qHEOm5PmxEpH6EknZFcI/lgqb+AKMBaXTyHzSPwKeuiieDlbQRCtQ== Received: from DM6PR06CA0060.namprd06.prod.outlook.com (2603:10b6:5:54::37) by CH2PR12MB3765.namprd12.prod.outlook.com (2603:10b6:610:25::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5373.15; Thu, 23 Jun 2022 20:01:42 +0000 Received: from DM6NAM11FT054.eop-nam11.prod.protection.outlook.com (2603:10b6:5:54:cafe::8b) by DM6PR06CA0060.outlook.office365.com (2603:10b6:5:54::37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5353.19 via Frontend Transport; Thu, 23 Jun 2022 20:01:42 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.238) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.238 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.238; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.238) by DM6NAM11FT054.mail.protection.outlook.com (10.13.173.95) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5373.15 via Frontend Transport; Thu, 23 Jun 2022 20:01:42 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by DRHQMAIL105.nvidia.com (10.27.9.14) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Thu, 23 Jun 2022 20:01:42 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Thu, 23 Jun 2022 13:01:41 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.986.26 via Frontend Transport; Thu, 23 Jun 2022 13:01:38 -0700 From: Nicolin Chen To: , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 4/5] vfio/iommu_type1: Clean up update_dirty_scope in detach_group() Date: Thu, 23 Jun 2022 13:00:28 -0700 Message-ID: <20220623200029.26007-5-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220623200029.26007-1-nicolinc@nvidia.com> References: <20220623200029.26007-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a549c545-b365-4285-a2bf-08da55533174 X-MS-TrafficTypeDiagnostic: CH2PR12MB3765:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: oXI9S+yoP+6Yq+ctwi/ubAqakKZup4PFl18u8YOw7ArHXSAtBim758E8OAw4lPss/MHBNB+2BNNHNucspUqnggiMpvdvuYVyL2xaCZNa2Kp8Ck0o3GLwFOoQV2pLMi4mG/rLYmv9NMT9VB95UizIG3Yi+owoOWBWQyChAa07jJB4L6ND99CV4E44M4IhERCs3b1h3XII/ZVr9Rxn+HBTNTBjcHHDxs1Zc3pHljodX0F4PRq512X1Acxp9a25kS8xLJWT4lxhQFIl1Yp/LlU9V3Ti+VhvQFfJLD8OGxQ+bda9J3ARZwP6tCthyMlG8Co9GSWV9MGbll7xObpj/LQZhdEek29m90s20zGsUyvBIt8iDY5xnEQuvD2V5TdWk6NIINRI/d817lM35zPw+7uQNMSb4CsFo5G3KJrmUW/vXnDBL3ssUnBiFMht9H0JqjmUu+tmmn1SO5ioKFUfzPsOuBkNq42dua/aPNs5Te6auUGHC5VPgYu79JuHTN63fjYQz2A2pD5KRO4XF0mWKS9+bqZdmvGOQAoHq55mz5vlNkGyWA7c5Uurp7vS+Cr7ggnj+0D3mlXWVdp7l5ZbzO6vWi1L8aKuq5hHSTnE+RkPr4AJ/SaNWRNl7kUxXR4iC3Fwt2zUM3dhizKInnXcFcoaZx5jpjnn0jBqyUiE3XmFgdsn4QTmCVTpp2dHKqXXV3kFcskr1PLZY3mnN83BEpzaTlK5THkp/YI94rRhphFlQo/uTIN23KQYCvjIzbWN2no8tnDuTL6V4KLM0FehZWg2/0PQUqUlOqkiGhGOkJdsrphXLvXTanLefUkUVCvoOJjSK4jAcCcq5ZXZbW7He9rhQHqoOn+FB5Vh4or3JhATyqwiEysdKqxWip5hTJX+DlpsufTq5/y+FOg41TdDutMnLp64Vpd3lydDf36QAIn7v80= X-Forefront-Antispam-Report: CIP:12.22.5.238;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(396003)(376002)(346002)(39860400002)(136003)(36840700001)(40470700004)(46966006)(186003)(1076003)(40460700003)(83380400001)(336012)(47076005)(426003)(6666004)(82310400005)(4326008)(36756003)(82740400003)(81166007)(7416002)(70206006)(356005)(2616005)(921005)(7696005)(40480700001)(36860700001)(41300700001)(110136005)(86362001)(478600001)(316002)(2906002)(54906003)(70586007)(15650500001)(8676002)(7406005)(5660300002)(26005)(8936002)(14143004)(2101003)(36900700001)(83996005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jun 2022 20:01:42.5470 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a549c545-b365-4285-a2bf-08da55533174 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.238];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT054.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB3765 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org All devices in emulated_iommu_groups have pinned_page_dirty_scope set, so the update_dirty_scope in the first list_for_each_entry is always false. Clean it up, and move the "if update_dirty_scope" part from the detach_group_done routine to the domain_list part. Suggested-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/vfio/vfio_iommu_type1.c | 27 ++++++++++++--------------- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index 11be5f95580b..b9ccb3cfac5d 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2453,14 +2453,12 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, struct vfio_iommu *iommu = iommu_data; struct vfio_domain *domain; struct vfio_iommu_group *group; - bool update_dirty_scope = false; LIST_HEAD(iova_copy); mutex_lock(&iommu->lock); list_for_each_entry(group, &iommu->emulated_iommu_groups, next) { if (group->iommu_group != iommu_group) continue; - update_dirty_scope = !group->pinned_page_dirty_scope; list_del(&group->next); kfree(group); @@ -2469,7 +2467,8 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, WARN_ON(iommu->notifier.head); vfio_iommu_unmap_unpin_all(iommu); } - goto detach_group_done; + mutex_unlock(&iommu->lock); + return; } /* @@ -2485,9 +2484,7 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, continue; iommu_detach_group(domain->domain, group->iommu_group); - update_dirty_scope = !group->pinned_page_dirty_scope; list_del(&group->next); - kfree(group); /* * Group ownership provides privilege, if the group list is * empty, the domain goes away. If it's the last domain with @@ -2510,6 +2507,16 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, vfio_iommu_aper_expand(iommu, &iova_copy); vfio_update_pgsize_bitmap(iommu); } + /* + * Removal of a group without dirty tracking may allow + * the iommu scope to be promoted. + */ + if (!group->pinned_page_dirty_scope) { + iommu->num_non_pinned_groups--; + if (iommu->dirty_page_tracking) + vfio_iommu_populate_bitmap_full(iommu); + } + kfree(group); break; } @@ -2518,16 +2525,6 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, else vfio_iommu_iova_free(&iova_copy); -detach_group_done: - /* - * Removal of a group without dirty tracking may allow the iommu scope - * to be promoted. - */ - if (update_dirty_scope) { - iommu->num_non_pinned_groups--; - if (iommu->dirty_page_tracking) - vfio_iommu_populate_bitmap_full(iommu); - } mutex_unlock(&iommu->lock); } From patchwork Thu Jun 23 20:00:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12893151 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24B5DC43334 for ; Thu, 23 Jun 2022 20:02:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229718AbiFWUCK (ORCPT ); Thu, 23 Jun 2022 16:02:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230516AbiFWUBt (ORCPT ); Thu, 23 Jun 2022 16:01:49 -0400 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2072.outbound.protection.outlook.com [40.107.237.72]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30E7038BDA; Thu, 23 Jun 2022 13:01:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=IRbTCqaqKCDwb1tE0z/IcOKc8JVrg4gv8gFlmXo1sXJwkkT5sA0xQYBKjNBU/JD2tUcEoTRbCFth/05RBmqviGesfahmQwfOUkN5XQ8P5lPPdw3P7qyWmwMs3ztSY+o9O+sWsm8uhqDSGZprMA+jcfixNlJO9JFwWB42bYyA/cZ50i+y2j7hbmOWJtg7V1i6C+rAJo7482COyzF4TiOwONLLn0xdhJfCtenmSl0A0R7mjFXqZXlAMJF3Gbb4Defkgh+KorRQrsxa9g4GvPqGP5kA/oFVIhgqanCj5bemWsB+Et02I7WpQTBODxZt3LEj8iXbxlRD7+E/Rd3cYRkaBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6lQkyMkplKbQHcqGH5YFAzHcgEPv2A86aLtKZgyrHgk=; b=m8sHzo1qEfl/z7pcwkaV5sUQCDsBuVLnL7ZXnLMdzyFUenY1XIPYGzhBv4Vun1YMOfDCH10YtdHQU3S2NGQr47qsbdyLOoRiGMJQc9AbIUSjQLhbDtPsAabUijOHMZkWDr1pbK7frACBa3DSTO1qPyw5s5Zgk1rmfJS82x+v39tDllycAnPs1lOk2Vxqa0glUNEqWPWg9qMJNdm36maa/RP0ZSlCm+m2gfzQkmOagpv55OddSAKxOUAH07vEgTOB8rp/plRjFEqGZLdD0SyD3wB4BJgjMT6hwUCCIJyKE8EJvgLyBZgSze2jKV+gWOYp6irSUqloMMXQV8RNooISVg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.236) smtp.rcpttodomain=linux.intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=6lQkyMkplKbQHcqGH5YFAzHcgEPv2A86aLtKZgyrHgk=; b=HDvnVV0v2CSYvIYqvi4KIowz8s+szJOh4D7QY6Tb1Fhzcjb1AURyMtgSHX0KeJxboafrJXMKFgV4lcgg5geDfIlirPefGp+933Pgk6XbOX77MC7+9lmNm6OeNYmN030nh5wOZ7d71OR4qjTtCC9UUoohaYTRAwzZoVdCBl4mt/IUnNZMNUnKxPYSUeQXjuZU0OGvtrwDTKmHtvFNIysAR8Vzuz/Ttq9gmDIFINMD6CapWkb8ZEt8MKPMMjwsFyPr7/68gFOYJJl2Dtp4Qe8ak0R+O0cb6aA6T9/4Fnsi8Wg6ziY773OPK+RHsZSUukcT4xcKR1xzV1W1WhFLYTuq2A== Received: from DM6PR14CA0054.namprd14.prod.outlook.com (2603:10b6:5:18f::31) by BN9PR12MB5129.namprd12.prod.outlook.com (2603:10b6:408:136::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5353.16; Thu, 23 Jun 2022 20:01:45 +0000 Received: from DM6NAM11FT057.eop-nam11.prod.protection.outlook.com (2603:10b6:5:18f:cafe::f5) by DM6PR14CA0054.outlook.office365.com (2603:10b6:5:18f::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5353.19 via Frontend Transport; Thu, 23 Jun 2022 20:01:45 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.236) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.236) by DM6NAM11FT057.mail.protection.outlook.com (10.13.172.252) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5373.15 via Frontend Transport; Thu, 23 Jun 2022 20:01:45 +0000 Received: from rnnvmail203.nvidia.com (10.129.68.9) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Thu, 23 Jun 2022 20:01:44 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Thu, 23 Jun 2022 13:01:43 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.986.26 via Frontend Transport; Thu, 23 Jun 2022 13:01:41 -0700 From: Nicolin Chen To: , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 5/5] vfio/iommu_type1: Simplify group attachment Date: Thu, 23 Jun 2022 13:00:29 -0700 Message-ID: <20220623200029.26007-6-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220623200029.26007-1-nicolinc@nvidia.com> References: <20220623200029.26007-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 36d7d09a-9a4e-4e66-cf69-08da55533300 X-MS-TrafficTypeDiagnostic: BN9PR12MB5129:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: gNhZireHiuSNVSHTJm/ZOZYocFVGm3ljZzYLTM3RW6sJDJ/yg4f6RngPQcMoqXvMjNa1J9Hm9xHrsvoWD3UmFTQ2VgaXfCHLJGAK/BPdclhVBq8YdQH7L+TB0g7k2DuLmpnZyF5lrWb8R0WKocEfR7azZAoeROzlAKa6WxqC3tpFvwQySCRXjf+Mavr322XS97b0FEe4qiv80X7jVQhF2+/L4vyjgzUNSGqY7/V8OBwvhzv1xX9m0Al0wb1de6+5yvmyyw9XLKduDGvB56HOYToczfrVovJFnbGuH2lmIE0ppT4XSIO3LKh233maJQau0ax/Yy2ei3IMfuXNCeww6sQoa/DGD5W79vDx/fa9TPAIAkJj38v9S/t25lmUn/B1s7VLzZrdWvGr7/JIns6msF9cB+cH/22hL1H3kvDxSVrBht3JXimssJshw0QiPlx0aiQtq/AqbcKASR+hudsqWHyuTvcpObMk6VbcDlmVqGkaC1mwmbvmgmdU/2Pw9Y6fNUva8MFag3eRXzGbprC3Z1VwEphYlvIwskpdLqFU5ZN2Fr5ohU51OaqCop2M7T5H0JEoLajc2wMn2LtrBPBBfDYVGPcAXFVwOD+kUITEuP6ii5wsiMSdTJQp/hQEElTLw4S2cUAwEMnNCBgL6wqasC6PbCWL20cbEYoFKQOljpJYG3gKy9gBzVl5EIpE8HCM7V09PO+5m6wVUaSjU52MBjMxCVwKWPkYSTXLKrAjoAk3vb/9EusqIMUOhkTLoYkPe/6xA74ar+ZfM564khezE4PLn4Li8uj8QmEHzupYdgYU1ZyRTlkokofnW7PP/GgN9Y5QaBmZJi8vXCpg8Iy73467YdOAgj5bJ0jYzpRuZRPg9nJckrsq0YfFr5gvb7BjiMCy6R88iwNy4sxsHKaGjw== X-Forefront-Antispam-Report: CIP:12.22.5.236;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(39860400002)(136003)(396003)(346002)(376002)(36840700001)(46966006)(40470700004)(5660300002)(30864003)(36756003)(40480700001)(86362001)(7696005)(7406005)(70586007)(7416002)(54906003)(70206006)(110136005)(40460700003)(316002)(2906002)(8676002)(478600001)(356005)(186003)(36860700001)(81166007)(41300700001)(82310400005)(4326008)(8936002)(921005)(26005)(336012)(426003)(2616005)(47076005)(82740400003)(6666004)(83380400001)(1076003)(2101003)(83996005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jun 2022 20:01:45.0965 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 36d7d09a-9a4e-4e66-cf69-08da55533300 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT057.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5129 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Un-inline the domain specific logic from the attach/detach_group ops into two paired functions vfio_iommu_alloc_attach_domain() and vfio_iommu_detach_destroy_domain() that strictly deal with creating and destroying struct vfio_domains. Add the logic to check for EMEDIUMTYPE return code of iommu_attach_group() and avoid the extra domain allocations and attach/detach sequences of the old code. This allows properly detecting an actual attach error, like -ENOMEM, vs treating all attach errors as an incompatible domain. Co-developed-by: Jason Gunthorpe Signed-off-by: Jason Gunthorpe Signed-off-by: Nicolin Chen Reviewed-by: Kevin Tian --- drivers/vfio/vfio_iommu_type1.c | 321 +++++++++++++++++--------------- 1 file changed, 174 insertions(+), 147 deletions(-) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index b9ccb3cfac5d..3ffa4e2d9d18 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2153,15 +2153,174 @@ static void vfio_iommu_iova_insert_copy(struct vfio_iommu *iommu, list_splice_tail(iova_copy, iova); } +static struct vfio_domain * +vfio_iommu_alloc_attach_domain(struct bus_type *bus, struct vfio_iommu *iommu, + struct vfio_iommu_group *group, + struct list_head *group_resv_regions) +{ + struct iommu_domain *new_domain; + struct vfio_domain *domain; + phys_addr_t resv_msi_base; + int ret = 0; + + /* Try to match an existing compatible domain */ + list_for_each_entry (domain, &iommu->domain_list, next) { + ret = iommu_attach_group(domain->domain, group->iommu_group); + /* -EMEDIUMTYPE means an incompatible domain, so try next one */ + if (ret == -EMEDIUMTYPE) + continue; + if (ret) + return ERR_PTR(ret); + goto done; + } + + new_domain = iommu_domain_alloc(bus); + if (!new_domain) + return ERR_PTR(-EIO); + + if (iommu->nesting) { + ret = iommu_enable_nesting(new_domain); + if (ret) + goto out_free_iommu_domain; + } + + ret = iommu_attach_group(new_domain, group->iommu_group); + if (ret) + goto out_free_iommu_domain; + + domain = kzalloc(sizeof(*domain), GFP_KERNEL); + if (!domain) { + ret = -ENOMEM; + goto out_detach; + } + + domain->domain = new_domain; + vfio_test_domain_fgsp(domain); + + /* + * If the IOMMU can block non-coherent operations (ie PCIe TLPs with + * no-snoop set) then VFIO always turns this feature on because on Intel + * platforms it optimizes KVM to disable wbinvd emulation. + */ + if (new_domain->ops->enforce_cache_coherency) + domain->enforce_cache_coherency = + new_domain->ops->enforce_cache_coherency(new_domain); + + /* replay mappings on new domains */ + ret = vfio_iommu_replay(iommu, domain); + if (ret) + goto out_free_domain; + + if (vfio_iommu_has_sw_msi(group_resv_regions, &resv_msi_base)) { + ret = iommu_get_msi_cookie(domain->domain, resv_msi_base); + if (ret && ret != -ENODEV) + goto out_free_domain; + } + + INIT_LIST_HEAD(&domain->group_list); + list_add(&domain->next, &iommu->domain_list); + vfio_update_pgsize_bitmap(iommu); + +done: + list_add(&group->next, &domain->group_list); + + /* + * An iommu backed group can dirty memory directly and therefore + * demotes the iommu scope until it declares itself dirty tracking + * capable via the page pinning interface. + */ + iommu->num_non_pinned_groups++; + + return domain; + +out_free_domain: + kfree(domain); +out_detach: + iommu_detach_group(new_domain, group->iommu_group); +out_free_iommu_domain: + iommu_domain_free(new_domain); + return ERR_PTR(ret); +} + +static void vfio_iommu_unmap_unpin_all(struct vfio_iommu *iommu) +{ + struct rb_node *node; + + while ((node = rb_first(&iommu->dma_list))) + vfio_remove_dma(iommu, rb_entry(node, struct vfio_dma, node)); +} + +static void vfio_iommu_unmap_unpin_reaccount(struct vfio_iommu *iommu) +{ + struct rb_node *n, *p; + + n = rb_first(&iommu->dma_list); + for (; n; n = rb_next(n)) { + struct vfio_dma *dma; + long locked = 0, unlocked = 0; + + dma = rb_entry(n, struct vfio_dma, node); + unlocked += vfio_unmap_unpin(iommu, dma, false); + p = rb_first(&dma->pfn_list); + for (; p; p = rb_next(p)) { + struct vfio_pfn *vpfn = rb_entry(p, struct vfio_pfn, + node); + + if (!is_invalid_reserved_pfn(vpfn->pfn)) + locked++; + } + vfio_lock_acct(dma, locked - unlocked, true); + } +} + +static void vfio_iommu_detach_destroy_domain(struct vfio_domain *domain, + struct vfio_iommu *iommu, + struct vfio_iommu_group *group) +{ + iommu_detach_group(domain->domain, group->iommu_group); + list_del(&group->next); + if (!list_empty(&domain->group_list)) + goto out_dirty; + + /* + * Group ownership provides privilege, if the group list is empty, the + * domain goes away. If it's the last domain with iommu and external + * domain doesn't exist, then all the mappings go away too. If it's the + * last domain with iommu and external domain exist, update accounting + */ + if (list_is_singular(&iommu->domain_list)) { + if (list_empty(&iommu->emulated_iommu_groups)) { + WARN_ON(iommu->notifier.head); + vfio_iommu_unmap_unpin_all(iommu); + } else { + vfio_iommu_unmap_unpin_reaccount(iommu); + } + } + iommu_domain_free(domain->domain); + list_del(&domain->next); + kfree(domain); + vfio_update_pgsize_bitmap(iommu); + +out_dirty: + /* + * Removal of a group without dirty tracking may allow the iommu scope + * to be promoted. + */ + if (!group->pinned_page_dirty_scope) { + iommu->num_non_pinned_groups--; + if (iommu->dirty_page_tracking) + vfio_iommu_populate_bitmap_full(iommu); + } +} + static int vfio_iommu_type1_attach_group(void *iommu_data, struct iommu_group *iommu_group, enum vfio_group_type type) { struct vfio_iommu *iommu = iommu_data; struct vfio_iommu_group *group; - struct vfio_domain *domain, *d; + struct vfio_domain *domain; struct bus_type *bus = NULL; - bool resv_msi, msi_remap; - phys_addr_t resv_msi_base = 0; + bool msi_remap; struct iommu_domain_geometry *geo; LIST_HEAD(iova_copy); LIST_HEAD(group_resv_regions); @@ -2197,26 +2356,17 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, if (ret) goto out_free_group; - ret = -ENOMEM; - domain = kzalloc(sizeof(*domain), GFP_KERNEL); - if (!domain) + ret = iommu_get_group_resv_regions(iommu_group, &group_resv_regions); + if (ret) goto out_free_group; - ret = -EIO; - domain->domain = iommu_domain_alloc(bus); - if (!domain->domain) - goto out_free_domain; - - if (iommu->nesting) { - ret = iommu_enable_nesting(domain->domain); - if (ret) - goto out_domain; + domain = vfio_iommu_alloc_attach_domain(bus, iommu, group, + &group_resv_regions); + if (IS_ERR(domain)) { + ret = PTR_ERR(domain); + goto out_free_group; } - ret = iommu_attach_group(domain->domain, group->iommu_group); - if (ret) - goto out_domain; - /* Get aperture info */ geo = &domain->domain->geometry; if (vfio_iommu_aper_conflict(iommu, geo->aperture_start, @@ -2225,10 +2375,6 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, goto out_detach; } - ret = iommu_get_group_resv_regions(iommu_group, &group_resv_regions); - if (ret) - goto out_detach; - if (vfio_iommu_resv_conflict(iommu, &group_resv_regions)) { ret = -EINVAL; goto out_detach; @@ -2252,11 +2398,6 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, if (ret) goto out_detach; - resv_msi = vfio_iommu_has_sw_msi(&group_resv_regions, &resv_msi_base); - - INIT_LIST_HEAD(&domain->group_list); - list_add(&group->next, &domain->group_list); - msi_remap = irq_domain_check_msi_remap() || iommu_capable(bus, IOMMU_CAP_INTR_REMAP); @@ -2267,107 +2408,25 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, goto out_detach; } - /* - * If the IOMMU can block non-coherent operations (ie PCIe TLPs with - * no-snoop set) then VFIO always turns this feature on because on Intel - * platforms it optimizes KVM to disable wbinvd emulation. - */ - if (domain->domain->ops->enforce_cache_coherency) - domain->enforce_cache_coherency = - domain->domain->ops->enforce_cache_coherency( - domain->domain); - - /* Try to match an existing compatible domain */ - list_for_each_entry(d, &iommu->domain_list, next) { - iommu_detach_group(domain->domain, group->iommu_group); - if (!iommu_attach_group(d->domain, group->iommu_group)) { - list_add(&group->next, &d->group_list); - iommu_domain_free(domain->domain); - kfree(domain); - goto done; - } - - ret = iommu_attach_group(domain->domain, group->iommu_group); - if (ret) - goto out_domain; - } - - vfio_test_domain_fgsp(domain); - - /* replay mappings on new domains */ - ret = vfio_iommu_replay(iommu, domain); - if (ret) - goto out_detach; - - if (resv_msi) { - ret = iommu_get_msi_cookie(domain->domain, resv_msi_base); - if (ret && ret != -ENODEV) - goto out_detach; - } - - list_add(&domain->next, &iommu->domain_list); - vfio_update_pgsize_bitmap(iommu); -done: /* Delete the old one and insert new iova list */ vfio_iommu_iova_insert_copy(iommu, &iova_copy); - /* - * An iommu backed group can dirty memory directly and therefore - * demotes the iommu scope until it declares itself dirty tracking - * capable via the page pinning interface. - */ - iommu->num_non_pinned_groups++; mutex_unlock(&iommu->lock); vfio_iommu_resv_free(&group_resv_regions); return 0; out_detach: - iommu_detach_group(domain->domain, group->iommu_group); -out_domain: - iommu_domain_free(domain->domain); - vfio_iommu_iova_free(&iova_copy); - vfio_iommu_resv_free(&group_resv_regions); -out_free_domain: - kfree(domain); + vfio_iommu_detach_destroy_domain(domain, iommu, group); out_free_group: kfree(group); out_unlock: mutex_unlock(&iommu->lock); + vfio_iommu_iova_free(&iova_copy); + vfio_iommu_resv_free(&group_resv_regions); return ret; } -static void vfio_iommu_unmap_unpin_all(struct vfio_iommu *iommu) -{ - struct rb_node *node; - - while ((node = rb_first(&iommu->dma_list))) - vfio_remove_dma(iommu, rb_entry(node, struct vfio_dma, node)); -} - -static void vfio_iommu_unmap_unpin_reaccount(struct vfio_iommu *iommu) -{ - struct rb_node *n, *p; - - n = rb_first(&iommu->dma_list); - for (; n; n = rb_next(n)) { - struct vfio_dma *dma; - long locked = 0, unlocked = 0; - - dma = rb_entry(n, struct vfio_dma, node); - unlocked += vfio_unmap_unpin(iommu, dma, false); - p = rb_first(&dma->pfn_list); - for (; p; p = rb_next(p)) { - struct vfio_pfn *vpfn = rb_entry(p, struct vfio_pfn, - node); - - if (!is_invalid_reserved_pfn(vpfn->pfn)) - locked++; - } - vfio_lock_acct(dma, locked - unlocked, true); - } -} - /* * Called when a domain is removed in detach. It is possible that * the removed domain decided the iova aperture window. Modify the @@ -2482,44 +2541,12 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, group = find_iommu_group(domain, iommu_group); if (!group) continue; - - iommu_detach_group(domain->domain, group->iommu_group); - list_del(&group->next); - /* - * Group ownership provides privilege, if the group list is - * empty, the domain goes away. If it's the last domain with - * iommu and external domain doesn't exist, then all the - * mappings go away too. If it's the last domain with iommu and - * external domain exist, update accounting - */ - if (list_empty(&domain->group_list)) { - if (list_is_singular(&iommu->domain_list)) { - if (list_empty(&iommu->emulated_iommu_groups)) { - WARN_ON(iommu->notifier.head); - vfio_iommu_unmap_unpin_all(iommu); - } else { - vfio_iommu_unmap_unpin_reaccount(iommu); - } - } - iommu_domain_free(domain->domain); - list_del(&domain->next); - kfree(domain); - vfio_iommu_aper_expand(iommu, &iova_copy); - vfio_update_pgsize_bitmap(iommu); - } - /* - * Removal of a group without dirty tracking may allow - * the iommu scope to be promoted. - */ - if (!group->pinned_page_dirty_scope) { - iommu->num_non_pinned_groups--; - if (iommu->dirty_page_tracking) - vfio_iommu_populate_bitmap_full(iommu); - } + vfio_iommu_detach_destroy_domain(domain, iommu, group); kfree(group); break; } + vfio_iommu_aper_expand(iommu, &iova_copy); if (!vfio_iommu_resv_refresh(iommu, &iova_copy)) vfio_iommu_iova_insert_copy(iommu, &iova_copy); else