From patchwork Mon Jun 27 15:07:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 12896744 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86A8EC43334 for ; Mon, 27 Jun 2022 15:09:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=k6H5fRTlLYYFOws7ZZ0GU3O0s7WLg/4sDiPJ+yPehxQ=; b=SgsONbTmg5hwMv gJS5K3rFcPG3VWoM0rCjPZ0GBpuqA30bnakoedDvzcIsHLypPw7xJWU8JBD1L5L6eLFj+NrZQcVec 922bMDmmmfHUP+JkIEZDXRlEHyhp3hQIUKH272Pd76m+XTTXvD+ByS352dN9c6SgdJsWviQf1eIOt M9JvlzSexZ9KQWTWWZeeYzTGKwjd9p9ry4GX0C6SUiNf2rr0V+pjkVHX18ai+QJ+50J4Li1iNvsHI Q6hei22XGAt1ajYEEMZXRJ/fwVhBc9w0+XAk0zhvWmotuodln1/j6wkR9gtd95dm2ZqIwKNylBzaf 8l5VQuAgR0BUqUHENuEQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o5qLT-001Y8V-OD; Mon, 27 Jun 2022 15:08:11 +0000 Received: from mga07.intel.com ([134.134.136.100]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o5qLR-001Y7u-GF for linux-arm-kernel@lists.infradead.org; Mon, 27 Jun 2022 15:08:10 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1656342489; x=1687878489; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=OkWPsn2b02Q9Pv+/0ZVMO3zsX02+G170/f67CGxFMUY=; b=UCMe4KcOqafSoPAlG5ksak7co89A+b8u1/q3k124XmRP5yyFZA8rWKz2 IcLVyl5CmfxHXoQUNh94i5n9ObFmaJrdIUhAo45ugK3I7RrsNw2zitJUV 4POinOKIf7A9B063P9OS56AZdlJTDCPjHoVDhradRhAuW1IDbcv0LbTXR B6b2k5czntPkTaKCzwTyZFXdTnVq6b7C8/ajZSJhdXdfUbVouHH7Wg4bV qAgtofmVb1rwPSkEMNwm/AKbYI214CI3rYTjWa4zhQcXFf5AFyytdxgfC 4qGTlbKeAgtf0NGqMitbsZ2u4Z0HTeyne6NPi8+48gFU+OS1HiTjlSpWz w==; X-IronPort-AV: E=McAfee;i="6400,9594,10390"; a="345467372" X-IronPort-AV: E=Sophos;i="5.92,226,1650956400"; d="scan'208";a="345467372" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jun 2022 08:08:04 -0700 X-IronPort-AV: E=Sophos;i="5.92,226,1650956400"; d="scan'208";a="646461411" Received: from gretavix-mobl3.amr.corp.intel.com (HELO ijarvine-MOBL2.ger.corp.intel.com) ([10.249.43.78]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jun 2022 08:08:01 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , Alexandre Torgue , Yves Coppeaux , Bich HEMON , linux-serial@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH] serial: stm32: Clear prev values before setting RTS delays Date: Mon, 27 Jun 2022 18:07:52 +0300 Message-Id: <20220627150753.34510-1-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220627_080809_661935_5C8225BE X-CRM114-Status: UNSURE ( 9.40 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The code lacks clearing of previous DEAT/DEDT values. Thus, changing values on the fly results in garbage delays tending towards the maximum value as more and more bits are ORed together. (Leaving RS485 mode would have cleared the old values though). Fixes: 1bcda09d2910 ("serial: stm32: add support for RS485 hardware control mode") Signed-off-by: Ilpo Järvinen --- drivers/tty/serial/stm32-usart.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index db3dd9731ee1..0cfe183f4076 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -72,6 +72,8 @@ static void stm32_usart_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE, *cr3 |= USART_CR3_DEM; over8 = *cr1 & USART_CR1_OVER8; + *cr1 &= ~(USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK); + if (over8) rs485_deat_dedt = delay_ADE * baud * 8; else